library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;


entity automate is
    port (
        I_clk            : in  std_logic;
        I_rst            : in  std_logic;
        I_clk_display    : in  std_logic;
        I_bouton         : in  std_logic;
        I_invalide       : in  std_logic;
        I_fin            : in  std_logic;
        O_comptage       : out std_logic;
        O_enregistrement : out std_logic;
        O_l_rouge        : out std_logic;
        O_l_verte        : out std_logic
        );
end automate;

architecture a_automate of automate is

    type TYPE_ETAT is (
        st_attente_echec,
        st_attente_succes,
        st_comptage,
        st_comparaison,
        st_enregistrement,
        st_fin_vert,
        st_fin_rouge
        );
    signal SR_ETAT : TYPE_ETAT;

begin


    process (I_clk, I_rst)
    begin
        if(I_rst = '1')then
            __BLANK_TO_FILL__
                case SR_ETAT is

                when st_attente_succes =>
                    l_verte        <= '1';
                    l_rouge        <= '0';
                    comptage       <= '0';
                    enregistrement <= '0';
                    if bouton = '1' then
                        SR_ETAT <= st_comptage;
                    else
                        SR_ETAT <= st_attente_succes;
                    end if;

                    when __BLANK_TO_FILL__

            end case;

        end process COMB;


        end a_automate;