From dc1a8fdae658f21c04c3998cdfad0f1e8f8dd7f5 Mon Sep 17 00:00:00 2001 From: BAZIN Jean-Noel <jn.bazin@imt-atlantique.fr> Date: Fri, 6 Oct 2023 10:08:47 +0200 Subject: [PATCH] up src automate --- src/automate.vhd | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/src/automate.vhd b/src/automate.vhd index 4767f4e..6a539f6 100644 --- a/src/automate.vhd +++ b/src/automate.vhd @@ -7,7 +7,6 @@ entity automate is port ( I_clk : in std_logic; I_rst : in std_logic; - I_bouton : in std_logic; I_clk_display : in std_logic; I_bouton : in std_logic; I_invalide : in std_logic; @@ -30,17 +29,16 @@ architecture a_automate of automate is st_fin_vert, st_fin_rouge ); - signal ST_ETAT : TYPE_ETAT; + signal SR_ETAT : TYPE_ETAT; begin - UpdateState : process (I_clk, I_rst) - + process (I_clk, I_rst) begin if(I_rst = '1')then __BLANK_TO_FILL__ - case ETAT is + case SR_ETAT is when st_attente_succes => l_verte <= '1'; @@ -48,9 +46,9 @@ begin comptage <= '0'; enregistrement <= '0'; if bouton = '1' then - ST_ETAT <= st_comptage; + SR_ETAT <= st_comptage; else - ST_ETAT <= st_attente_succes; + SR_ETAT <= st_attente_succes; end if; when __BLANK_TO_FILL__ -- GitLab