diff --git a/src/automate.vhd b/src/automate.vhd
index 1ccb931d7fe12fa743f62a8460c95a6d7fb05343..75e4df53c189ee0c9ff1ad5df9df9f3690ec0e5e 100644
--- a/src/automate.vhd
+++ b/src/automate.vhd
@@ -36,24 +36,88 @@ begin
     process (I_clk, I_rst)
     begin
         if(I_rst = '1')then
-            __BLANK_TO_FILL__
+            SR_STATE <= st_wait_success;
+            
         elsif rising_edge(I_clk)then
             case SR_STATE is
-                case SR_STATE is
-
+            
                 when st_wait_success =>
-                    O_l_green        <= '1';
-                    O_l_red        <= '0';
-                    O_counting       <= '0';
-                    O_store <= '0';
+                    O_l_green  <= '1';
+                    O_l_red    <= '0';
+                    O_counting <= '0';
+                    O_store    <= '0';
+                    
                     if I_button = '1' then
                         SR_STATE <= st_counting;
                     end if;
 
-                    when __BLANK_TO_FILL__
-
-                    __BLANK_TO_FILL__
+                when st_counting =>
+                    O_counting <= '1';
+                    O_store    <= '0';
+                    O_l_red    <= '0';
+                    O_l_green  <= '0';   
+                
+                    if I_button = '0' then
+                        SR_STATE <= st_compar;
+                    end if; 
+                    
+               when st_compar =>
+                    O_counting <= '0';
+                    O_store    <= '0';
+                    O_l_red    <= '0';
+                    O_l_green  <= '0';   
+                
+                    if I_invalide = '0' then
+                        SR_STATE <= st_store;
+                    elsif I_invalide = '1' then
+                        SR_STATE <= st_wait_failed;
+                    end if;
+                    
+               when st_store =>
+                    O_counting <= '0';
+                    O_store    <= '1';
+                    O_l_red    <= '0';
+                    O_l_green  <= '0';   
+                
+                    if I_end = '1' then
+                        SR_STATE <= st_end_red;
+                    elsif I_end = '0' then
+                        SR_STATE <= st_wait_success; 
+                    end if;   
+                    
+               when st_end_red =>
+                    O_counting <= '0';
+                    O_store    <= '0';
+                    O_l_red    <= '1';
+                    O_l_green  <= '0';   
+                
+                    if I_clk_display = '1' then
+                        SR_STATE <= st_end_green;
+                    end if;      
+               
+               when st_end_green =>
+                    O_counting <= '0';
+                    O_store    <= '0';
+                    O_l_red    <= '0';
+                    O_l_green  <= '1';   
+                
+                    if I_clk_display = '0' then
+                        SR_STATE <= st_end_red;
+                    end if;
+                    
+               when st_wait_failed =>
+                    O_counting <= '0';
+                    O_store    <= '0';
+                    O_l_red    <= '1';
+                    O_l_green  <= '0';   
+                
+                    if I_button = '1' then
+                        SR_STATE <= st_counting;
+                    end if;             
 
+               when others =>
+                    SR_STATE <= st_wait_success;
+   
             end case;
         end if;
     end process;
diff --git a/src/compteur_modulo6.vhd b/src/compteur_modulo6.vhd
index 7962a902901eb77362e130eb770ac5481684623d..74e4689562b58c20191ae65bd246abd9f4b9f743 100644
--- a/src/compteur_modulo6.vhd
+++ b/src/compteur_modulo6.vhd
@@ -20,12 +20,21 @@ architecture modulo6_a of compteur_modulo6 is
 
 begin
 
-    process (_BLANK_)
+    process (I_clk, I_rst, I_block)
     begin
         if I_rst = '1' then
-            _BLANK_
+            SR_Counter <= "000";
+            
         elsif rising_edge(I_clk) then
-            _BLANK_
+        
+            if I_block = '0' then 
+              SR_Counter <= SR_Counter + 1;
+                if SR_Counter = "111" then
+                    SR_Counter <= "000";
+                end if;
+            else
+              SR_Counter <= SR_Counter;
+          end if;
         end if;
     end process;
 
diff --git a/src/mux6_1.vhd b/src/mux6_1.vhd
index a689bef6c26f4dd324c13f5d0653dfd294f6d097..1965f8c9b10d4dede813a4a2ea9c3565d8f2076e 100644
--- a/src/mux6_1.vhd
+++ b/src/mux6_1.vhd
@@ -20,8 +20,29 @@ end mux6_1;
 architecture a_mux6_1 of mux6_1 is
 begin
 
-__BLANK_TO_FILL__
-
-
-
+process (I_sel, I_0, I_1, I_2, I_3, I_4, I_5)
+begin
+   case I_sel is
+        when "000" =>
+        O_mux6 <= I_0;
+        
+        when "001" =>
+        O_mux6 <= I_1;
+        
+        when "010" =>
+        O_mux6 <= I_2;
+        
+        when "011" =>
+        O_mux6 <= I_3;
+        
+        when "100" =>
+        O_mux6 <= I_4;
+        
+        when "101" =>
+        O_mux6 <= I_5;
+        
+        when others =>
+        O_mux6 <= "000000";
+    end case;
+end process;
 end a_mux6_1;
diff --git a/src/mux6_1_tb.vhd b/src/mux6_1_tb.vhd
index a79053f265a6a6016ab52c8b3c8271a3bed13f3e..ab99cbb2e1b484b163862df152426f2dafa8d873 100644
--- a/src/mux6_1_tb.vhd
+++ b/src/mux6_1_tb.vhd
@@ -58,7 +58,7 @@ begin
     cpt : process (clk) is
     begin
         if rising_edge(clk) then
-            if(COMMANDE = "101") then
+            if(COMMANDE = "110") then
                 COMMANDE <= "000";
             else
                 COMMANDE <= std_logic_vector(unsigned(COMMANDE)+1);