From abb307790aac2768f0eb56d88b770320476faa85 Mon Sep 17 00:00:00 2001
From: Michelly LUIS LACERDA <m24luisl@fl-tp-br-603.imta.fr>
Date: Wed, 12 Feb 2025 12:24:06 +0100
Subject: [PATCH] =?UTF-8?q?Documents=20.vhd=20modifi=C3=A9s?=
MIME-Version: 1.0
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---
src/automate.vhd | 84 +++++++++++++++++++++++++++++++++++-----
src/compteur_modulo6.vhd | 15 +++++--
src/mux6_1.vhd | 29 ++++++++++++--
src/mux6_1_tb.vhd | 2 +-
4 files changed, 112 insertions(+), 18 deletions(-)
diff --git a/src/automate.vhd b/src/automate.vhd
index 1ccb931..75e4df5 100644
--- a/src/automate.vhd
+++ b/src/automate.vhd
@@ -36,24 +36,88 @@ begin
process (I_clk, I_rst)
begin
if(I_rst = '1')then
- __BLANK_TO_FILL__
+ SR_STATE <= st_wait_success;
+
elsif rising_edge(I_clk)then
case SR_STATE is
- case SR_STATE is
-
+
when st_wait_success =>
- O_l_green <= '1';
- O_l_red <= '0';
- O_counting <= '0';
- O_store <= '0';
+ O_l_green <= '1';
+ O_l_red <= '0';
+ O_counting <= '0';
+ O_store <= '0';
+
if I_button = '1' then
SR_STATE <= st_counting;
end if;
- when __BLANK_TO_FILL__
-
- __BLANK_TO_FILL__
+ when st_counting =>
+ O_counting <= '1';
+ O_store <= '0';
+ O_l_red <= '0';
+ O_l_green <= '0';
+
+ if I_button = '0' then
+ SR_STATE <= st_compar;
+ end if;
+
+ when st_compar =>
+ O_counting <= '0';
+ O_store <= '0';
+ O_l_red <= '0';
+ O_l_green <= '0';
+
+ if I_invalide = '0' then
+ SR_STATE <= st_store;
+ elsif I_invalide = '1' then
+ SR_STATE <= st_wait_failed;
+ end if;
+
+ when st_store =>
+ O_counting <= '0';
+ O_store <= '1';
+ O_l_red <= '0';
+ O_l_green <= '0';
+
+ if I_end = '1' then
+ SR_STATE <= st_end_red;
+ elsif I_end = '0' then
+ SR_STATE <= st_wait_success;
+ end if;
+
+ when st_end_red =>
+ O_counting <= '0';
+ O_store <= '0';
+ O_l_red <= '1';
+ O_l_green <= '0';
+
+ if I_clk_display = '1' then
+ SR_STATE <= st_end_green;
+ end if;
+
+ when st_end_green =>
+ O_counting <= '0';
+ O_store <= '0';
+ O_l_red <= '0';
+ O_l_green <= '1';
+
+ if I_clk_display = '0' then
+ SR_STATE <= st_end_red;
+ end if;
+
+ when st_wait_failed =>
+ O_counting <= '0';
+ O_store <= '0';
+ O_l_red <= '1';
+ O_l_green <= '0';
+
+ if I_button = '1' then
+ SR_STATE <= st_counting;
+ end if;
+ when others =>
+ SR_STATE <= st_wait_success;
+
end case;
end if;
end process;
diff --git a/src/compteur_modulo6.vhd b/src/compteur_modulo6.vhd
index 7962a90..74e4689 100644
--- a/src/compteur_modulo6.vhd
+++ b/src/compteur_modulo6.vhd
@@ -20,12 +20,21 @@ architecture modulo6_a of compteur_modulo6 is
begin
- process (_BLANK_)
+ process (I_clk, I_rst, I_block)
begin
if I_rst = '1' then
- _BLANK_
+ SR_Counter <= "000";
+
elsif rising_edge(I_clk) then
- _BLANK_
+
+ if I_block = '0' then
+ SR_Counter <= SR_Counter + 1;
+ if SR_Counter = "111" then
+ SR_Counter <= "000";
+ end if;
+ else
+ SR_Counter <= SR_Counter;
+ end if;
end if;
end process;
diff --git a/src/mux6_1.vhd b/src/mux6_1.vhd
index a689bef..1965f8c 100644
--- a/src/mux6_1.vhd
+++ b/src/mux6_1.vhd
@@ -20,8 +20,29 @@ end mux6_1;
architecture a_mux6_1 of mux6_1 is
begin
-__BLANK_TO_FILL__
-
-
-
+process (I_sel, I_0, I_1, I_2, I_3, I_4, I_5)
+begin
+ case I_sel is
+ when "000" =>
+ O_mux6 <= I_0;
+
+ when "001" =>
+ O_mux6 <= I_1;
+
+ when "010" =>
+ O_mux6 <= I_2;
+
+ when "011" =>
+ O_mux6 <= I_3;
+
+ when "100" =>
+ O_mux6 <= I_4;
+
+ when "101" =>
+ O_mux6 <= I_5;
+
+ when others =>
+ O_mux6 <= "000000";
+ end case;
+end process;
end a_mux6_1;
diff --git a/src/mux6_1_tb.vhd b/src/mux6_1_tb.vhd
index a79053f..ab99cbb 100644
--- a/src/mux6_1_tb.vhd
+++ b/src/mux6_1_tb.vhd
@@ -58,7 +58,7 @@ begin
cpt : process (clk) is
begin
if rising_edge(clk) then
- if(COMMANDE = "101") then
+ if(COMMANDE = "110") then
COMMANDE <= "000";
else
COMMANDE <= std_logic_vector(unsigned(COMMANDE)+1);
--
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