diff --git a/docs/wave_generator.drawio b/docs/wave_generator.drawio
index 6d65d824039ac0376711b9b39806f970cf0549ca..dc8ca38a632c936ac1993ccc5719e26ca026431d 100644
--- a/docs/wave_generator.drawio
+++ b/docs/wave_generator.drawio
@@ -1,49 +1,67 @@
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diff --git a/docs/wave_generator.png b/docs/wave_generator.png
new file mode 100644
index 0000000000000000000000000000000000000000..f8de8870b12eb50245b225d4fa1c05cb7f2cc4d1
Binary files /dev/null and b/docs/wave_generator.png differ
diff --git a/src/hdl/wave_generator.vhd b/src/hdl/wave_generator.vhd
index 310c78f6226381637b988c9bc043aa8b4c3d3a76..aa7cd7d75044f281dd8f18b0257a5233ee8f2e5d 100644
--- a/src/hdl/wave_generator.vhd
+++ b/src/hdl/wave_generator.vhd
@@ -64,12 +64,12 @@ begin
G_MAX_VAL => natural(floor(G_fs/(2.0*G_f0)))
)
port map (
- I_clk => ,
- I_rst => ,
- I_u_d => ,
- O_val => ,
- O_last => ,
- O_middle =>
+ I_clk => I_clk,
+ I_rst => I_rst ,
+ I_u_d => S_u_d,
+ O_val => S_addr,
+ O_last => S_last,
+ O_middle => S_middle
);
-- Module C
@@ -94,10 +94,10 @@ begin
G_fs => G_fs
)
port map (
- I_clk => ,
- I_rst => ,
- I_addr => ,
- O_triangle =>
+ I_clk => I_clk,
+ I_rst => I_rst,
+ I_addr => S_addr(C_addr_half_w-1 downto 0),
+ O_triangle => S_triangle_out_lut
);
-- Module E
@@ -108,10 +108,10 @@ begin
G_fs => G_fs
)
port map (
- I_clk => ,
- I_rst => ,
- I_addr => ,
- O_saw_tooth =>
+ I_clk => I_clk ,
+ I_rst => I_rst,
+ I_addr => S_addr,
+ O_saw_tooth => S_saw_tooth_out_lut
);
S_square <= ((G_N-1) => '0', others => '1');
@@ -119,12 +119,12 @@ begin
-- Module F
F_inst : entity work.module_F
port map (
- I_sel => ,
- I_din0 => ,
- I_din1 => ,
- I_din2 => ,
- I_din3 => ,
- O_dout =>
+ I_sel => I_wave_sel,
+ I_din0 => S_sine_out_lut,
+ I_din1 => S_square,
+ I_din2 => S_saw_tooth_out_lut,
+ I_din3 => S_triangle_out_lut,
+ O_dout => S_wave_sample
);
-- Module G
@@ -133,17 +133,17 @@ begin
G_N => G_N
)
port map (
- I_din => ,
- O_dout =>
+ I_din => S_wave_sample,
+ O_dout => S_opposite_wave_sample
);
-- Module H
H_inst : entity work.module_H
port map (
- I_sel => ,
- I_din0 => ,
- I_din1 => ,
- O_dout =>
+ I_sel => S_sign_sel,
+ I_din0 => S_wave_sample,
+ I_din1 => S_opposite_wave_sample,
+ O_dout => S_wave_sample
);
-- Module I
@@ -152,10 +152,10 @@ begin
G_N => G_N
)
port map (
- I_clk => ,
- I_rst => ,
- I_din => ,
- O_dout =>
+ I_clk => I_clk ,
+ I_rst => I_rst,
+ I_din => S_wave_sample,
+ O_dout => S_wave_value
);
end arch;