From 97636a6cd08babbb7e74784b0377261dadf77850 Mon Sep 17 00:00:00 2001
From: Gabriel LATERRADE <g24later@fl-tp-br-523.imta.fr>
Date: Mon, 5 May 2025 10:36:03 +0200
Subject: [PATCH] Ceci est le code Vivado
---
proj/tb_module_C_behav.wcfg | 62 +++++++++++++++++++++++++++++++++++++
proj/tb_module_D_behav.wcfg | 61 ++++++++++++++++++++++++++++++++++++
src/hdl/wave_generator.vhd | 60 +++++++++++++++++------------------
3 files changed, 153 insertions(+), 30 deletions(-)
create mode 100644 proj/tb_module_C_behav.wcfg
create mode 100644 proj/tb_module_D_behav.wcfg
diff --git a/proj/tb_module_C_behav.wcfg b/proj/tb_module_C_behav.wcfg
new file mode 100644
index 0000000..4426953
--- /dev/null
+++ b/proj/tb_module_C_behav.wcfg
@@ -0,0 +1,62 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<wave_config>
+ <wave_state>
+ </wave_state>
+ <db_ref_list>
+ <db_ref path="tb_module_C_behav.wdb" id="1">
+ <top_modules>
+ <top_module name="tb_module_C" />
+ <top_module name="wave_package" />
+ </top_modules>
+ </db_ref>
+ </db_ref_list>
+ <zoom_setting>
+ <ZoomStartTime time="0.000 ns"></ZoomStartTime>
+ <ZoomEndTime time="132.801 ns"></ZoomEndTime>
+ <Cursor1Time time="175.000 ns"></Cursor1Time>
+ </zoom_setting>
+ <column_width_setting>
+ <NameColumnWidth column_width="220"></NameColumnWidth>
+ <ValueColumnWidth column_width="60"></ValueColumnWidth>
+ </column_width_setting>
+ <WVObjectSize size="9" />
+ <wvobject type="logic" fp_name="/tb_module_C/SR_clk">
+ <obj_property name="ElementShortName">SR_clk</obj_property>
+ <obj_property name="ObjectShortName">SR_clk</obj_property>
+ </wvobject>
+ <wvobject type="logic" fp_name="/tb_module_C/SR_rst">
+ <obj_property name="ElementShortName">SR_rst</obj_property>
+ <obj_property name="ObjectShortName">SR_rst</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/tb_module_C/SR_addr">
+ <obj_property name="ElementShortName">SR_addr[4:0]</obj_property>
+ <obj_property name="ObjectShortName">SR_addr[4:0]</obj_property>
+ <obj_property name="isExpanded"></obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/tb_module_C/SC_sine_out">
+ <obj_property name="ElementShortName">SC_sine_out[15:0]</obj_property>
+ <obj_property name="ObjectShortName">SC_sine_out[15:0]</obj_property>
+ <obj_property name="WaveformStyle">STYLE_ANALOG</obj_property>
+ <obj_property name="CellHeight">100</obj_property>
+ </wvobject>
+ <wvobject type="other" fp_name="/tb_module_C/SR_addrNatural">
+ <obj_property name="ElementShortName">SR_addrNatural</obj_property>
+ <obj_property name="ObjectShortName">SR_addrNatural</obj_property>
+ </wvobject>
+ <wvobject type="other" fp_name="/tb_module_C/C_N">
+ <obj_property name="ElementShortName">C_N</obj_property>
+ <obj_property name="ObjectShortName">C_N</obj_property>
+ </wvobject>
+ <wvobject type="other" fp_name="/tb_module_C/C_f0">
+ <obj_property name="ElementShortName">C_f0</obj_property>
+ <obj_property name="ObjectShortName">C_f0</obj_property>
+ </wvobject>
+ <wvobject type="other" fp_name="/tb_module_C/C_fs">
+ <obj_property name="ElementShortName">C_fs</obj_property>
+ <obj_property name="ObjectShortName">C_fs</obj_property>
+ </wvobject>
+ <wvobject type="other" fp_name="/tb_module_C/C_clk_period">
+ <obj_property name="ElementShortName">C_clk_period</obj_property>
+ <obj_property name="ObjectShortName">C_clk_period</obj_property>
+ </wvobject>
+</wave_config>
diff --git a/proj/tb_module_D_behav.wcfg b/proj/tb_module_D_behav.wcfg
new file mode 100644
index 0000000..4e47785
--- /dev/null
+++ b/proj/tb_module_D_behav.wcfg
@@ -0,0 +1,61 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<wave_config>
+ <wave_state>
+ </wave_state>
+ <db_ref_list>
+ <db_ref path="tb_module_D_behav.wdb" id="1">
+ <top_modules>
+ <top_module name="tb_module_D" />
+ <top_module name="wave_package" />
+ </top_modules>
+ </db_ref>
+ </db_ref_list>
+ <zoom_setting>
+ <ZoomStartTime time="0.000 ns"></ZoomStartTime>
+ <ZoomEndTime time="664.001 ns"></ZoomEndTime>
+ <Cursor1Time time="35.000 ns"></Cursor1Time>
+ </zoom_setting>
+ <column_width_setting>
+ <NameColumnWidth column_width="220"></NameColumnWidth>
+ <ValueColumnWidth column_width="60"></ValueColumnWidth>
+ </column_width_setting>
+ <WVObjectSize size="9" />
+ <wvobject type="logic" fp_name="/tb_module_D/SR_clk">
+ <obj_property name="ElementShortName">SR_clk</obj_property>
+ <obj_property name="ObjectShortName">SR_clk</obj_property>
+ </wvobject>
+ <wvobject type="logic" fp_name="/tb_module_D/SR_rst">
+ <obj_property name="ElementShortName">SR_rst</obj_property>
+ <obj_property name="ObjectShortName">SR_rst</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/tb_module_D/SR_addr">
+ <obj_property name="ElementShortName">SR_addr[4:0]</obj_property>
+ <obj_property name="ObjectShortName">SR_addr[4:0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/tb_module_D/SC_triangle_out">
+ <obj_property name="ElementShortName">SC_triangle_out[15:0]</obj_property>
+ <obj_property name="ObjectShortName">SC_triangle_out[15:0]</obj_property>
+ <obj_property name="WaveformStyle">STYLE_ANALOG</obj_property>
+ <obj_property name="CellHeight">100</obj_property>
+ </wvobject>
+ <wvobject type="other" fp_name="/tb_module_D/SR_addrNatural">
+ <obj_property name="ElementShortName">SR_addrNatural</obj_property>
+ <obj_property name="ObjectShortName">SR_addrNatural</obj_property>
+ </wvobject>
+ <wvobject type="other" fp_name="/tb_module_D/C_clk_period">
+ <obj_property name="ElementShortName">C_clk_period</obj_property>
+ <obj_property name="ObjectShortName">C_clk_period</obj_property>
+ </wvobject>
+ <wvobject type="other" fp_name="/tb_module_D/C_N">
+ <obj_property name="ElementShortName">C_N</obj_property>
+ <obj_property name="ObjectShortName">C_N</obj_property>
+ </wvobject>
+ <wvobject type="other" fp_name="/tb_module_D/C_f0">
+ <obj_property name="ElementShortName">C_f0</obj_property>
+ <obj_property name="ObjectShortName">C_f0</obj_property>
+ </wvobject>
+ <wvobject type="other" fp_name="/tb_module_D/C_fs">
+ <obj_property name="ElementShortName">C_fs</obj_property>
+ <obj_property name="ObjectShortName">C_fs</obj_property>
+ </wvobject>
+</wave_config>
diff --git a/src/hdl/wave_generator.vhd b/src/hdl/wave_generator.vhd
index 310c78f..69a9e4d 100644
--- a/src/hdl/wave_generator.vhd
+++ b/src/hdl/wave_generator.vhd
@@ -64,12 +64,12 @@ begin
G_MAX_VAL => natural(floor(G_fs/(2.0*G_f0)))
)
port map (
- I_clk => ,
- I_rst => ,
- I_u_d => ,
- O_val => ,
- O_last => ,
- O_middle =>
+ I_clk => I_clk,
+ I_rst => I_rst,
+ I_u_d => S_u_d,
+ O_val => S_addr,
+ O_last => S_last,
+ O_middle => S_middle
);
-- Module C
@@ -94,10 +94,10 @@ begin
G_fs => G_fs
)
port map (
- I_clk => ,
- I_rst => ,
- I_addr => ,
- O_triangle =>
+ I_clk => I_clk,
+ I_rst => I_rst,
+ I_addr => S_addr(C_addr_half_w-1 downto 0),
+ O_triangle => S_triangle_out_lut
);
-- Module E
@@ -108,10 +108,10 @@ begin
G_fs => G_fs
)
port map (
- I_clk => ,
- I_rst => ,
- I_addr => ,
- O_saw_tooth =>
+ I_clk => I_clk,
+ I_rst => I_rst,
+ I_addr => S_addr,
+ O_saw_tooth => S_saw_tooth_out_lut
);
S_square <= ((G_N-1) => '0', others => '1');
@@ -119,12 +119,12 @@ begin
-- Module F
F_inst : entity work.module_F
port map (
- I_sel => ,
- I_din0 => ,
- I_din1 => ,
- I_din2 => ,
- I_din3 => ,
- O_dout =>
+ I_sel => I_wave_sel,
+ I_din0 => S_sine_out_lut,
+ I_din1 => S_square,
+ I_din2 => S_saw_tooth_out_lut,
+ I_din3 => S_triangle_out_lut,
+ O_dout => S_wave_sample
);
-- Module G
@@ -133,17 +133,17 @@ begin
G_N => G_N
)
port map (
- I_din => ,
- O_dout =>
+ I_din => S_wave_sample,
+ O_dout => S_opposite_wave_sample
);
-- Module H
H_inst : entity work.module_H
port map (
- I_sel => ,
- I_din0 => ,
- I_din1 => ,
- O_dout =>
+ I_sel => S_sign_sel,
+ I_din0 => S_wave_sample,
+ I_din1 => S_opposite_wave_sample,
+ O_dout => S_wave_value
);
-- Module I
@@ -152,10 +152,10 @@ begin
G_N => G_N
)
port map (
- I_clk => ,
- I_rst => ,
- I_din => ,
- O_dout =>
+ I_clk => I_clk,
+ I_rst => I_rst,
+ I_din => S_wave_value,
+ O_dout => O_wav
);
end arch;
--
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