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new file mode 100644
index 0000000000000000000000000000000000000000..2badea42ea5bf05e355c414ce1cede72f17f41e1
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@@ -0,0 +1 @@
+,l24nicot,fl-tp-br-515,09.05.2025 16:08,file:///homes/l24nicot/.config/libreoffice/4;
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diff --git a/docs/Sans nom 1.odt b/docs/Sans nom 1.odt
new file mode 100644
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diff --git a/docs/img/FSM.png b/docs/img/FSM.png
index 7f6db881fff5cdfb9351c0348dfec49ff082516d..d83de341cd4d0fc4e292e3453e04a80f8e49e263 100644
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diff --git a/proj/AudioProc.cache/sim/ssm.db b/proj/AudioProc.cache/sim/ssm.db
new file mode 100644
index 0000000000000000000000000000000000000000..332362d091397c6d3c550256770e99bda29df9c2
--- /dev/null
+++ b/proj/AudioProc.cache/sim/ssm.db
@@ -0,0 +1,11 @@
+################################################################################
+# DONOT REMOVE THIS FILE
+# Unified simulation database file for selected simulation model for IP
+#
+# File: ssm.db (Fri May 9 15:23:56 2025)
+#
+# This file is generated by the unified simulation automation and contains the
+# selected simulation model information for the IP/BD instances.
+# DONOT REMOVE THIS FILE
+################################################################################
+clk_wiz_0,
diff --git a/proj/AudioProc.cache/wt/project.wpc b/proj/AudioProc.cache/wt/project.wpc
new file mode 100644
index 0000000000000000000000000000000000000000..9b342093142bd1b298b4af63bdebdead3a3ef56e
--- /dev/null
+++ b/proj/AudioProc.cache/wt/project.wpc
@@ -0,0 +1,3 @@
+version:1
+6d6f64655f636f756e7465727c4755494d6f6465:1
+eof:
diff --git a/proj/AudioProc.cache/wt/synthesis.wdf b/proj/AudioProc.cache/wt/synthesis.wdf
new file mode 100644
index 0000000000000000000000000000000000000000..b23c12ca6497fa38b2173491004497783ed80665
--- /dev/null
+++ b/proj/AudioProc.cache/wt/synthesis.wdf
@@ -0,0 +1,52 @@
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diff --git a/proj/AudioProc.cache/wt/synthesis_details.wdf b/proj/AudioProc.cache/wt/synthesis_details.wdf
new file mode 100644
index 0000000000000000000000000000000000000000..78f8d66e566c72c9b7f2063ebfcca519992e3006
--- /dev/null
+++ b/proj/AudioProc.cache/wt/synthesis_details.wdf
@@ -0,0 +1,3 @@
+version:1
+73796e746865736973:73796e7468657369735c7573616765:686c735f6970:30:00:00
+eof:2511430288
diff --git a/proj/AudioProc.cache/wt/webtalk_pa.xml b/proj/AudioProc.cache/wt/webtalk_pa.xml
new file mode 100644
index 0000000000000000000000000000000000000000..1b0b52df3b7bc2bc4e6ee3f949a7a2c2ec17a440
--- /dev/null
+++ b/proj/AudioProc.cache/wt/webtalk_pa.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="UTF-8" ?>
+<document>
+<!--The data in this file is primarily intended for consumption by Xilinx tools.
+The structure and the elements are likely to change over the next few releases.
+This means code written to parse this file will need to be revisited each subsequent release.-->
+<application name="pa" timeStamp="Fri May 9 16:03:06 2025">
+<section name="Project Information" visible="false">
+<property name="ProjectID" value="a2a460662c534046acb4b1eb8742bffd" type="ProjectID"/>
+<property name="ProjectIteration" value="1" type="ProjectIteration"/>
+</section>
+<section name="PlanAhead Usage" visible="true">
+<item name="Project Data">
+<property name="SrcSetCount" value="1" type="SrcSetCount"/>
+<property name="ConstraintSetCount" value="1" type="ConstraintSetCount"/>
+<property name="DesignMode" value="RTL" type="DesignMode"/>
+<property name="SynthesisStrategy" value="Flow_PerfOptimized_High" type="SynthesisStrategy"/>
+<property name="ImplStrategy" value="Vivado Implementation Defaults" type="ImplStrategy"/>
+</item>
+</section>
+</application>
+</document>
diff --git a/proj/AudioProc.cache/wt/xsim.wdf b/proj/AudioProc.cache/wt/xsim.wdf
new file mode 100644
index 0000000000000000000000000000000000000000..51d5206f7011f2f0764fb661278617e58456141a
--- /dev/null
+++ b/proj/AudioProc.cache/wt/xsim.wdf
@@ -0,0 +1,4 @@
+version:1
+7873696d:7873696d5c636f6d6d616e645f6c696e655f6f7074696f6e73:2d73696d5f6d6f6465:6265686176696f72616c:00:00
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+eof:2427094519
diff --git a/proj/AudioProc.hw/AudioProc.lpr b/proj/AudioProc.hw/AudioProc.lpr
new file mode 100644
index 0000000000000000000000000000000000000000..afc0a86cf8f820e635f040c3869b4b647d11ec04
--- /dev/null
+++ b/proj/AudioProc.hw/AudioProc.lpr
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!-- Product Version: Vivado v2024.1 (64-bit) -->
+<!-- -->
+<!-- Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. -->
+<!-- Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved. -->
+
+<labtools version="1" minor="0"/>
diff --git a/proj/AudioProc.ip_user_files/README.txt b/proj/AudioProc.ip_user_files/README.txt
new file mode 100644
index 0000000000000000000000000000000000000000..023052cab505345c50834e560e42db8c25daf798
--- /dev/null
+++ b/proj/AudioProc.ip_user_files/README.txt
@@ -0,0 +1 @@
+The files in this directory structure are automatically generated and managed by Vivado. Editing these files is not recommended.
diff --git a/proj/AudioProc.ip_user_files/ip/clk_wiz_0/clk_wiz_0.vho b/proj/AudioProc.ip_user_files/ip/clk_wiz_0/clk_wiz_0.vho
new file mode 100755
index 0000000000000000000000000000000000000000..c6b126bb4b8be62560df51240c9200f63d5efb97
--- /dev/null
+++ b/proj/AudioProc.ip_user_files/ip/clk_wiz_0/clk_wiz_0.vho
@@ -0,0 +1,103 @@
+--
+-- (c) Copyright 2008 - 2013 Xilinx, Inc. All rights reserved.
+--
+-- This file contains confidential and proprietary information
+-- of Xilinx, Inc. and is protected under U.S. and
+-- international copyright and other intellectual property
+-- laws.
+--
+-- DISCLAIMER
+-- This disclaimer is not a license and does not grant any
+-- rights to the materials distributed herewith. Except as
+-- otherwise provided in a valid license issued to you by
+-- Xilinx, and to the maximum extent permitted by applicable
+-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
+-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
+-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
+-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
+-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
+-- (2) Xilinx shall not be liable (whether in contract or tort,
+-- including negligence, or under any other theory of
+-- liability) for any loss or damage of any kind or nature
+-- related to, arising under or in connection with these
+-- materials, including for any direct, or any indirect,
+-- special, incidental, or consequential loss or damage
+-- (including loss of data, profits, goodwill, or any type of
+-- loss or damage suffered as a result of any action brought
+-- by a third party) even if such damage or loss was
+-- reasonably foreseeable or Xilinx had been advised of the
+-- possibility of the same.
+--
+-- CRITICAL APPLICATIONS
+-- Xilinx products are not designed or intended to be fail-
+-- safe, or for use in any application requiring fail-safe
+-- performance, such as life-support or safety devices or
+-- systems, Class III medical devices, nuclear facilities,
+-- applications related to the deployment of airbags, or any
+-- other applications that could lead to death, personal
+-- injury, or severe property or environmental damage
+-- (individually and collectively, "Critical
+-- Applications"). Customer assumes the sole risk and
+-- liability of any use of Xilinx products in Critical
+-- Applications, subject only to applicable laws and
+-- regulations governing limitations on product liability.
+--
+-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
+-- PART OF THIS FILE AT ALL TIMES.
+--
+------------------------------------------------------------------------------
+-- User entered comments
+------------------------------------------------------------------------------
+-- None
+--
+------------------------------------------------------------------------------
+-- Output Output Phase Duty Cycle Pk-to-Pk Phase
+-- Clock Freq (MHz) (degrees) (%) Jitter (ps) Error (ps)
+------------------------------------------------------------------------------
+-- CLK_OUT1___100.000______0.000______50.0______151.366____132.063
+-- CLK_OUT2___200.000______0.000______50.0______132.221____132.063
+-- CLK_OUT3____12.000______0.000______50.0______231.952____132.063
+-- CLK_OUT4____50.000______0.000______50.0______174.353____132.063
+--
+------------------------------------------------------------------------------
+-- Input Clock Freq (MHz) Input Jitter (UI)
+------------------------------------------------------------------------------
+-- __primary_________100.000____________0.010
+
+
+-- The following code must appear in the VHDL architecture header:
+------------- Begin Cut here for COMPONENT Declaration ------ COMP_TAG
+component clk_wiz_0
+port
+ (-- Clock in ports
+ clk_in1 : in std_logic;
+ -- Clock out ports
+ clk_out1 : out std_logic;
+ clk_out2 : out std_logic;
+ clk_out3 : out std_logic;
+ clk_out4 : out std_logic;
+ -- Status and control signals
+ reset : in std_logic;
+ locked : out std_logic
+ );
+end component;
+
+-- COMP_TAG_END ------ End COMPONENT Declaration ------------
+-- The following code must appear in the VHDL architecture
+-- body. Substitute your own instance name and net names.
+------------- Begin Cut here for INSTANTIATION Template ----- INST_TAG
+your_instance_name : clk_wiz_0
+ port map (
+
+ -- Clock in ports
+ clk_in1 => clk_in1,
+ -- Clock out ports
+ clk_out1 => clk_out1,
+ clk_out2 => clk_out2,
+ clk_out3 => clk_out3,
+ clk_out4 => clk_out4,
+ -- Status and control signals
+ reset => reset,
+ locked => locked
+ );
+-- INST_TAG_END ------ End INSTANTIATION Template ------------
diff --git a/proj/AudioProc.runs/.jobs/vrs_config_1.xml b/proj/AudioProc.runs/.jobs/vrs_config_1.xml
new file mode 100644
index 0000000000000000000000000000000000000000..0f282cfca228696809b58cca857391edc9fa4ce3
--- /dev/null
+++ b/proj/AudioProc.runs/.jobs/vrs_config_1.xml
@@ -0,0 +1,15 @@
+<?xml version="1.0"?>
+<Runs Version="1" Minor="0">
+ <Run Id="synth_1" LaunchDir="/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.runs/synth_1" FlowId="Vivado_Synthesis" FromStepId="vivado" ToStepId="vivado"/>
+ <Run Id="impl_1" LaunchDir="/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.runs/impl_1" FlowId="Vivado_Implementation" FromStepId="init_design" ToStepId="write_bitstream">
+ <Parent Id="synth_1"/>
+ </Run>
+ <Parameters>
+ <Parameter Name="runs.monitorLSFJobs" Val="true" Type="bool"/>
+ <Parameter Name="runs.enableClusterConf" Val="true" Type="bool"/>
+ <Parameter Name="general.ignorePathLengthChecks" Val="true" Type="bool"/>
+ <Parameter Name="general.shortenLongPath" Val="true" Type="bool"/>
+ </Parameters>
+ <ProductInfo Name="vivado"/>
+</Runs>
+
diff --git a/proj/AudioProc.runs/impl_1/.Vivado_Implementation.queue.rst b/proj/AudioProc.runs/impl_1/.Vivado_Implementation.queue.rst
new file mode 100644
index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391
diff --git a/proj/AudioProc.runs/impl_1/.init_design.begin.rst b/proj/AudioProc.runs/impl_1/.init_design.begin.rst
new file mode 100644
index 0000000000000000000000000000000000000000..2858507ac777eb902d56bdbd761a321a404e03d9
--- /dev/null
+++ b/proj/AudioProc.runs/impl_1/.init_design.begin.rst
@@ -0,0 +1,5 @@
+<?xml version="1.0"?>
+<ProcessHandle Version="1" Minor="0">
+ <Process Command=".planAhead." Owner="l24nicot" Host="" Pid="112122">
+ </Process>
+</ProcessHandle>
diff --git a/proj/AudioProc.runs/impl_1/.init_design.end.rst b/proj/AudioProc.runs/impl_1/.init_design.end.rst
new file mode 100644
index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391
diff --git a/proj/AudioProc.runs/impl_1/.opt_design.begin.rst b/proj/AudioProc.runs/impl_1/.opt_design.begin.rst
new file mode 100644
index 0000000000000000000000000000000000000000..2858507ac777eb902d56bdbd761a321a404e03d9
--- /dev/null
+++ b/proj/AudioProc.runs/impl_1/.opt_design.begin.rst
@@ -0,0 +1,5 @@
+<?xml version="1.0"?>
+<ProcessHandle Version="1" Minor="0">
+ <Process Command=".planAhead." Owner="l24nicot" Host="" Pid="112122">
+ </Process>
+</ProcessHandle>
diff --git a/proj/AudioProc.runs/impl_1/.opt_design.end.rst b/proj/AudioProc.runs/impl_1/.opt_design.end.rst
new file mode 100644
index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391
diff --git a/proj/AudioProc.runs/impl_1/.place_design.begin.rst b/proj/AudioProc.runs/impl_1/.place_design.begin.rst
new file mode 100644
index 0000000000000000000000000000000000000000..2858507ac777eb902d56bdbd761a321a404e03d9
--- /dev/null
+++ b/proj/AudioProc.runs/impl_1/.place_design.begin.rst
@@ -0,0 +1,5 @@
+<?xml version="1.0"?>
+<ProcessHandle Version="1" Minor="0">
+ <Process Command=".planAhead." Owner="l24nicot" Host="" Pid="112122">
+ </Process>
+</ProcessHandle>
diff --git a/proj/AudioProc.runs/impl_1/.place_design.error.rst b/proj/AudioProc.runs/impl_1/.place_design.error.rst
new file mode 100644
index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391
diff --git a/proj/AudioProc.runs/impl_1/.vivado.begin.rst b/proj/AudioProc.runs/impl_1/.vivado.begin.rst
new file mode 100644
index 0000000000000000000000000000000000000000..553e3af917585a1de4496b4c0074928e4d29247d
--- /dev/null
+++ b/proj/AudioProc.runs/impl_1/.vivado.begin.rst
@@ -0,0 +1,5 @@
+<?xml version="1.0"?>
+<ProcessHandle Version="1" Minor="0">
+ <Process Command="vivado" Owner="l24nicot" Host="fl-tp-br-515" Pid="112051" HostCore="12" HostMemory="16146436">
+ </Process>
+</ProcessHandle>
diff --git a/proj/AudioProc.runs/impl_1/.vivado.error.rst b/proj/AudioProc.runs/impl_1/.vivado.error.rst
new file mode 100644
index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391
diff --git a/proj/AudioProc.runs/impl_1/ISEWrap.js b/proj/AudioProc.runs/impl_1/ISEWrap.js
new file mode 100755
index 0000000000000000000000000000000000000000..61806d02710bd275f7cfe41a9d52914e7a1e63df
--- /dev/null
+++ b/proj/AudioProc.runs/impl_1/ISEWrap.js
@@ -0,0 +1,270 @@
+//
+// Vivado(TM)
+// ISEWrap.js: Vivado Runs Script for WSH 5.1/5.6
+// Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+// Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
+//
+
+// GLOBAL VARIABLES
+var ISEShell = new ActiveXObject( "WScript.Shell" );
+var ISEFileSys = new ActiveXObject( "Scripting.FileSystemObject" );
+var ISERunDir = "";
+var ISELogFile = "runme.log";
+var ISELogFileStr = null;
+var ISELogEcho = true;
+var ISEOldVersionWSH = false;
+
+
+
+// BOOTSTRAP
+ISEInit();
+
+
+
+//
+// ISE FUNCTIONS
+//
+function ISEInit() {
+
+ // 1. RUN DIR setup
+ var ISEScrFP = WScript.ScriptFullName;
+ var ISEScrN = WScript.ScriptName;
+ ISERunDir =
+ ISEScrFP.substr( 0, ISEScrFP.length - ISEScrN.length - 1 );
+
+ // 2. LOG file setup
+ ISELogFileStr = ISEOpenFile( ISELogFile );
+
+ // 3. LOG echo?
+ var ISEScriptArgs = WScript.Arguments;
+ for ( var loopi=0; loopi<ISEScriptArgs.length; loopi++ ) {
+ if ( ISEScriptArgs(loopi) == "-quiet" ) {
+ ISELogEcho = false;
+ break;
+ }
+ }
+
+ // 4. WSH version check
+ var ISEOptimalVersionWSH = 5.6;
+ var ISECurrentVersionWSH = WScript.Version;
+ if ( ISECurrentVersionWSH < ISEOptimalVersionWSH ) {
+
+ ISEStdErr( "" );
+ ISEStdErr( "Warning: ExploreAhead works best with Microsoft WSH " +
+ ISEOptimalVersionWSH + " or higher. Downloads" );
+ ISEStdErr( " for upgrading your Windows Scripting Host can be found here: " );
+ ISEStdErr( " http://msdn.microsoft.com/downloads/list/webdev.asp" );
+ ISEStdErr( "" );
+
+ ISEOldVersionWSH = true;
+ }
+
+}
+
+function ISEStep( ISEProg, ISEArgs ) {
+
+ // CHECK for a STOP FILE
+ if ( ISEFileSys.FileExists(ISERunDir + "/.stop.rst") ) {
+ ISEStdErr( "" );
+ ISEStdErr( "*** Halting run - EA reset detected ***" );
+ ISEStdErr( "" );
+ WScript.Quit( 1 );
+ }
+
+ // WRITE STEP HEADER to LOG
+ ISEStdOut( "" );
+ ISEStdOut( "*** Running " + ISEProg );
+ ISEStdOut( " with args " + ISEArgs );
+ ISEStdOut( "" );
+
+ // LAUNCH!
+ var ISEExitCode = ISEExec( ISEProg, ISEArgs );
+ if ( ISEExitCode != 0 ) {
+ WScript.Quit( ISEExitCode );
+ }
+
+}
+
+function ISEExec( ISEProg, ISEArgs ) {
+
+ var ISEStep = ISEProg;
+ if (ISEProg == "realTimeFpga" || ISEProg == "planAhead" || ISEProg == "vivado") {
+ ISEProg += ".bat";
+ }
+
+ var ISECmdLine = ISEProg + " " + ISEArgs;
+ var ISEExitCode = 1;
+
+ if ( ISEOldVersionWSH ) { // WSH 5.1
+
+ // BEGIN file creation
+ ISETouchFile( ISEStep, "begin" );
+
+ // LAUNCH!
+ ISELogFileStr.Close();
+ ISECmdLine =
+ "%comspec% /c " + ISECmdLine + " >> " + ISELogFile + " 2>&1";
+ ISEExitCode = ISEShell.Run( ISECmdLine, 0, true );
+ ISELogFileStr = ISEOpenFile( ISELogFile );
+
+ } else { // WSH 5.6
+
+ // LAUNCH!
+ ISEShell.CurrentDirectory = ISERunDir;
+
+ // Redirect STDERR to STDOUT
+ ISECmdLine = "%comspec% /c " + ISECmdLine + " 2>&1";
+ var ISEProcess = ISEShell.Exec( ISECmdLine );
+
+ // BEGIN file creation
+ var wbemFlagReturnImmediately = 0x10;
+ var wbemFlagForwardOnly = 0x20;
+ var objWMIService = GetObject ("winmgmts:{impersonationLevel=impersonate, (Systemtime)}!//./root/cimv2");
+ var processor = objWMIService.ExecQuery("SELECT * FROM Win32_Processor", "WQL",wbemFlagReturnImmediately | wbemFlagForwardOnly);
+ var computerSystem = objWMIService.ExecQuery("SELECT * FROM Win32_ComputerSystem", "WQL", wbemFlagReturnImmediately | wbemFlagForwardOnly);
+ var NOC = 0;
+ var NOLP = 0;
+ var TPM = 0;
+ var cpuInfos = new Enumerator(processor);
+ for(;!cpuInfos.atEnd(); cpuInfos.moveNext()) {
+ var cpuInfo = cpuInfos.item();
+ NOC += cpuInfo.NumberOfCores;
+ NOLP += cpuInfo.NumberOfLogicalProcessors;
+ }
+ var csInfos = new Enumerator(computerSystem);
+ for(;!csInfos.atEnd(); csInfos.moveNext()) {
+ var csInfo = csInfos.item();
+ TPM += csInfo.TotalPhysicalMemory;
+ }
+
+ var ISEHOSTCORE = NOLP
+ var ISEMEMTOTAL = TPM
+
+ var ISENetwork = WScript.CreateObject( "WScript.Network" );
+ var ISEHost = ISENetwork.ComputerName;
+ var ISEUser = ISENetwork.UserName;
+ var ISEPid = ISEProcess.ProcessID;
+ var ISEBeginFile = ISEOpenFile( "." + ISEStep + ".begin.rst" );
+ ISEBeginFile.WriteLine( "<?xml version=\"1.0\"?>" );
+ ISEBeginFile.WriteLine( "<ProcessHandle Version=\"1\" Minor=\"0\">" );
+ ISEBeginFile.WriteLine( " <Process Command=\"" + ISEProg +
+ "\" Owner=\"" + ISEUser +
+ "\" Host=\"" + ISEHost +
+ "\" Pid=\"" + ISEPid +
+ "\" HostCore=\"" + ISEHOSTCORE +
+ "\" HostMemory=\"" + ISEMEMTOTAL +
+ "\">" );
+ ISEBeginFile.WriteLine( " </Process>" );
+ ISEBeginFile.WriteLine( "</ProcessHandle>" );
+ ISEBeginFile.Close();
+
+ var ISEOutStr = ISEProcess.StdOut;
+ var ISEErrStr = ISEProcess.StdErr;
+
+ // WAIT for ISEStep to finish
+ while ( ISEProcess.Status == 0 ) {
+
+ // dump stdout then stderr - feels a little arbitrary
+ while ( !ISEOutStr.AtEndOfStream ) {
+ ISEStdOut( ISEOutStr.ReadLine() );
+ }
+
+ WScript.Sleep( 100 );
+ }
+
+ ISEExitCode = ISEProcess.ExitCode;
+ }
+
+ ISELogFileStr.Close();
+
+ // END/ERROR file creation
+ if ( ISEExitCode != 0 ) {
+ ISETouchFile( ISEStep, "error" );
+
+ } else {
+ ISETouchFile( ISEStep, "end" );
+ }
+
+ return ISEExitCode;
+}
+
+
+//
+// UTILITIES
+//
+function ISEStdOut( ISELine ) {
+
+ ISELogFileStr.WriteLine( ISELine );
+
+ if ( ISELogEcho ) {
+ WScript.StdOut.WriteLine( ISELine );
+ }
+}
+
+function ISEStdErr( ISELine ) {
+
+ ISELogFileStr.WriteLine( ISELine );
+
+ if ( ISELogEcho ) {
+ WScript.StdErr.WriteLine( ISELine );
+ }
+}
+
+function ISETouchFile( ISERoot, ISEStatus ) {
+
+ var ISETFile =
+ ISEOpenFile( "." + ISERoot + "." + ISEStatus + ".rst" );
+ ISETFile.Close();
+}
+
+function ISEOpenFile( ISEFilename ) {
+
+ // This function has been updated to deal with a problem seen in CR #870871.
+ // In that case the user runs a script that runs impl_1, and then turns around
+ // and runs impl_1 -to_step write_bitstream. That second run takes place in
+ // the same directory, which means we may hit some of the same files, and in
+ // particular, we will open the runme.log file. Even though this script closes
+ // the file (now), we see cases where a subsequent attempt to open the file
+ // fails. Perhaps the OS is slow to release the lock, or the disk comes into
+ // play? In any case, we try to work around this by first waiting if the file
+ // is already there for an arbitrary 5 seconds. Then we use a try-catch block
+ // and try to open the file 10 times with a one second delay after each attempt.
+ // Again, 10 is arbitrary. But these seem to stop the hang in CR #870871.
+ // If there is an unrecognized exception when trying to open the file, we output
+ // an error message and write details to an exception.log file.
+ var ISEFullPath = ISERunDir + "/" + ISEFilename;
+ if (ISEFileSys.FileExists(ISEFullPath)) {
+ // File is already there. This could be a problem. Wait in case it is still in use.
+ WScript.Sleep(5000);
+ }
+ var i;
+ for (i = 0; i < 10; ++i) {
+ try {
+ return ISEFileSys.OpenTextFile(ISEFullPath, 8, true);
+ } catch (exception) {
+ var error_code = exception.number & 0xFFFF; // The other bits are a facility code.
+ if (error_code == 52) { // 52 is bad file name or number.
+ // Wait a second and try again.
+ WScript.Sleep(1000);
+ continue;
+ } else {
+ WScript.StdErr.WriteLine("ERROR: Exception caught trying to open file " + ISEFullPath);
+ var exceptionFilePath = ISERunDir + "/exception.log";
+ if (!ISEFileSys.FileExists(exceptionFilePath)) {
+ WScript.StdErr.WriteLine("See file " + exceptionFilePath + " for details.");
+ var exceptionFile = ISEFileSys.OpenTextFile(exceptionFilePath, 8, true);
+ exceptionFile.WriteLine("ERROR: Exception caught trying to open file " + ISEFullPath);
+ exceptionFile.WriteLine("\tException name: " + exception.name);
+ exceptionFile.WriteLine("\tException error code: " + error_code);
+ exceptionFile.WriteLine("\tException message: " + exception.message);
+ exceptionFile.Close();
+ }
+ throw exception;
+ }
+ }
+ }
+ // If we reached this point, we failed to open the file after 10 attempts.
+ // We need to error out.
+ WScript.StdErr.WriteLine("ERROR: Failed to open file " + ISEFullPath);
+ WScript.Quit(1);
+}
diff --git a/proj/AudioProc.runs/impl_1/ISEWrap.sh b/proj/AudioProc.runs/impl_1/ISEWrap.sh
new file mode 100755
index 0000000000000000000000000000000000000000..05d5381379bf87abb6918978ce23d53b6a3e9a78
--- /dev/null
+++ b/proj/AudioProc.runs/impl_1/ISEWrap.sh
@@ -0,0 +1,85 @@
+#!/bin/sh
+
+#
+# Vivado(TM)
+# ISEWrap.sh: Vivado Runs Script for UNIX
+# Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+# Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
+#
+
+cmd_exists()
+{
+ command -v "$1" >/dev/null 2>&1
+}
+
+HD_LOG=$1
+shift
+
+# CHECK for a STOP FILE
+if [ -f .stop.rst ]
+then
+echo "" >> $HD_LOG
+echo "*** Halting run - EA reset detected ***" >> $HD_LOG
+echo "" >> $HD_LOG
+exit 1
+fi
+
+ISE_STEP=$1
+shift
+
+# WRITE STEP HEADER to LOG
+echo "" >> $HD_LOG
+echo "*** Running $ISE_STEP" >> $HD_LOG
+echo " with args $@" >> $HD_LOG
+echo "" >> $HD_LOG
+
+# LAUNCH!
+$ISE_STEP "$@" >> $HD_LOG 2>&1 &
+
+# BEGIN file creation
+ISE_PID=$!
+
+HostNameFile=/proc/sys/kernel/hostname
+if cmd_exists hostname
+then
+ISE_HOST=$(hostname)
+elif cmd_exists uname
+then
+ISE_HOST=$(uname -n)
+elif [ -f "$HostNameFile" ] && [ -r $HostNameFile ] && [ -s $HostNameFile ]
+then
+ISE_HOST=$(cat $HostNameFile)
+elif [ X != X$HOSTNAME ]
+then
+ISE_HOST=$HOSTNAME #bash
+else
+ISE_HOST=$HOST #csh
+fi
+
+ISE_USER=$USER
+
+ISE_HOSTCORE=$(awk '/^processor/{print $3}' /proc/cpuinfo | wc -l)
+ISE_MEMTOTAL=$(awk '/MemTotal/ {print $2}' /proc/meminfo)
+
+ISE_BEGINFILE=.$ISE_STEP.begin.rst
+/bin/touch $ISE_BEGINFILE
+echo "<?xml version=\"1.0\"?>" >> $ISE_BEGINFILE
+echo "<ProcessHandle Version=\"1\" Minor=\"0\">" >> $ISE_BEGINFILE
+echo " <Process Command=\"$ISE_STEP\" Owner=\"$ISE_USER\" Host=\"$ISE_HOST\" Pid=\"$ISE_PID\" HostCore=\"$ISE_HOSTCORE\" HostMemory=\"$ISE_MEMTOTAL\">" >> $ISE_BEGINFILE
+echo " </Process>" >> $ISE_BEGINFILE
+echo "</ProcessHandle>" >> $ISE_BEGINFILE
+
+# WAIT for ISEStep to finish
+wait $ISE_PID
+
+# END/ERROR file creation
+RETVAL=$?
+if [ $RETVAL -eq 0 ]
+then
+ /bin/touch .$ISE_STEP.end.rst
+else
+ /bin/touch .$ISE_STEP.error.rst
+fi
+
+exit $RETVAL
+
diff --git a/proj/AudioProc.runs/impl_1/gen_run.xml b/proj/AudioProc.runs/impl_1/gen_run.xml
new file mode 100644
index 0000000000000000000000000000000000000000..fd1fe219e54ab56ad16c9d3d9065f8c5bcc87c5e
--- /dev/null
+++ b/proj/AudioProc.runs/impl_1/gen_run.xml
@@ -0,0 +1,213 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<GenRun Id="impl_1" LaunchPart="xc7a200tsbg484-1" LaunchTime="1746799386">
+ <File Type="ROUTE-RQS-RPT" Name="route_report_qor_suggestions_0.rpt"/>
+ <File Type="POSTROUTE-PHYSOPT-RQS" Name="tb_firUnit_postroute_physopted.rqs"/>
+ <File Type="ROUTE-RQS" Name="tb_firUnit_routed.rqs"/>
+ <File Type="WBT-USG" Name="usage_statistics_webtalk.html"/>
+ <File Type="BG-BGN" Name="tb_firUnit.bgn"/>
+ <File Type="BITSTR-SYSDEF" Name="tb_firUnit.sysdef"/>
+ <File Type="BITSTR-LTX" Name="debug_nets.ltx"/>
+ <File Type="BITSTR-LTX" Name="tb_firUnit.ltx"/>
+ <File Type="RBD_FILE" Name="tb_firUnit.rbd"/>
+ <File Type="NPI_FILE" Name="tb_firUnit.npi"/>
+ <File Type="RNPI_FILE" Name="tb_firUnit.rnpi"/>
+ <File Type="CFI_FILE" Name="tb_firUnit.cfi"/>
+ <File Type="RCFI_FILE" Name="tb_firUnit.rcfi"/>
+ <File Type="PL-PDI-FILE" Name="tb_firUnit_pld.pdi"/>
+ <File Type="BOOT-PDI-FILE" Name="tb_firUnit_boot.pdi"/>
+ <File Type="RDI-RDI" Name="tb_firUnit.vdi"/>
+ <File Type="PDI-FILE" Name="tb_firUnit.pdi"/>
+ <File Type="BITSTR-MMI" Name="tb_firUnit.mmi"/>
+ <File Type="BITSTR-BMM" Name="tb_firUnit_bd.bmm"/>
+ <File Type="BITSTR-NKY" Name="tb_firUnit.nky"/>
+ <File Type="BITSTR-RBT" Name="tb_firUnit.rbt"/>
+ <File Type="BITSTR-MSK" Name="tb_firUnit.msk"/>
+ <File Type="BG-BIN" Name="tb_firUnit.bin"/>
+ <File Type="POSTROUTE-PHYSOPT-RQS-RPT" Name="postroute_physopt_report_qor_suggestions_0.rpt"/>
+ <File Type="BG-BIT" Name="tb_firUnit.bit"/>
+ <File Type="POSTROUTE-PHYSOPT-BUS-SKEW-RPX" Name="tb_firUnit_bus_skew_postroute_physopted.rpx"/>
+ <File Type="POSTROUTE-PHYSOPT-BUS-SKEW-PB" Name="tb_firUnit_bus_skew_postroute_physopted.pb"/>
+ <File Type="POSTROUTE-PHYSOPT-BUS-SKEW" Name="tb_firUnit_bus_skew_postroute_physopted.rpt"/>
+ <File Type="POSTROUTE-PHYSOPT-TIMING-RPX" Name="tb_firUnit_timing_summary_postroute_physopted.rpx"/>
+ <File Type="POSTROUTE-PHYSOPT-TIMING-PB" Name="tb_firUnit_timing_summary_postroute_physopted.pb"/>
+ <File Type="POSTROUTE-PHYSOPT-TIMING" Name="tb_firUnit_timing_summary_postroute_physopted.rpt"/>
+ <File Type="POSTROUTE-PHYSOPT-BLACKBOX-DCP" Name="tb_firUnit_postroute_physopt_bb.dcp"/>
+ <File Type="POSTROUTE-PHYSOPT-DCP" Name="tb_firUnit_postroute_physopt.dcp"/>
+ <File Type="BG-DRC" Name="tb_firUnit.drc"/>
+ <File Type="ROUTE-RQS-PB" Name="tb_firUnit_rqs_routed.pb"/>
+ <File Type="ROUTE-BUS-SKEW-RPX" Name="tb_firUnit_bus_skew_routed.rpx"/>
+ <File Type="ROUTE-BUS-SKEW-PB" Name="tb_firUnit_bus_skew_routed.pb"/>
+ <File Type="ROUTE-BUS-SKEW" Name="tb_firUnit_bus_skew_routed.rpt"/>
+ <File Type="PLACE-UTIL-PB" Name="tb_firUnit_utilization_placed.pb"/>
+ <File Type="OPT-METHODOLOGY-DRC" Name="tb_firUnit_methodology_drc_opted.rpt"/>
+ <File Type="PLACE-UTIL" Name="tb_firUnit_utilization_placed.rpt"/>
+ <File Type="PLACE-CLK" Name="tb_firUnit_clock_utilization_placed.rpt"/>
+ <File Type="PLACE-IO" Name="tb_firUnit_io_placed.rpt"/>
+ <File Type="PHYSOPT-TIMING" Name="tb_firUnit_timing_summary_physopted.rpt"/>
+ <File Type="PWROPT-DRC" Name="tb_firUnit_drc_pwropted.rpt"/>
+ <File Type="PWROPT-TIMING" Name="tb_firUnit_timing_summary_pwropted.rpt"/>
+ <File Type="OPT-DRC" Name="tb_firUnit_drc_opted.rpt"/>
+ <File Type="PLACE-TIMING" Name="tb_firUnit_timing_summary_placed.rpt"/>
+ <File Type="INIT-TIMING" Name="tb_firUnit_timing_summary_init.rpt"/>
+ <File Type="PA-TCL" Name="tb_firUnit.tcl"/>
+ <File Type="PLACE-CTRL" Name="tb_firUnit_control_sets_placed.rpt"/>
+ <File Type="ROUTE-METHODOLOGY-DRC" Name="tb_firUnit_methodology_drc_routed.rpt"/>
+ <File Type="OPT-DCP" Name="tb_firUnit_opt.dcp"/>
+ <File Type="OPT-RQA-PB" Name="tb_firUnit_rqa_opted.pb"/>
+ <File Type="OPT-HWDEF" Name="tb_firUnit.hwdef"/>
+ <File Type="POSTPLACE-PWROPT-TIMING" Name="tb_firUnit_timing_summary_postplace_pwropted.rpt"/>
+ <File Type="REPORTS-TCL" Name="tb_firUnit_reports.tcl"/>
+ <File Type="OPT-TIMING" Name="tb_firUnit_timing_summary_opted.rpt"/>
+ <File Type="PLACE-SIMILARITY" Name="tb_firUnit_incremental_reuse_placed.rpt"/>
+ <File Type="ROUTE-METHODOLOGY-DRC-PB" Name="tb_firUnit_methodology_drc_routed.pb"/>
+ <File Type="PLACE-DCP" Name="tb_firUnit_placed.dcp"/>
+ <File Type="PLACE-RQA-PB" Name="tb_firUnit_rqa_placed.pb"/>
+ <File Type="PLACE-PRE-SIMILARITY" Name="tb_firUnit_incremental_reuse_pre_placed.rpt"/>
+ <File Type="ROUTE-DRC-RPX" Name="tb_firUnit_drc_routed.rpx"/>
+ <File Type="PWROPT-DCP" Name="tb_firUnit_pwropt.dcp"/>
+ <File Type="POSTPLACE-PWROPT-DCP" Name="tb_firUnit_postplace_pwropt.dcp"/>
+ <File Type="PHYSOPT-DCP" Name="tb_firUnit_physopt.dcp"/>
+ <File Type="PHYSOPT-DRC" Name="tb_firUnit_drc_physopted.rpt"/>
+ <File Type="ROUTE-ERROR-DCP" Name="tb_firUnit_routed_error.dcp"/>
+ <File Type="ROUTE-DCP" Name="tb_firUnit_routed.dcp"/>
+ <File Type="ROUTE-BLACKBOX-DCP" Name="tb_firUnit_routed_bb.dcp"/>
+ <File Type="ROUTE-DRC" Name="tb_firUnit_drc_routed.rpt"/>
+ <File Type="ROUTE-METHODOLOGY-DRC-RPX" Name="tb_firUnit_methodology_drc_routed.rpx"/>
+ <File Type="ROUTE-DRC-PB" Name="tb_firUnit_drc_routed.pb"/>
+ <File Type="ROUTE-PWR" Name="tb_firUnit_power_routed.rpt"/>
+ <File Type="ROUTE-PWR-SUM" Name="tb_firUnit_power_summary_routed.pb"/>
+ <File Type="ROUTE-PWR-RPX" Name="tb_firUnit_power_routed.rpx"/>
+ <File Type="ROUTE-STATUS" Name="tb_firUnit_route_status.rpt"/>
+ <File Type="ROUTE-STATUS-PB" Name="tb_firUnit_route_status.pb"/>
+ <File Type="ROUTE-TIMINGSUMMARY" Name="tb_firUnit_timing_summary_routed.rpt"/>
+ <File Type="ROUTE-TIMING-PB" Name="tb_firUnit_timing_summary_routed.pb"/>
+ <File Type="ROUTE-TIMING-RPX" Name="tb_firUnit_timing_summary_routed.rpx"/>
+ <File Type="ROUTE-SIMILARITY" Name="tb_firUnit_incremental_reuse_routed.rpt"/>
+ <File Type="ROUTE-CLK" Name="tb_firUnit_clock_utilization_routed.rpt"/>
+ <FileSet Name="sources" Type="DesignSrcs" RelSrcDir="$PSRCDIR/sources_1" RelGenDir="$PGENDIR/sources_1">
+ <Filter Type="Srcs"/>
+ <File Path="$PPRDIR/../src/hdl/operativeUnit.v">
+ <FileInfo>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="implementation"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/controlUnit.vhd">
+ <FileInfo>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/firUnit.vhd">
+ <FileInfo>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/tb_firUnit.vhd">
+ <FileInfo>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/ip/clk_wiz_0/clk_wiz_0.xci">
+ <FileInfo>
+ <Attr Name="AutoDisabled" Val="1"/>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="implementation"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/audio_init.v">
+ <FileInfo>
+ <Attr Name="AutoDisabled" Val="1"/>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="implementation"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/debounce.v">
+ <FileInfo>
+ <Attr Name="AutoDisabled" Val="1"/>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="implementation"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/TWICtl.vhd">
+ <FileInfo>
+ <Attr Name="AutoDisabled" Val="1"/>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/fir.vhd">
+ <FileInfo>
+ <Attr Name="AutoDisabled" Val="1"/>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/i2s_ctl.vhd">
+ <FileInfo>
+ <Attr Name="AutoDisabled" Val="1"/>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/audioProc.v">
+ <FileInfo>
+ <Attr Name="AutoDisabled" Val="1"/>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="implementation"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/operativeUnit.vhd">
+ <FileInfo>
+ <Attr Name="UserDisabled" Val="1"/>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <Config>
+ <Option Name="DesignMode" Val="RTL"/>
+ <Option Name="TopModule" Val="tb_firUnit"/>
+ </Config>
+ </FileSet>
+ <FileSet Name="constrs_in" Type="Constrs" RelSrcDir="$PSRCDIR/constrs_1" RelGenDir="$PGENDIR/constrs_1">
+ <Filter Type="Constrs"/>
+ <File Path="$PPRDIR/../src/constraints/NexysVideo_Master.xdc">
+ <FileInfo>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="implementation"/>
+ </FileInfo>
+ </File>
+ <Config>
+ <Option Name="ConstrsType" Val="XDC"/>
+ </Config>
+ </FileSet>
+ <FileSet Name="utils" Type="Utils" RelSrcDir="$PSRCDIR/utils_1" RelGenDir="$PGENDIR/utils_1">
+ <Filter Type="Utils"/>
+ <Config>
+ <Option Name="TopAutoSet" Val="TRUE"/>
+ </Config>
+ </FileSet>
+ <Strategy Version="1" Minor="2">
+ <StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2014">
+ <Desc>Vivado Implementation Defaults</Desc>
+ </StratHandle>
+ <Step Id="init_design"/>
+ <Step Id="opt_design"/>
+ <Step Id="power_opt_design"/>
+ <Step Id="place_design"/>
+ <Step Id="post_place_power_opt_design"/>
+ <Step Id="phys_opt_design"/>
+ <Step Id="route_design"/>
+ <Step Id="post_route_phys_opt_design"/>
+ <Step Id="write_bitstream">
+ <Option Id="BinFile">1</Option>
+ </Step>
+ </Strategy>
+</GenRun>
diff --git a/proj/AudioProc.runs/impl_1/htr.txt b/proj/AudioProc.runs/impl_1/htr.txt
new file mode 100644
index 0000000000000000000000000000000000000000..66abc0f5d9c620d1fe5be00be176e64cc577d755
--- /dev/null
+++ b/proj/AudioProc.runs/impl_1/htr.txt
@@ -0,0 +1,10 @@
+#
+# Vivado(TM)
+# htr.txt: a Vivado-generated description of how-to-repeat the
+# the basic steps of a run. Note that runme.bat/sh needs
+# to be invoked for Vivado to track run status.
+# Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+# Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
+#
+
+vivado -log tb_firUnit.vdi -applog -m64 -product Vivado -messageDb vivado.pb -mode batch -source tb_firUnit.tcl -notrace
diff --git a/proj/AudioProc.runs/impl_1/init_design.pb b/proj/AudioProc.runs/impl_1/init_design.pb
new file mode 100644
index 0000000000000000000000000000000000000000..571ad1caa943e5395e7af6eace20c32dfdb8ca76
Binary files /dev/null and b/proj/AudioProc.runs/impl_1/init_design.pb differ
diff --git a/proj/AudioProc.runs/impl_1/opt_design.pb b/proj/AudioProc.runs/impl_1/opt_design.pb
new file mode 100644
index 0000000000000000000000000000000000000000..3cae5c2042c7a3e09cd743dac70a75566073dee9
Binary files /dev/null and b/proj/AudioProc.runs/impl_1/opt_design.pb differ
diff --git a/proj/AudioProc.runs/impl_1/place_design.pb b/proj/AudioProc.runs/impl_1/place_design.pb
new file mode 100644
index 0000000000000000000000000000000000000000..738422c003fdb4610d67e8106251e732100031e9
Binary files /dev/null and b/proj/AudioProc.runs/impl_1/place_design.pb differ
diff --git a/proj/AudioProc.runs/impl_1/project.wdf b/proj/AudioProc.runs/impl_1/project.wdf
new file mode 100644
index 0000000000000000000000000000000000000000..a86424715410d5e74f29256047fa2db66c5c0021
--- /dev/null
+++ b/proj/AudioProc.runs/impl_1/project.wdf
@@ -0,0 +1,31 @@
+version:1
+70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:737263736574636f756e74:3132:00:00
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+5f5f48494444454e5f5f:5f5f48494444454e5f5f:50726f6a65637455554944:3661346466313732396165393434316161366364373034663438313832636337:506172656e742050412070726f6a656374204944:00
+eof:3846490189
diff --git a/proj/AudioProc.runs/impl_1/rundef.js b/proj/AudioProc.runs/impl_1/rundef.js
new file mode 100644
index 0000000000000000000000000000000000000000..975782da9dcb895440ce957e0c69ea0eb032845b
--- /dev/null
+++ b/proj/AudioProc.runs/impl_1/rundef.js
@@ -0,0 +1,45 @@
+//
+// Vivado(TM)
+// rundef.js: a Vivado-generated Runs Script for WSH 5.1/5.6
+// Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+// Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
+//
+
+echo "This script was generated under a different operating system."
+echo "Please update the PATH variable below, before executing this script"
+exit
+
+var WshShell = new ActiveXObject( "WScript.Shell" );
+var ProcEnv = WshShell.Environment( "Process" );
+var PathVal = ProcEnv("PATH");
+if ( PathVal.length == 0 ) {
+ PathVal = "/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vitis/2024.1/bin:/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/ids_lite/ISE/bin/lin64;/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/bin;";
+} else {
+ PathVal = "/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vitis/2024.1/bin:/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/ids_lite/ISE/bin/lin64;/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/bin;" + PathVal;
+}
+
+ProcEnv("PATH") = PathVal;
+
+var RDScrFP = WScript.ScriptFullName;
+var RDScrN = WScript.ScriptName;
+var RDScrDir = RDScrFP.substr( 0, RDScrFP.length - RDScrN.length - 1 );
+var ISEJScriptLib = RDScrDir + "/ISEWrap.js";
+eval( EAInclude(ISEJScriptLib) );
+
+
+// pre-commands:
+ISETouchFile( "init_design", "begin" );
+ISEStep( "vivado",
+ "-log tb_firUnit.vdi -applog -m64 -product Vivado -messageDb vivado.pb -mode batch -source tb_firUnit.tcl -notrace" );
+
+
+
+
+
+function EAInclude( EAInclFilename ) {
+ var EAFso = new ActiveXObject( "Scripting.FileSystemObject" );
+ var EAInclFile = EAFso.OpenTextFile( EAInclFilename );
+ var EAIFContents = EAInclFile.ReadAll();
+ EAInclFile.Close();
+ return EAIFContents;
+}
diff --git a/proj/AudioProc.runs/impl_1/runme.bat b/proj/AudioProc.runs/impl_1/runme.bat
new file mode 100644
index 0000000000000000000000000000000000000000..637899f0be2c412b7962cc0b1c6107b95c906461
--- /dev/null
+++ b/proj/AudioProc.runs/impl_1/runme.bat
@@ -0,0 +1,12 @@
+@echo off
+
+rem Vivado (TM)
+rem runme.bat: a Vivado-generated Script
+rem Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+rem Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
+
+
+set HD_SDIR=%~dp0
+cd /d "%HD_SDIR%"
+set PATH=%SYSTEMROOT%\system32;%PATH%
+cscript /nologo /E:JScript "%HD_SDIR%\rundef.js" %*
diff --git a/proj/AudioProc.runs/impl_1/runme.log b/proj/AudioProc.runs/impl_1/runme.log
new file mode 100644
index 0000000000000000000000000000000000000000..e4b9adbd8fea94f29b36f7aa61694c5196ddcfd9
--- /dev/null
+++ b/proj/AudioProc.runs/impl_1/runme.log
@@ -0,0 +1,315 @@
+
+*** Running vivado
+ with args -log tb_firUnit.vdi -applog -m64 -product Vivado -messageDb vivado.pb -mode batch -source tb_firUnit.tcl -notrace
+
+
+****** Vivado v2024.1 (64-bit)
+ **** SW Build 5076996 on Wed May 22 18:36:09 MDT 2024
+ **** IP Build 5075265 on Wed May 22 21:45:21 MDT 2024
+ **** SharedData Build 5076995 on Wed May 22 18:29:18 MDT 2024
+ **** Start of session at: Fri May 9 16:04:45 2025
+ ** Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+ ** Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
+
+source tb_firUnit.tcl -notrace
+create_project: Time (s): cpu = 00:00:14 ; elapsed = 00:00:28 . Memory (MB): peak = 1680.586 ; gain = 325.840 ; free physical = 4615 ; free virtual = 14617
+INFO: [IP_Flow 19-234] Refreshing IP repositories
+WARNING: [IP_Flow 19-2248] Failed to load user IP repository '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/repo'; Can't find the specified path.
+If this directory should no longer be in your list of user repositories, go to the IP Settings dialog and remove it.
+INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/data/ip'.
+Command: link_design -top tb_firUnit -part xc7a200tsbg484-1
+Design is defaulting to srcset: sources_1
+Design is defaulting to constrset: constrs_1
+INFO: [Device 21-403] Loading part xc7a200tsbg484-1
+INFO: [Device 21-9227] Part: xc7a200tsbg484-1 does not have CEAM library.
+Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2080.266 ; gain = 0.000 ; free physical = 4169 ; free virtual = 14166
+INFO: [Project 1-479] Netlist was created with Vivado 2024.1
+INFO: [Project 1-570] Preparing netlist for logic optimization
+Parsing XDC File [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc]
+WARNING: [Vivado 12-584] No ports matched 'CLK100MHZ'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:8]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:8]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'led2'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:14]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:14]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'led3'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:15]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:15]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'led4'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:16]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:16]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'led5'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:17]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:17]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'led6'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:18]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:18]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'led7'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:19]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:19]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'BTNC'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:23]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:23]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'BTND'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:24]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:24]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'BTNL'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:25]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:25]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'BTNR'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:26]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:26]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'BTNU'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:27]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:27]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'rstn'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:28]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:28]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sw'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:32]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:32]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sw2'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:34]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:34]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sw3'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:35]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:35]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sw4'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:36]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:36]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sw5'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:37]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:37]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sw6'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:38]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:38]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sw7'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:39]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:39]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'ac_adc_sdata'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:91]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:91]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'ac_bclk'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:92]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:92]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'ac_dac_sdata'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:93]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:93]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'ac_lrclk'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:94]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:94]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'ac_mclk'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:95]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:95]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'scl'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:202]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:202]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sda'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:203]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:203]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+Finished Parsing XDC File [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc]
+INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
+Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2176.578 ; gain = 0.000 ; free physical = 4046 ; free virtual = 14058
+INFO: [Project 1-111] Unisim Transformation Summary:
+No Unisim elements were transformed.
+
+8 Infos, 28 Warnings, 27 Critical Warnings and 0 Errors encountered.
+link_design completed successfully
+link_design: Time (s): cpu = 00:00:05 ; elapsed = 00:00:14 . Memory (MB): peak = 2180.547 ; gain = 494.023 ; free physical = 4046 ; free virtual = 14058
+Command: opt_design
+Attempting to get a license for feature 'Implementation' and/or device 'xc7a200t'
+INFO: [Common 17-349] Got license for feature 'Implementation' and/or device 'xc7a200t'
+Running DRC as a precondition to command opt_design
+
+Starting DRC Task
+INFO: [DRC 23-27] Running DRC with 8 threads
+INFO: [Project 1-461] DRC finished with 0 Errors
+INFO: [Project 1-462] Please refer to the DRC report (report_drc) for more information.
+
+Time (s): cpu = 00:00:00.44 ; elapsed = 00:00:00.64 . Memory (MB): peak = 2259.453 ; gain = 78.906 ; free physical = 4033 ; free virtual = 14044
+
+Starting Cache Timing Information Task
+INFO: [Timing 38-35] Done setting XDC timing constraints.
+Ending Cache Timing Information Task | Checksum: b7dde4dd
+
+Time (s): cpu = 00:00:05 ; elapsed = 00:00:07 . Memory (MB): peak = 2715.445 ; gain = 455.992 ; free physical = 3596 ; free virtual = 13622
+
+Starting Logic Optimization Task
+
+Phase 1 Initialization
+
+Phase 1.1 Core Generation And Design Setup
+Phase 1.1 Core Generation And Design Setup | Checksum: b7dde4dd
+
+Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3027.281 ; gain = 0.000 ; free physical = 3291 ; free virtual = 13313
+
+Phase 1.2 Setup Constraints And Sort Netlist
+Phase 1.2 Setup Constraints And Sort Netlist | Checksum: b7dde4dd
+
+Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3027.281 ; gain = 0.000 ; free physical = 3291 ; free virtual = 13313
+Phase 1 Initialization | Checksum: b7dde4dd
+
+Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3027.281 ; gain = 0.000 ; free physical = 3291 ; free virtual = 13313
+
+Phase 2 Timer Update And Timing Data Collection
+
+Phase 2.1 Timer Update
+Phase 2.1 Timer Update | Checksum: b7dde4dd
+
+Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.01 . Memory (MB): peak = 3027.281 ; gain = 0.000 ; free physical = 3291 ; free virtual = 13313
+
+Phase 2.2 Timing Data Collection
+Phase 2.2 Timing Data Collection | Checksum: b7dde4dd
+
+Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.02 . Memory (MB): peak = 3027.281 ; gain = 0.000 ; free physical = 3291 ; free virtual = 13313
+Phase 2 Timer Update And Timing Data Collection | Checksum: b7dde4dd
+
+Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.02 . Memory (MB): peak = 3027.281 ; gain = 0.000 ; free physical = 3291 ; free virtual = 13313
+
+Phase 3 Retarget
+INFO: [Opt 31-1834] Total Chains To Be Transformed Were: 0 AND Number of Transformed insts Created are: 0
+INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
+INFO: [Opt 31-49] Retargeted 0 cell(s).
+Phase 3 Retarget | Checksum: b7dde4dd
+
+Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.02 . Memory (MB): peak = 3027.281 ; gain = 0.000 ; free physical = 3291 ; free virtual = 13313
+Retarget | Checksum: b7dde4dd
+INFO: [Opt 31-389] Phase Retarget created 0 cells and removed 0 cells
+
+Phase 4 Constant propagation
+INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
+Phase 4 Constant propagation | Checksum: b7dde4dd
+
+Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.02 . Memory (MB): peak = 3027.281 ; gain = 0.000 ; free physical = 3291 ; free virtual = 13313
+Constant propagation | Checksum: b7dde4dd
+INFO: [Opt 31-389] Phase Constant propagation created 0 cells and removed 0 cells
+
+Phase 5 Sweep
+Phase 5 Sweep | Checksum: 144339148
+
+Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.03 . Memory (MB): peak = 3027.281 ; gain = 0.000 ; free physical = 3291 ; free virtual = 13313
+Sweep | Checksum: 144339148
+INFO: [Opt 31-389] Phase Sweep created 0 cells and removed 4 cells
+
+Phase 6 BUFG optimization
+Phase 6 BUFG optimization | Checksum: 144339148
+
+Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.04 . Memory (MB): peak = 3059.297 ; gain = 32.016 ; free physical = 3291 ; free virtual = 13313
+BUFG optimization | Checksum: 144339148
+INFO: [Opt 31-662] Phase BUFG optimization created 0 cells of which 0 are BUFGs and removed 0 cells.
+
+Phase 7 Shift Register Optimization
+INFO: [Opt 31-1064] SRL Remap converted 0 SRLs to 0 registers and converted 0 registers of register chains to 0 SRLs
+Phase 7 Shift Register Optimization | Checksum: 144339148
+
+Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.04 . Memory (MB): peak = 3059.297 ; gain = 32.016 ; free physical = 3291 ; free virtual = 13313
+Shift Register Optimization | Checksum: 144339148
+INFO: [Opt 31-389] Phase Shift Register Optimization created 0 cells and removed 0 cells
+
+Phase 8 Post Processing Netlist
+Phase 8 Post Processing Netlist | Checksum: 144339148
+
+Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.04 . Memory (MB): peak = 3059.297 ; gain = 32.016 ; free physical = 3291 ; free virtual = 13313
+Post Processing Netlist | Checksum: 144339148
+INFO: [Opt 31-389] Phase Post Processing Netlist created 0 cells and removed 0 cells
+
+Phase 9 Finalization
+
+Phase 9.1 Finalizing Design Cores and Updating Shapes
+Phase 9.1 Finalizing Design Cores and Updating Shapes | Checksum: 144339148
+
+Time (s): cpu = 00:00:00.02 ; elapsed = 00:00:00.04 . Memory (MB): peak = 3059.297 ; gain = 32.016 ; free physical = 3291 ; free virtual = 13313
+
+Phase 9.2 Verifying Netlist Connectivity
+
+Starting Connectivity Check Task
+
+Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3059.297 ; gain = 0.000 ; free physical = 3291 ; free virtual = 13313
+Phase 9.2 Verifying Netlist Connectivity | Checksum: 144339148
+
+Time (s): cpu = 00:00:00.02 ; elapsed = 00:00:00.04 . Memory (MB): peak = 3059.297 ; gain = 32.016 ; free physical = 3291 ; free virtual = 13313
+Phase 9 Finalization | Checksum: 144339148
+
+Time (s): cpu = 00:00:00.02 ; elapsed = 00:00:00.04 . Memory (MB): peak = 3059.297 ; gain = 32.016 ; free physical = 3291 ; free virtual = 13313
+Opt_design Change Summary
+=========================
+
+
+-------------------------------------------------------------------------------------------------------------------------
+| Phase | #Cells created | #Cells Removed | #Constrained objects preventing optimizations |
+-------------------------------------------------------------------------------------------------------------------------
+| Retarget | 0 | 0 | 0 |
+| Constant propagation | 0 | 0 | 0 |
+| Sweep | 0 | 4 | 0 |
+| BUFG optimization | 0 | 0 | 0 |
+| Shift Register Optimization | 0 | 0 | 0 |
+| Post Processing Netlist | 0 | 0 | 0 |
+-------------------------------------------------------------------------------------------------------------------------
+
+
+Ending Logic Optimization Task | Checksum: 144339148
+
+Time (s): cpu = 00:00:00.02 ; elapsed = 00:00:00.05 . Memory (MB): peak = 3059.297 ; gain = 32.016 ; free physical = 3291 ; free virtual = 13313
+
+Starting Power Optimization Task
+INFO: [Pwropt 34-132] Skipping clock gating for clocks with a period < 2.00 ns.
+Ending Power Optimization Task | Checksum: 144339148
+
+Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.03 . Memory (MB): peak = 3059.297 ; gain = 0.000 ; free physical = 3291 ; free virtual = 13313
+
+Starting Final Cleanup Task
+Ending Final Cleanup Task | Checksum: 144339148
+
+Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3059.297 ; gain = 0.000 ; free physical = 3291 ; free virtual = 13313
+
+Starting Netlist Obfuscation Task
+Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3059.297 ; gain = 0.000 ; free physical = 3291 ; free virtual = 13313
+Ending Netlist Obfuscation Task | Checksum: 144339148
+
+Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3059.297 ; gain = 0.000 ; free physical = 3291 ; free virtual = 13313
+INFO: [Common 17-83] Releasing license: Implementation
+26 Infos, 28 Warnings, 27 Critical Warnings and 0 Errors encountered.
+opt_design completed successfully
+opt_design: Time (s): cpu = 00:00:07 ; elapsed = 00:00:10 . Memory (MB): peak = 3059.297 ; gain = 878.750 ; free physical = 3291 ; free virtual = 13313
+INFO: [Vivado 12-24828] Executing command : report_drc -file tb_firUnit_drc_opted.rpt -pb tb_firUnit_drc_opted.pb -rpx tb_firUnit_drc_opted.rpx
+Command: report_drc -file tb_firUnit_drc_opted.rpt -pb tb_firUnit_drc_opted.pb -rpx tb_firUnit_drc_opted.rpx
+INFO: [IP_Flow 19-1839] IP Catalog is up to date.
+INFO: [DRC 23-27] Running DRC with 8 threads
+INFO: [Vivado_Tcl 2-168] The results of DRC are in file /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.runs/impl_1/tb_firUnit_drc_opted.rpt.
+report_drc completed successfully
+INFO: [Timing 38-480] Writing timing data to binary archive.
+INFO: [Common 17-1381] The checkpoint '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.runs/impl_1/tb_firUnit_opt.dcp' has been generated.
+Command: place_design
+Attempting to get a license for feature 'Implementation' and/or device 'xc7a200t'
+INFO: [Common 17-349] Got license for feature 'Implementation' and/or device 'xc7a200t'
+INFO: [Common 17-83] Releasing license: Implementation
+INFO: [DRC 23-27] Running DRC with 8 threads
+INFO: [Vivado_Tcl 4-198] DRC finished with 0 Errors
+INFO: [Vivado_Tcl 4-199] Please refer to the DRC report (report_drc) for more information.
+Running DRC as a precondition to command place_design
+INFO: [DRC 23-27] Running DRC with 8 threads
+INFO: [Vivado_Tcl 4-198] DRC finished with 0 Errors
+INFO: [Vivado_Tcl 4-199] Please refer to the DRC report (report_drc) for more information.
+INFO: [Place 30-611] Multithreading enabled for place_design using a maximum of 8 CPUs
+
+Starting Placer Task
+
+Phase 1 Placer Initialization
+
+Phase 1.1 Placer Initialization Netlist Sorting
+Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3167.152 ; gain = 0.000 ; free physical = 3277 ; free virtual = 13299
+Phase 1.1 Placer Initialization Netlist Sorting | Checksum: 981aeb64
+
+Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.03 . Memory (MB): peak = 3167.152 ; gain = 0.000 ; free physical = 3277 ; free virtual = 13299
+Phase 1 Placer Initialization | Checksum: 981aeb64
+
+Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.14 . Memory (MB): peak = 3167.152 ; gain = 0.000 ; free physical = 3276 ; free virtual = 13300
+ERROR: [Place 30-494] The design is empty
+Resolution: Check if opt_design has removed all the leaf cells of your design. Check whether you have instantiated and connected all of the top level ports.
+Ending Placer Task | Checksum: 981aeb64
+
+Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.15 . Memory (MB): peak = 3167.152 ; gain = 0.000 ; free physical = 3276 ; free virtual = 13300
+41 Infos, 28 Warnings, 27 Critical Warnings and 2 Errors encountered.
+place_design failed
+ERROR: [Common 17-69] Command failed: Placer could not place all instances
+INFO: [Common 17-206] Exiting Vivado at Fri May 9 16:06:02 2025...
diff --git a/proj/AudioProc.runs/impl_1/runme.sh b/proj/AudioProc.runs/impl_1/runme.sh
new file mode 100755
index 0000000000000000000000000000000000000000..997d61fbd7242f346bf59a85997775cf48524f86
--- /dev/null
+++ b/proj/AudioProc.runs/impl_1/runme.sh
@@ -0,0 +1,44 @@
+#!/bin/sh
+
+#
+# Vivado(TM)
+# runme.sh: a Vivado-generated Runs Script for UNIX
+# Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+# Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
+#
+
+if [ -z "$PATH" ]; then
+ PATH=/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vitis/2024.1/bin:/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/ids_lite/ISE/bin/lin64:/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/bin
+else
+ PATH=/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vitis/2024.1/bin:/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/ids_lite/ISE/bin/lin64:/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/bin:$PATH
+fi
+export PATH
+
+if [ -z "$LD_LIBRARY_PATH" ]; then
+ LD_LIBRARY_PATH=
+else
+ LD_LIBRARY_PATH=:$LD_LIBRARY_PATH
+fi
+export LD_LIBRARY_PATH
+
+HD_PWD='/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.runs/impl_1'
+cd "$HD_PWD"
+
+HD_LOG=runme.log
+/bin/touch $HD_LOG
+
+ISEStep="./ISEWrap.sh"
+EAStep()
+{
+ $ISEStep $HD_LOG "$@" >> $HD_LOG 2>&1
+ if [ $? -ne 0 ]
+ then
+ exit
+ fi
+}
+
+# pre-commands:
+/bin/touch .init_design.begin.rst
+EAStep vivado -log tb_firUnit.vdi -applog -m64 -product Vivado -messageDb vivado.pb -mode batch -source tb_firUnit.tcl -notrace
+
+
diff --git a/proj/AudioProc.runs/impl_1/tb_firUnit.tcl b/proj/AudioProc.runs/impl_1/tb_firUnit.tcl
new file mode 100644
index 0000000000000000000000000000000000000000..3a865960f8e894d60011a8e8310686465999e12e
--- /dev/null
+++ b/proj/AudioProc.runs/impl_1/tb_firUnit.tcl
@@ -0,0 +1,283 @@
+namespace eval ::optrace {
+ variable script "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.runs/impl_1/tb_firUnit.tcl"
+ variable category "vivado_impl"
+}
+
+# Try to connect to running dispatch if we haven't done so already.
+# This code assumes that the Tcl interpreter is not using threads,
+# since the ::dispatch::connected variable isn't mutex protected.
+if {![info exists ::dispatch::connected]} {
+ namespace eval ::dispatch {
+ variable connected false
+ if {[llength [array get env XILINX_CD_CONNECT_ID]] > 0} {
+ set result "true"
+ if {[catch {
+ if {[lsearch -exact [package names] DispatchTcl] < 0} {
+ set result [load librdi_cd_clienttcl[info sharedlibextension]]
+ }
+ if {$result eq "false"} {
+ puts "WARNING: Could not load dispatch client library"
+ }
+ set connect_id [ ::dispatch::init_client -mode EXISTING_SERVER ]
+ if { $connect_id eq "" } {
+ puts "WARNING: Could not initialize dispatch client"
+ } else {
+ puts "INFO: Dispatch client connection id - $connect_id"
+ set connected true
+ }
+ } catch_res]} {
+ puts "WARNING: failed to connect to dispatch server - $catch_res"
+ }
+ }
+ }
+}
+if {$::dispatch::connected} {
+ # Remove the dummy proc if it exists.
+ if { [expr {[llength [info procs ::OPTRACE]] > 0}] } {
+ rename ::OPTRACE ""
+ }
+ proc ::OPTRACE { task action {tags {} } } {
+ ::vitis_log::op_trace "$task" $action -tags $tags -script $::optrace::script -category $::optrace::category
+ }
+ # dispatch is generic. We specifically want to attach logging.
+ ::vitis_log::connect_client
+} else {
+ # Add dummy proc if it doesn't exist.
+ if { [expr {[llength [info procs ::OPTRACE]] == 0}] } {
+ proc ::OPTRACE {{arg1 \"\" } {arg2 \"\"} {arg3 \"\" } {arg4 \"\"} {arg5 \"\" } {arg6 \"\"}} {
+ # Do nothing
+ }
+ }
+}
+
+proc start_step { step } {
+ set stopFile ".stop.rst"
+ if {[file isfile .stop.rst]} {
+ puts ""
+ puts "*** Halting run - EA reset detected ***"
+ puts ""
+ puts ""
+ return -code error
+ }
+ set beginFile ".$step.begin.rst"
+ set platform "$::tcl_platform(platform)"
+ set user "$::tcl_platform(user)"
+ set pid [pid]
+ set host ""
+ if { [string equal $platform unix] } {
+ if { [info exist ::env(HOSTNAME)] } {
+ set host $::env(HOSTNAME)
+ } elseif { [info exist ::env(HOST)] } {
+ set host $::env(HOST)
+ }
+ } else {
+ if { [info exist ::env(COMPUTERNAME)] } {
+ set host $::env(COMPUTERNAME)
+ }
+ }
+ set ch [open $beginFile w]
+ puts $ch "<?xml version=\"1.0\"?>"
+ puts $ch "<ProcessHandle Version=\"1\" Minor=\"0\">"
+ puts $ch " <Process Command=\".planAhead.\" Owner=\"$user\" Host=\"$host\" Pid=\"$pid\">"
+ puts $ch " </Process>"
+ puts $ch "</ProcessHandle>"
+ close $ch
+}
+
+proc end_step { step } {
+ set endFile ".$step.end.rst"
+ set ch [open $endFile w]
+ close $ch
+}
+
+proc step_failed { step } {
+ set endFile ".$step.error.rst"
+ set ch [open $endFile w]
+ close $ch
+OPTRACE "impl_1" END { }
+}
+
+
+OPTRACE "impl_1" START { ROLLUP_1 }
+OPTRACE "Phase: Init Design" START { ROLLUP_AUTO }
+start_step init_design
+set ACTIVE_STEP init_design
+set rc [catch {
+ create_msg_db init_design.pb
+ set_param chipscope.maxJobs 3
+ set_param runs.launchOptions { -jobs 6 }
+OPTRACE "create in-memory project" START { }
+ create_project -in_memory -part xc7a200tsbg484-1
+ set_property design_mode GateLvl [current_fileset]
+ set_param project.singleFileAddWarning.threshold 0
+OPTRACE "create in-memory project" END { }
+OPTRACE "set parameters" START { }
+ set_property webtalk.parent_dir /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.cache/wt [current_project]
+ set_property parent.project_path /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.xpr [current_project]
+ set_property ip_repo_paths /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/repo [current_project]
+ update_ip_catalog
+ set_property ip_output_repo /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.cache/ip [current_project]
+ set_property ip_cache_permissions {read write} [current_project]
+OPTRACE "set parameters" END { }
+OPTRACE "add files" START { }
+ add_files -quiet /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.runs/synth_1/tb_firUnit.dcp
+OPTRACE "read constraints: implementation" START { }
+ read_xdc /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc
+OPTRACE "read constraints: implementation" END { }
+OPTRACE "read constraints: implementation_pre" START { }
+OPTRACE "read constraints: implementation_pre" END { }
+OPTRACE "add files" END { }
+OPTRACE "link_design" START { }
+ link_design -top tb_firUnit -part xc7a200tsbg484-1
+OPTRACE "link_design" END { }
+OPTRACE "gray box cells" START { }
+OPTRACE "gray box cells" END { }
+OPTRACE "init_design_reports" START { REPORT }
+OPTRACE "init_design_reports" END { }
+OPTRACE "init_design_write_hwdef" START { }
+OPTRACE "init_design_write_hwdef" END { }
+ close_msg_db -file init_design.pb
+} RESULT]
+if {$rc} {
+ step_failed init_design
+ return -code error $RESULT
+} else {
+ end_step init_design
+ unset ACTIVE_STEP
+}
+
+OPTRACE "Phase: Init Design" END { }
+OPTRACE "Phase: Opt Design" START { ROLLUP_AUTO }
+start_step opt_design
+set ACTIVE_STEP opt_design
+set rc [catch {
+ create_msg_db opt_design.pb
+OPTRACE "read constraints: opt_design" START { }
+OPTRACE "read constraints: opt_design" END { }
+OPTRACE "opt_design" START { }
+ opt_design
+OPTRACE "opt_design" END { }
+OPTRACE "read constraints: opt_design_post" START { }
+OPTRACE "read constraints: opt_design_post" END { }
+OPTRACE "opt_design reports" START { REPORT }
+ set_param project.isImplRun true
+ generate_parallel_reports -reports { "report_drc -file tb_firUnit_drc_opted.rpt -pb tb_firUnit_drc_opted.pb -rpx tb_firUnit_drc_opted.rpx" }
+ set_param project.isImplRun false
+OPTRACE "opt_design reports" END { }
+OPTRACE "Opt Design: write_checkpoint" START { CHECKPOINT }
+ write_checkpoint -force tb_firUnit_opt.dcp
+OPTRACE "Opt Design: write_checkpoint" END { }
+ close_msg_db -file opt_design.pb
+} RESULT]
+if {$rc} {
+ step_failed opt_design
+ return -code error $RESULT
+} else {
+ end_step opt_design
+ unset ACTIVE_STEP
+}
+
+OPTRACE "Phase: Opt Design" END { }
+OPTRACE "Phase: Place Design" START { ROLLUP_AUTO }
+start_step place_design
+set ACTIVE_STEP place_design
+set rc [catch {
+ create_msg_db place_design.pb
+OPTRACE "read constraints: place_design" START { }
+OPTRACE "read constraints: place_design" END { }
+ if { [llength [get_debug_cores -quiet] ] > 0 } {
+OPTRACE "implement_debug_core" START { }
+ implement_debug_core
+OPTRACE "implement_debug_core" END { }
+ }
+OPTRACE "place_design" START { }
+ place_design
+OPTRACE "place_design" END { }
+OPTRACE "read constraints: place_design_post" START { }
+OPTRACE "read constraints: place_design_post" END { }
+OPTRACE "place_design reports" START { REPORT }
+ set_param project.isImplRun true
+ generate_parallel_reports -reports { "report_io -file tb_firUnit_io_placed.rpt" "report_utilization -file tb_firUnit_utilization_placed.rpt -pb tb_firUnit_utilization_placed.pb" "report_control_sets -verbose -file tb_firUnit_control_sets_placed.rpt" }
+ set_param project.isImplRun false
+OPTRACE "place_design reports" END { }
+OPTRACE "Place Design: write_checkpoint" START { CHECKPOINT }
+ write_checkpoint -force tb_firUnit_placed.dcp
+OPTRACE "Place Design: write_checkpoint" END { }
+ close_msg_db -file place_design.pb
+} RESULT]
+if {$rc} {
+ step_failed place_design
+ return -code error $RESULT
+} else {
+ end_step place_design
+ unset ACTIVE_STEP
+}
+
+OPTRACE "Phase: Place Design" END { }
+OPTRACE "Phase: Route Design" START { ROLLUP_AUTO }
+start_step route_design
+set ACTIVE_STEP route_design
+set rc [catch {
+ create_msg_db route_design.pb
+OPTRACE "read constraints: route_design" START { }
+OPTRACE "read constraints: route_design" END { }
+OPTRACE "route_design" START { }
+ route_design
+OPTRACE "route_design" END { }
+OPTRACE "read constraints: route_design_post" START { }
+OPTRACE "read constraints: route_design_post" END { }
+OPTRACE "route_design reports" START { REPORT }
+ set_param project.isImplRun true
+ generate_parallel_reports -reports { "report_drc -file tb_firUnit_drc_routed.rpt -pb tb_firUnit_drc_routed.pb -rpx tb_firUnit_drc_routed.rpx" "report_methodology -file tb_firUnit_methodology_drc_routed.rpt -pb tb_firUnit_methodology_drc_routed.pb -rpx tb_firUnit_methodology_drc_routed.rpx" "report_power -file tb_firUnit_power_routed.rpt -pb tb_firUnit_power_summary_routed.pb -rpx tb_firUnit_power_routed.rpx" "report_route_status -file tb_firUnit_route_status.rpt -pb tb_firUnit_route_status.pb" "report_timing_summary -max_paths 10 -file tb_firUnit_timing_summary_routed.rpt -pb tb_firUnit_timing_summary_routed.pb -rpx tb_firUnit_timing_summary_routed.rpx -warn_on_violation " "report_incremental_reuse -file tb_firUnit_incremental_reuse_routed.rpt" "report_clock_utilization -file tb_firUnit_clock_utilization_routed.rpt" "report_bus_skew -warn_on_violation -file tb_firUnit_bus_skew_routed.rpt -pb tb_firUnit_bus_skew_routed.pb -rpx tb_firUnit_bus_skew_routed.rpx" }
+ set_param project.isImplRun false
+OPTRACE "route_design reports" END { }
+OPTRACE "Route Design: write_checkpoint" START { CHECKPOINT }
+ write_checkpoint -force tb_firUnit_routed.dcp
+OPTRACE "Route Design: write_checkpoint" END { }
+OPTRACE "route_design misc" START { }
+ close_msg_db -file route_design.pb
+} RESULT]
+if {$rc} {
+OPTRACE "route_design write_checkpoint" START { CHECKPOINT }
+OPTRACE "route_design write_checkpoint" END { }
+ write_checkpoint -force tb_firUnit_routed_error.dcp
+ step_failed route_design
+ return -code error $RESULT
+} else {
+ end_step route_design
+ unset ACTIVE_STEP
+}
+
+OPTRACE "route_design misc" END { }
+OPTRACE "Phase: Route Design" END { }
+OPTRACE "Phase: Write Bitstream" START { ROLLUP_AUTO }
+OPTRACE "write_bitstream setup" START { }
+start_step write_bitstream
+set ACTIVE_STEP write_bitstream
+set rc [catch {
+ create_msg_db write_bitstream.pb
+OPTRACE "read constraints: write_bitstream" START { }
+OPTRACE "read constraints: write_bitstream" END { }
+ catch { write_mem_info -force -no_partial_mmi tb_firUnit.mmi }
+OPTRACE "write_bitstream setup" END { }
+OPTRACE "write_bitstream" START { }
+ write_bitstream -force tb_firUnit.bit -bin_file
+OPTRACE "write_bitstream" END { }
+OPTRACE "write_bitstream misc" START { }
+OPTRACE "read constraints: write_bitstream_post" START { }
+OPTRACE "read constraints: write_bitstream_post" END { }
+ catch {write_debug_probes -quiet -force tb_firUnit}
+ catch {file copy -force tb_firUnit.ltx debug_nets.ltx}
+ close_msg_db -file write_bitstream.pb
+} RESULT]
+if {$rc} {
+ step_failed write_bitstream
+ return -code error $RESULT
+} else {
+ end_step write_bitstream
+ unset ACTIVE_STEP
+}
+
+OPTRACE "write_bitstream misc" END { }
+OPTRACE "Phase: Write Bitstream" END { }
+OPTRACE "impl_1" END { }
diff --git a/proj/AudioProc.runs/impl_1/tb_firUnit.vdi b/proj/AudioProc.runs/impl_1/tb_firUnit.vdi
new file mode 100644
index 0000000000000000000000000000000000000000..157021aa0ea7736663dd5cd5c1d28d8cc0cd6faf
--- /dev/null
+++ b/proj/AudioProc.runs/impl_1/tb_firUnit.vdi
@@ -0,0 +1,325 @@
+#-----------------------------------------------------------
+# Vivado v2024.1 (64-bit)
+# SW Build 5076996 on Wed May 22 18:36:09 MDT 2024
+# IP Build 5075265 on Wed May 22 21:45:21 MDT 2024
+# SharedData Build 5076995 on Wed May 22 18:29:18 MDT 2024
+# Start of session at: Fri May 9 16:04:45 2025
+# Process ID: 112122
+# Current directory: /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.runs/impl_1
+# Command line: vivado -log tb_firUnit.vdi -applog -product Vivado -messageDb vivado.pb -mode batch -source tb_firUnit.tcl -notrace
+# Log file: /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.runs/impl_1/tb_firUnit.vdi
+# Journal file: /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.runs/impl_1/vivado.jou
+# Running On :fl-tp-br-515
+# Platform :Ubuntu
+# Operating System :Ubuntu 24.04.2 LTS
+# Processor Detail :Intel(R) Core(TM) i5-10500 CPU @ 3.10GHz
+# CPU Frequency :4317.128 MHz
+# CPU Physical cores:6
+# CPU Logical cores :12
+# Host memory :16533 MB
+# Swap memory :4294 MB
+# Total Virtual :20828 MB
+# Available Virtual :15874 MB
+#-----------------------------------------------------------
+source tb_firUnit.tcl -notrace
+create_project: Time (s): cpu = 00:00:14 ; elapsed = 00:00:28 . Memory (MB): peak = 1680.586 ; gain = 325.840 ; free physical = 4615 ; free virtual = 14617
+INFO: [IP_Flow 19-234] Refreshing IP repositories
+WARNING: [IP_Flow 19-2248] Failed to load user IP repository '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/repo'; Can't find the specified path.
+If this directory should no longer be in your list of user repositories, go to the IP Settings dialog and remove it.
+INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/data/ip'.
+Command: link_design -top tb_firUnit -part xc7a200tsbg484-1
+Design is defaulting to srcset: sources_1
+Design is defaulting to constrset: constrs_1
+INFO: [Device 21-403] Loading part xc7a200tsbg484-1
+INFO: [Device 21-9227] Part: xc7a200tsbg484-1 does not have CEAM library.
+Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2080.266 ; gain = 0.000 ; free physical = 4169 ; free virtual = 14166
+INFO: [Project 1-479] Netlist was created with Vivado 2024.1
+INFO: [Project 1-570] Preparing netlist for logic optimization
+Parsing XDC File [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc]
+WARNING: [Vivado 12-584] No ports matched 'CLK100MHZ'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:8]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:8]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'led2'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:14]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:14]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'led3'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:15]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:15]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'led4'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:16]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:16]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'led5'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:17]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:17]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'led6'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:18]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:18]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'led7'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:19]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:19]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'BTNC'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:23]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:23]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'BTND'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:24]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:24]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'BTNL'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:25]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:25]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'BTNR'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:26]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:26]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'BTNU'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:27]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:27]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'rstn'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:28]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:28]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sw'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:32]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:32]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sw2'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:34]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:34]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sw3'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:35]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:35]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sw4'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:36]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:36]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sw5'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:37]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:37]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sw6'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:38]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:38]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sw7'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:39]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:39]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'ac_adc_sdata'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:91]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:91]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'ac_bclk'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:92]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:92]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'ac_dac_sdata'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:93]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:93]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'ac_lrclk'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:94]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:94]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'ac_mclk'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:95]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:95]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'scl'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:202]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:202]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sda'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:203]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:203]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+Finished Parsing XDC File [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc]
+INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
+Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2176.578 ; gain = 0.000 ; free physical = 4046 ; free virtual = 14058
+INFO: [Project 1-111] Unisim Transformation Summary:
+No Unisim elements were transformed.
+
+8 Infos, 28 Warnings, 27 Critical Warnings and 0 Errors encountered.
+link_design completed successfully
+link_design: Time (s): cpu = 00:00:05 ; elapsed = 00:00:14 . Memory (MB): peak = 2180.547 ; gain = 494.023 ; free physical = 4046 ; free virtual = 14058
+Command: opt_design
+Attempting to get a license for feature 'Implementation' and/or device 'xc7a200t'
+INFO: [Common 17-349] Got license for feature 'Implementation' and/or device 'xc7a200t'
+Running DRC as a precondition to command opt_design
+
+Starting DRC Task
+INFO: [DRC 23-27] Running DRC with 8 threads
+INFO: [Project 1-461] DRC finished with 0 Errors
+INFO: [Project 1-462] Please refer to the DRC report (report_drc) for more information.
+
+Time (s): cpu = 00:00:00.44 ; elapsed = 00:00:00.64 . Memory (MB): peak = 2259.453 ; gain = 78.906 ; free physical = 4033 ; free virtual = 14044
+
+Starting Cache Timing Information Task
+INFO: [Timing 38-35] Done setting XDC timing constraints.
+Ending Cache Timing Information Task | Checksum: b7dde4dd
+
+Time (s): cpu = 00:00:05 ; elapsed = 00:00:07 . Memory (MB): peak = 2715.445 ; gain = 455.992 ; free physical = 3596 ; free virtual = 13622
+
+Starting Logic Optimization Task
+
+Phase 1 Initialization
+
+Phase 1.1 Core Generation And Design Setup
+Phase 1.1 Core Generation And Design Setup | Checksum: b7dde4dd
+
+Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3027.281 ; gain = 0.000 ; free physical = 3291 ; free virtual = 13313
+
+Phase 1.2 Setup Constraints And Sort Netlist
+Phase 1.2 Setup Constraints And Sort Netlist | Checksum: b7dde4dd
+
+Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3027.281 ; gain = 0.000 ; free physical = 3291 ; free virtual = 13313
+Phase 1 Initialization | Checksum: b7dde4dd
+
+Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3027.281 ; gain = 0.000 ; free physical = 3291 ; free virtual = 13313
+
+Phase 2 Timer Update And Timing Data Collection
+
+Phase 2.1 Timer Update
+Phase 2.1 Timer Update | Checksum: b7dde4dd
+
+Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.01 . Memory (MB): peak = 3027.281 ; gain = 0.000 ; free physical = 3291 ; free virtual = 13313
+
+Phase 2.2 Timing Data Collection
+Phase 2.2 Timing Data Collection | Checksum: b7dde4dd
+
+Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.02 . Memory (MB): peak = 3027.281 ; gain = 0.000 ; free physical = 3291 ; free virtual = 13313
+Phase 2 Timer Update And Timing Data Collection | Checksum: b7dde4dd
+
+Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.02 . Memory (MB): peak = 3027.281 ; gain = 0.000 ; free physical = 3291 ; free virtual = 13313
+
+Phase 3 Retarget
+INFO: [Opt 31-1834] Total Chains To Be Transformed Were: 0 AND Number of Transformed insts Created are: 0
+INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
+INFO: [Opt 31-49] Retargeted 0 cell(s).
+Phase 3 Retarget | Checksum: b7dde4dd
+
+Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.02 . Memory (MB): peak = 3027.281 ; gain = 0.000 ; free physical = 3291 ; free virtual = 13313
+Retarget | Checksum: b7dde4dd
+INFO: [Opt 31-389] Phase Retarget created 0 cells and removed 0 cells
+
+Phase 4 Constant propagation
+INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
+Phase 4 Constant propagation | Checksum: b7dde4dd
+
+Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.02 . Memory (MB): peak = 3027.281 ; gain = 0.000 ; free physical = 3291 ; free virtual = 13313
+Constant propagation | Checksum: b7dde4dd
+INFO: [Opt 31-389] Phase Constant propagation created 0 cells and removed 0 cells
+
+Phase 5 Sweep
+Phase 5 Sweep | Checksum: 144339148
+
+Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.03 . Memory (MB): peak = 3027.281 ; gain = 0.000 ; free physical = 3291 ; free virtual = 13313
+Sweep | Checksum: 144339148
+INFO: [Opt 31-389] Phase Sweep created 0 cells and removed 4 cells
+
+Phase 6 BUFG optimization
+Phase 6 BUFG optimization | Checksum: 144339148
+
+Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.04 . Memory (MB): peak = 3059.297 ; gain = 32.016 ; free physical = 3291 ; free virtual = 13313
+BUFG optimization | Checksum: 144339148
+INFO: [Opt 31-662] Phase BUFG optimization created 0 cells of which 0 are BUFGs and removed 0 cells.
+
+Phase 7 Shift Register Optimization
+INFO: [Opt 31-1064] SRL Remap converted 0 SRLs to 0 registers and converted 0 registers of register chains to 0 SRLs
+Phase 7 Shift Register Optimization | Checksum: 144339148
+
+Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.04 . Memory (MB): peak = 3059.297 ; gain = 32.016 ; free physical = 3291 ; free virtual = 13313
+Shift Register Optimization | Checksum: 144339148
+INFO: [Opt 31-389] Phase Shift Register Optimization created 0 cells and removed 0 cells
+
+Phase 8 Post Processing Netlist
+Phase 8 Post Processing Netlist | Checksum: 144339148
+
+Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.04 . Memory (MB): peak = 3059.297 ; gain = 32.016 ; free physical = 3291 ; free virtual = 13313
+Post Processing Netlist | Checksum: 144339148
+INFO: [Opt 31-389] Phase Post Processing Netlist created 0 cells and removed 0 cells
+
+Phase 9 Finalization
+
+Phase 9.1 Finalizing Design Cores and Updating Shapes
+Phase 9.1 Finalizing Design Cores and Updating Shapes | Checksum: 144339148
+
+Time (s): cpu = 00:00:00.02 ; elapsed = 00:00:00.04 . Memory (MB): peak = 3059.297 ; gain = 32.016 ; free physical = 3291 ; free virtual = 13313
+
+Phase 9.2 Verifying Netlist Connectivity
+
+Starting Connectivity Check Task
+
+Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3059.297 ; gain = 0.000 ; free physical = 3291 ; free virtual = 13313
+Phase 9.2 Verifying Netlist Connectivity | Checksum: 144339148
+
+Time (s): cpu = 00:00:00.02 ; elapsed = 00:00:00.04 . Memory (MB): peak = 3059.297 ; gain = 32.016 ; free physical = 3291 ; free virtual = 13313
+Phase 9 Finalization | Checksum: 144339148
+
+Time (s): cpu = 00:00:00.02 ; elapsed = 00:00:00.04 . Memory (MB): peak = 3059.297 ; gain = 32.016 ; free physical = 3291 ; free virtual = 13313
+Opt_design Change Summary
+=========================
+
+
+-------------------------------------------------------------------------------------------------------------------------
+| Phase | #Cells created | #Cells Removed | #Constrained objects preventing optimizations |
+-------------------------------------------------------------------------------------------------------------------------
+| Retarget | 0 | 0 | 0 |
+| Constant propagation | 0 | 0 | 0 |
+| Sweep | 0 | 4 | 0 |
+| BUFG optimization | 0 | 0 | 0 |
+| Shift Register Optimization | 0 | 0 | 0 |
+| Post Processing Netlist | 0 | 0 | 0 |
+-------------------------------------------------------------------------------------------------------------------------
+
+
+Ending Logic Optimization Task | Checksum: 144339148
+
+Time (s): cpu = 00:00:00.02 ; elapsed = 00:00:00.05 . Memory (MB): peak = 3059.297 ; gain = 32.016 ; free physical = 3291 ; free virtual = 13313
+
+Starting Power Optimization Task
+INFO: [Pwropt 34-132] Skipping clock gating for clocks with a period < 2.00 ns.
+Ending Power Optimization Task | Checksum: 144339148
+
+Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.03 . Memory (MB): peak = 3059.297 ; gain = 0.000 ; free physical = 3291 ; free virtual = 13313
+
+Starting Final Cleanup Task
+Ending Final Cleanup Task | Checksum: 144339148
+
+Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3059.297 ; gain = 0.000 ; free physical = 3291 ; free virtual = 13313
+
+Starting Netlist Obfuscation Task
+Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3059.297 ; gain = 0.000 ; free physical = 3291 ; free virtual = 13313
+Ending Netlist Obfuscation Task | Checksum: 144339148
+
+Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3059.297 ; gain = 0.000 ; free physical = 3291 ; free virtual = 13313
+INFO: [Common 17-83] Releasing license: Implementation
+26 Infos, 28 Warnings, 27 Critical Warnings and 0 Errors encountered.
+opt_design completed successfully
+opt_design: Time (s): cpu = 00:00:07 ; elapsed = 00:00:10 . Memory (MB): peak = 3059.297 ; gain = 878.750 ; free physical = 3291 ; free virtual = 13313
+INFO: [Vivado 12-24828] Executing command : report_drc -file tb_firUnit_drc_opted.rpt -pb tb_firUnit_drc_opted.pb -rpx tb_firUnit_drc_opted.rpx
+Command: report_drc -file tb_firUnit_drc_opted.rpt -pb tb_firUnit_drc_opted.pb -rpx tb_firUnit_drc_opted.rpx
+INFO: [IP_Flow 19-1839] IP Catalog is up to date.
+INFO: [DRC 23-27] Running DRC with 8 threads
+INFO: [Vivado_Tcl 2-168] The results of DRC are in file /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.runs/impl_1/tb_firUnit_drc_opted.rpt.
+report_drc completed successfully
+INFO: [Timing 38-480] Writing timing data to binary archive.
+INFO: [Common 17-1381] The checkpoint '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.runs/impl_1/tb_firUnit_opt.dcp' has been generated.
+Command: place_design
+Attempting to get a license for feature 'Implementation' and/or device 'xc7a200t'
+INFO: [Common 17-349] Got license for feature 'Implementation' and/or device 'xc7a200t'
+INFO: [Common 17-83] Releasing license: Implementation
+INFO: [DRC 23-27] Running DRC with 8 threads
+INFO: [Vivado_Tcl 4-198] DRC finished with 0 Errors
+INFO: [Vivado_Tcl 4-199] Please refer to the DRC report (report_drc) for more information.
+Running DRC as a precondition to command place_design
+INFO: [DRC 23-27] Running DRC with 8 threads
+INFO: [Vivado_Tcl 4-198] DRC finished with 0 Errors
+INFO: [Vivado_Tcl 4-199] Please refer to the DRC report (report_drc) for more information.
+INFO: [Place 30-611] Multithreading enabled for place_design using a maximum of 8 CPUs
+
+Starting Placer Task
+
+Phase 1 Placer Initialization
+
+Phase 1.1 Placer Initialization Netlist Sorting
+Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3167.152 ; gain = 0.000 ; free physical = 3277 ; free virtual = 13299
+Phase 1.1 Placer Initialization Netlist Sorting | Checksum: 981aeb64
+
+Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.03 . Memory (MB): peak = 3167.152 ; gain = 0.000 ; free physical = 3277 ; free virtual = 13299
+Phase 1 Placer Initialization | Checksum: 981aeb64
+
+Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.14 . Memory (MB): peak = 3167.152 ; gain = 0.000 ; free physical = 3276 ; free virtual = 13300
+ERROR: [Place 30-494] The design is empty
+Resolution: Check if opt_design has removed all the leaf cells of your design. Check whether you have instantiated and connected all of the top level ports.
+Ending Placer Task | Checksum: 981aeb64
+
+Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.15 . Memory (MB): peak = 3167.152 ; gain = 0.000 ; free physical = 3276 ; free virtual = 13300
+41 Infos, 28 Warnings, 27 Critical Warnings and 2 Errors encountered.
+place_design failed
+ERROR: [Common 17-69] Command failed: Placer could not place all instances
+INFO: [Common 17-206] Exiting Vivado at Fri May 9 16:06:02 2025...
diff --git a/proj/AudioProc.runs/impl_1/tb_firUnit_drc_opted.pb b/proj/AudioProc.runs/impl_1/tb_firUnit_drc_opted.pb
new file mode 100644
index 0000000000000000000000000000000000000000..70698d16a043af0b5d745495ba43bfe143354a40
Binary files /dev/null and b/proj/AudioProc.runs/impl_1/tb_firUnit_drc_opted.pb differ
diff --git a/proj/AudioProc.runs/impl_1/tb_firUnit_drc_opted.rpt b/proj/AudioProc.runs/impl_1/tb_firUnit_drc_opted.rpt
new file mode 100644
index 0000000000000000000000000000000000000000..155b74150ff52c5160d292897d8e59ef50c2e896
--- /dev/null
+++ b/proj/AudioProc.runs/impl_1/tb_firUnit_drc_opted.rpt
@@ -0,0 +1,49 @@
+Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
+---------------------------------------------------------------------------------------------------------------------------------------------
+| Tool Version : Vivado v.2024.1 (lin64) Build 5076996 Wed May 22 18:36:09 MDT 2024
+| Date : Fri May 9 16:06:01 2025
+| Host : fl-tp-br-515 running 64-bit Ubuntu 24.04.2 LTS
+| Command : report_drc -file tb_firUnit_drc_opted.rpt -pb tb_firUnit_drc_opted.pb -rpx tb_firUnit_drc_opted.rpx
+| Design : tb_firUnit
+| Device : xc7a200tsbg484-1
+| Speed File : -1
+| Design State : Fully Routed
+---------------------------------------------------------------------------------------------------------------------------------------------
+
+Report DRC
+
+Table of Contents
+-----------------
+1. REPORT SUMMARY
+2. REPORT DETAILS
+
+1. REPORT SUMMARY
+-----------------
+ Netlist: netlist
+ Floorplan: design_1
+ Design limits: <entire design considered>
+ Ruledeck: default
+ Max violations: <unlimited>
+ Violations found: 1
++----------+----------+-----------------------------------------------------+------------+
+| Rule | Severity | Description | Violations |
++----------+----------+-----------------------------------------------------+------------+
+| CFGBVS-1 | Warning | Missing CFGBVS and CONFIG_VOLTAGE Design Properties | 1 |
++----------+----------+-----------------------------------------------------+------------+
+
+2. REPORT DETAILS
+-----------------
+CFGBVS-1#1 Warning
+Missing CFGBVS and CONFIG_VOLTAGE Design Properties
+Neither the CFGBVS nor CONFIG_VOLTAGE voltage property is set in the current_design. Configuration bank voltage select (CFGBVS) must be set to VCCO or GND, and CONFIG_VOLTAGE must be set to the correct configuration voltage, in order to determine the I/O voltage support for the pins in bank 0. It is suggested to specify these either using the 'Edit Device Properties' function in the GUI or directly in the XDC file using the following syntax:
+
+ set_property CFGBVS value1 [current_design]
+ #where value1 is either VCCO or GND
+
+ set_property CONFIG_VOLTAGE value2 [current_design]
+ #where value2 is the voltage provided to configuration bank 0
+
+Refer to the device configuration user guide for more information.
+Related violations: <none>
+
+
diff --git a/proj/AudioProc.runs/impl_1/tb_firUnit_drc_opted.rpx b/proj/AudioProc.runs/impl_1/tb_firUnit_drc_opted.rpx
new file mode 100644
index 0000000000000000000000000000000000000000..18db1c8b86ff645e9e8d8ac51ecab5deffcb2a5c
Binary files /dev/null and b/proj/AudioProc.runs/impl_1/tb_firUnit_drc_opted.rpx differ
diff --git a/proj/AudioProc.runs/impl_1/tb_firUnit_opt.dcp b/proj/AudioProc.runs/impl_1/tb_firUnit_opt.dcp
new file mode 100644
index 0000000000000000000000000000000000000000..1a856967414f7c51b75008160279cc1954434f4e
Binary files /dev/null and b/proj/AudioProc.runs/impl_1/tb_firUnit_opt.dcp differ
diff --git a/proj/AudioProc.runs/impl_1/vivado.jou b/proj/AudioProc.runs/impl_1/vivado.jou
new file mode 100644
index 0000000000000000000000000000000000000000..52205a1a023d5176f8b397a62aa86c1bce753206
--- /dev/null
+++ b/proj/AudioProc.runs/impl_1/vivado.jou
@@ -0,0 +1,24 @@
+#-----------------------------------------------------------
+# Vivado v2024.1 (64-bit)
+# SW Build 5076996 on Wed May 22 18:36:09 MDT 2024
+# IP Build 5075265 on Wed May 22 21:45:21 MDT 2024
+# SharedData Build 5076995 on Wed May 22 18:29:18 MDT 2024
+# Start of session at: Fri May 9 16:04:45 2025
+# Process ID: 112122
+# Current directory: /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.runs/impl_1
+# Command line: vivado -log tb_firUnit.vdi -applog -product Vivado -messageDb vivado.pb -mode batch -source tb_firUnit.tcl -notrace
+# Log file: /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.runs/impl_1/tb_firUnit.vdi
+# Journal file: /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.runs/impl_1/vivado.jou
+# Running On :fl-tp-br-515
+# Platform :Ubuntu
+# Operating System :Ubuntu 24.04.2 LTS
+# Processor Detail :Intel(R) Core(TM) i5-10500 CPU @ 3.10GHz
+# CPU Frequency :4317.128 MHz
+# CPU Physical cores:6
+# CPU Logical cores :12
+# Host memory :16533 MB
+# Swap memory :4294 MB
+# Total Virtual :20828 MB
+# Available Virtual :15874 MB
+#-----------------------------------------------------------
+source tb_firUnit.tcl -notrace
diff --git a/proj/AudioProc.runs/impl_1/vivado.pb b/proj/AudioProc.runs/impl_1/vivado.pb
new file mode 100644
index 0000000000000000000000000000000000000000..b155e40f06a230303a04d2a77f07560e35c5dc93
--- /dev/null
+++ b/proj/AudioProc.runs/impl_1/vivado.pb
@@ -0,0 +1,4 @@
+
+
+
+End Record
\ No newline at end of file
diff --git a/proj/AudioProc.runs/synth_1/.Vivado_Synthesis.queue.rst b/proj/AudioProc.runs/synth_1/.Vivado_Synthesis.queue.rst
new file mode 100644
index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391
diff --git a/proj/AudioProc.runs/synth_1/.vivado.begin.rst b/proj/AudioProc.runs/synth_1/.vivado.begin.rst
new file mode 100644
index 0000000000000000000000000000000000000000..e22780360df090eac5b95088d1098bffc98d4277
--- /dev/null
+++ b/proj/AudioProc.runs/synth_1/.vivado.begin.rst
@@ -0,0 +1,5 @@
+<?xml version="1.0"?>
+<ProcessHandle Version="1" Minor="0">
+ <Process Command="vivado" Owner="l24nicot" Host="fl-tp-br-515" Pid="111584" HostCore="12" HostMemory="16146436">
+ </Process>
+</ProcessHandle>
diff --git a/proj/AudioProc.runs/synth_1/.vivado.end.rst b/proj/AudioProc.runs/synth_1/.vivado.end.rst
new file mode 100644
index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391
diff --git a/proj/AudioProc.runs/synth_1/ISEWrap.js b/proj/AudioProc.runs/synth_1/ISEWrap.js
new file mode 100755
index 0000000000000000000000000000000000000000..61806d02710bd275f7cfe41a9d52914e7a1e63df
--- /dev/null
+++ b/proj/AudioProc.runs/synth_1/ISEWrap.js
@@ -0,0 +1,270 @@
+//
+// Vivado(TM)
+// ISEWrap.js: Vivado Runs Script for WSH 5.1/5.6
+// Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+// Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
+//
+
+// GLOBAL VARIABLES
+var ISEShell = new ActiveXObject( "WScript.Shell" );
+var ISEFileSys = new ActiveXObject( "Scripting.FileSystemObject" );
+var ISERunDir = "";
+var ISELogFile = "runme.log";
+var ISELogFileStr = null;
+var ISELogEcho = true;
+var ISEOldVersionWSH = false;
+
+
+
+// BOOTSTRAP
+ISEInit();
+
+
+
+//
+// ISE FUNCTIONS
+//
+function ISEInit() {
+
+ // 1. RUN DIR setup
+ var ISEScrFP = WScript.ScriptFullName;
+ var ISEScrN = WScript.ScriptName;
+ ISERunDir =
+ ISEScrFP.substr( 0, ISEScrFP.length - ISEScrN.length - 1 );
+
+ // 2. LOG file setup
+ ISELogFileStr = ISEOpenFile( ISELogFile );
+
+ // 3. LOG echo?
+ var ISEScriptArgs = WScript.Arguments;
+ for ( var loopi=0; loopi<ISEScriptArgs.length; loopi++ ) {
+ if ( ISEScriptArgs(loopi) == "-quiet" ) {
+ ISELogEcho = false;
+ break;
+ }
+ }
+
+ // 4. WSH version check
+ var ISEOptimalVersionWSH = 5.6;
+ var ISECurrentVersionWSH = WScript.Version;
+ if ( ISECurrentVersionWSH < ISEOptimalVersionWSH ) {
+
+ ISEStdErr( "" );
+ ISEStdErr( "Warning: ExploreAhead works best with Microsoft WSH " +
+ ISEOptimalVersionWSH + " or higher. Downloads" );
+ ISEStdErr( " for upgrading your Windows Scripting Host can be found here: " );
+ ISEStdErr( " http://msdn.microsoft.com/downloads/list/webdev.asp" );
+ ISEStdErr( "" );
+
+ ISEOldVersionWSH = true;
+ }
+
+}
+
+function ISEStep( ISEProg, ISEArgs ) {
+
+ // CHECK for a STOP FILE
+ if ( ISEFileSys.FileExists(ISERunDir + "/.stop.rst") ) {
+ ISEStdErr( "" );
+ ISEStdErr( "*** Halting run - EA reset detected ***" );
+ ISEStdErr( "" );
+ WScript.Quit( 1 );
+ }
+
+ // WRITE STEP HEADER to LOG
+ ISEStdOut( "" );
+ ISEStdOut( "*** Running " + ISEProg );
+ ISEStdOut( " with args " + ISEArgs );
+ ISEStdOut( "" );
+
+ // LAUNCH!
+ var ISEExitCode = ISEExec( ISEProg, ISEArgs );
+ if ( ISEExitCode != 0 ) {
+ WScript.Quit( ISEExitCode );
+ }
+
+}
+
+function ISEExec( ISEProg, ISEArgs ) {
+
+ var ISEStep = ISEProg;
+ if (ISEProg == "realTimeFpga" || ISEProg == "planAhead" || ISEProg == "vivado") {
+ ISEProg += ".bat";
+ }
+
+ var ISECmdLine = ISEProg + " " + ISEArgs;
+ var ISEExitCode = 1;
+
+ if ( ISEOldVersionWSH ) { // WSH 5.1
+
+ // BEGIN file creation
+ ISETouchFile( ISEStep, "begin" );
+
+ // LAUNCH!
+ ISELogFileStr.Close();
+ ISECmdLine =
+ "%comspec% /c " + ISECmdLine + " >> " + ISELogFile + " 2>&1";
+ ISEExitCode = ISEShell.Run( ISECmdLine, 0, true );
+ ISELogFileStr = ISEOpenFile( ISELogFile );
+
+ } else { // WSH 5.6
+
+ // LAUNCH!
+ ISEShell.CurrentDirectory = ISERunDir;
+
+ // Redirect STDERR to STDOUT
+ ISECmdLine = "%comspec% /c " + ISECmdLine + " 2>&1";
+ var ISEProcess = ISEShell.Exec( ISECmdLine );
+
+ // BEGIN file creation
+ var wbemFlagReturnImmediately = 0x10;
+ var wbemFlagForwardOnly = 0x20;
+ var objWMIService = GetObject ("winmgmts:{impersonationLevel=impersonate, (Systemtime)}!//./root/cimv2");
+ var processor = objWMIService.ExecQuery("SELECT * FROM Win32_Processor", "WQL",wbemFlagReturnImmediately | wbemFlagForwardOnly);
+ var computerSystem = objWMIService.ExecQuery("SELECT * FROM Win32_ComputerSystem", "WQL", wbemFlagReturnImmediately | wbemFlagForwardOnly);
+ var NOC = 0;
+ var NOLP = 0;
+ var TPM = 0;
+ var cpuInfos = new Enumerator(processor);
+ for(;!cpuInfos.atEnd(); cpuInfos.moveNext()) {
+ var cpuInfo = cpuInfos.item();
+ NOC += cpuInfo.NumberOfCores;
+ NOLP += cpuInfo.NumberOfLogicalProcessors;
+ }
+ var csInfos = new Enumerator(computerSystem);
+ for(;!csInfos.atEnd(); csInfos.moveNext()) {
+ var csInfo = csInfos.item();
+ TPM += csInfo.TotalPhysicalMemory;
+ }
+
+ var ISEHOSTCORE = NOLP
+ var ISEMEMTOTAL = TPM
+
+ var ISENetwork = WScript.CreateObject( "WScript.Network" );
+ var ISEHost = ISENetwork.ComputerName;
+ var ISEUser = ISENetwork.UserName;
+ var ISEPid = ISEProcess.ProcessID;
+ var ISEBeginFile = ISEOpenFile( "." + ISEStep + ".begin.rst" );
+ ISEBeginFile.WriteLine( "<?xml version=\"1.0\"?>" );
+ ISEBeginFile.WriteLine( "<ProcessHandle Version=\"1\" Minor=\"0\">" );
+ ISEBeginFile.WriteLine( " <Process Command=\"" + ISEProg +
+ "\" Owner=\"" + ISEUser +
+ "\" Host=\"" + ISEHost +
+ "\" Pid=\"" + ISEPid +
+ "\" HostCore=\"" + ISEHOSTCORE +
+ "\" HostMemory=\"" + ISEMEMTOTAL +
+ "\">" );
+ ISEBeginFile.WriteLine( " </Process>" );
+ ISEBeginFile.WriteLine( "</ProcessHandle>" );
+ ISEBeginFile.Close();
+
+ var ISEOutStr = ISEProcess.StdOut;
+ var ISEErrStr = ISEProcess.StdErr;
+
+ // WAIT for ISEStep to finish
+ while ( ISEProcess.Status == 0 ) {
+
+ // dump stdout then stderr - feels a little arbitrary
+ while ( !ISEOutStr.AtEndOfStream ) {
+ ISEStdOut( ISEOutStr.ReadLine() );
+ }
+
+ WScript.Sleep( 100 );
+ }
+
+ ISEExitCode = ISEProcess.ExitCode;
+ }
+
+ ISELogFileStr.Close();
+
+ // END/ERROR file creation
+ if ( ISEExitCode != 0 ) {
+ ISETouchFile( ISEStep, "error" );
+
+ } else {
+ ISETouchFile( ISEStep, "end" );
+ }
+
+ return ISEExitCode;
+}
+
+
+//
+// UTILITIES
+//
+function ISEStdOut( ISELine ) {
+
+ ISELogFileStr.WriteLine( ISELine );
+
+ if ( ISELogEcho ) {
+ WScript.StdOut.WriteLine( ISELine );
+ }
+}
+
+function ISEStdErr( ISELine ) {
+
+ ISELogFileStr.WriteLine( ISELine );
+
+ if ( ISELogEcho ) {
+ WScript.StdErr.WriteLine( ISELine );
+ }
+}
+
+function ISETouchFile( ISERoot, ISEStatus ) {
+
+ var ISETFile =
+ ISEOpenFile( "." + ISERoot + "." + ISEStatus + ".rst" );
+ ISETFile.Close();
+}
+
+function ISEOpenFile( ISEFilename ) {
+
+ // This function has been updated to deal with a problem seen in CR #870871.
+ // In that case the user runs a script that runs impl_1, and then turns around
+ // and runs impl_1 -to_step write_bitstream. That second run takes place in
+ // the same directory, which means we may hit some of the same files, and in
+ // particular, we will open the runme.log file. Even though this script closes
+ // the file (now), we see cases where a subsequent attempt to open the file
+ // fails. Perhaps the OS is slow to release the lock, or the disk comes into
+ // play? In any case, we try to work around this by first waiting if the file
+ // is already there for an arbitrary 5 seconds. Then we use a try-catch block
+ // and try to open the file 10 times with a one second delay after each attempt.
+ // Again, 10 is arbitrary. But these seem to stop the hang in CR #870871.
+ // If there is an unrecognized exception when trying to open the file, we output
+ // an error message and write details to an exception.log file.
+ var ISEFullPath = ISERunDir + "/" + ISEFilename;
+ if (ISEFileSys.FileExists(ISEFullPath)) {
+ // File is already there. This could be a problem. Wait in case it is still in use.
+ WScript.Sleep(5000);
+ }
+ var i;
+ for (i = 0; i < 10; ++i) {
+ try {
+ return ISEFileSys.OpenTextFile(ISEFullPath, 8, true);
+ } catch (exception) {
+ var error_code = exception.number & 0xFFFF; // The other bits are a facility code.
+ if (error_code == 52) { // 52 is bad file name or number.
+ // Wait a second and try again.
+ WScript.Sleep(1000);
+ continue;
+ } else {
+ WScript.StdErr.WriteLine("ERROR: Exception caught trying to open file " + ISEFullPath);
+ var exceptionFilePath = ISERunDir + "/exception.log";
+ if (!ISEFileSys.FileExists(exceptionFilePath)) {
+ WScript.StdErr.WriteLine("See file " + exceptionFilePath + " for details.");
+ var exceptionFile = ISEFileSys.OpenTextFile(exceptionFilePath, 8, true);
+ exceptionFile.WriteLine("ERROR: Exception caught trying to open file " + ISEFullPath);
+ exceptionFile.WriteLine("\tException name: " + exception.name);
+ exceptionFile.WriteLine("\tException error code: " + error_code);
+ exceptionFile.WriteLine("\tException message: " + exception.message);
+ exceptionFile.Close();
+ }
+ throw exception;
+ }
+ }
+ }
+ // If we reached this point, we failed to open the file after 10 attempts.
+ // We need to error out.
+ WScript.StdErr.WriteLine("ERROR: Failed to open file " + ISEFullPath);
+ WScript.Quit(1);
+}
diff --git a/proj/AudioProc.runs/synth_1/ISEWrap.sh b/proj/AudioProc.runs/synth_1/ISEWrap.sh
new file mode 100755
index 0000000000000000000000000000000000000000..05d5381379bf87abb6918978ce23d53b6a3e9a78
--- /dev/null
+++ b/proj/AudioProc.runs/synth_1/ISEWrap.sh
@@ -0,0 +1,85 @@
+#!/bin/sh
+
+#
+# Vivado(TM)
+# ISEWrap.sh: Vivado Runs Script for UNIX
+# Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+# Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
+#
+
+cmd_exists()
+{
+ command -v "$1" >/dev/null 2>&1
+}
+
+HD_LOG=$1
+shift
+
+# CHECK for a STOP FILE
+if [ -f .stop.rst ]
+then
+echo "" >> $HD_LOG
+echo "*** Halting run - EA reset detected ***" >> $HD_LOG
+echo "" >> $HD_LOG
+exit 1
+fi
+
+ISE_STEP=$1
+shift
+
+# WRITE STEP HEADER to LOG
+echo "" >> $HD_LOG
+echo "*** Running $ISE_STEP" >> $HD_LOG
+echo " with args $@" >> $HD_LOG
+echo "" >> $HD_LOG
+
+# LAUNCH!
+$ISE_STEP "$@" >> $HD_LOG 2>&1 &
+
+# BEGIN file creation
+ISE_PID=$!
+
+HostNameFile=/proc/sys/kernel/hostname
+if cmd_exists hostname
+then
+ISE_HOST=$(hostname)
+elif cmd_exists uname
+then
+ISE_HOST=$(uname -n)
+elif [ -f "$HostNameFile" ] && [ -r $HostNameFile ] && [ -s $HostNameFile ]
+then
+ISE_HOST=$(cat $HostNameFile)
+elif [ X != X$HOSTNAME ]
+then
+ISE_HOST=$HOSTNAME #bash
+else
+ISE_HOST=$HOST #csh
+fi
+
+ISE_USER=$USER
+
+ISE_HOSTCORE=$(awk '/^processor/{print $3}' /proc/cpuinfo | wc -l)
+ISE_MEMTOTAL=$(awk '/MemTotal/ {print $2}' /proc/meminfo)
+
+ISE_BEGINFILE=.$ISE_STEP.begin.rst
+/bin/touch $ISE_BEGINFILE
+echo "<?xml version=\"1.0\"?>" >> $ISE_BEGINFILE
+echo "<ProcessHandle Version=\"1\" Minor=\"0\">" >> $ISE_BEGINFILE
+echo " <Process Command=\"$ISE_STEP\" Owner=\"$ISE_USER\" Host=\"$ISE_HOST\" Pid=\"$ISE_PID\" HostCore=\"$ISE_HOSTCORE\" HostMemory=\"$ISE_MEMTOTAL\">" >> $ISE_BEGINFILE
+echo " </Process>" >> $ISE_BEGINFILE
+echo "</ProcessHandle>" >> $ISE_BEGINFILE
+
+# WAIT for ISEStep to finish
+wait $ISE_PID
+
+# END/ERROR file creation
+RETVAL=$?
+if [ $RETVAL -eq 0 ]
+then
+ /bin/touch .$ISE_STEP.end.rst
+else
+ /bin/touch .$ISE_STEP.error.rst
+fi
+
+exit $RETVAL
+
diff --git a/proj/AudioProc.runs/synth_1/__synthesis_is_complete__ b/proj/AudioProc.runs/synth_1/__synthesis_is_complete__
new file mode 100644
index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391
diff --git a/proj/AudioProc.runs/synth_1/gen_run.xml b/proj/AudioProc.runs/synth_1/gen_run.xml
new file mode 100644
index 0000000000000000000000000000000000000000..c1d68a19fbd186b1a0b274ed5c97d9f24e11b699
--- /dev/null
+++ b/proj/AudioProc.runs/synth_1/gen_run.xml
@@ -0,0 +1,135 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<GenRun Id="synth_1" LaunchPart="xc7a200tsbg484-1" LaunchTime="1746799385">
+ <File Type="VDS-TIMINGSUMMARY" Name="tb_firUnit_timing_summary_synth.rpt"/>
+ <File Type="RDS-DCP" Name="tb_firUnit.dcp"/>
+ <File Type="RDS-UTIL-PB" Name="tb_firUnit_utilization_synth.pb"/>
+ <File Type="RDS-UTIL" Name="tb_firUnit_utilization_synth.rpt"/>
+ <File Type="VDS-TIMING-PB" Name="tb_firUnit_timing_summary_synth.pb"/>
+ <File Type="PA-TCL" Name="tb_firUnit.tcl"/>
+ <File Type="REPORTS-TCL" Name="tb_firUnit_reports.tcl"/>
+ <File Type="RDS-RDS" Name="tb_firUnit.vds"/>
+ <File Type="RDS-PROPCONSTRS" Name="tb_firUnit_drc_synth.rpt"/>
+ <FileSet Name="sources" Type="DesignSrcs" RelSrcDir="$PSRCDIR/sources_1" RelGenDir="$PGENDIR/sources_1">
+ <Filter Type="Srcs"/>
+ <File Path="$PPRDIR/../src/hdl/operativeUnit.v">
+ <FileInfo>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="implementation"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/controlUnit.vhd">
+ <FileInfo>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/firUnit.vhd">
+ <FileInfo>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/tb_firUnit.vhd">
+ <FileInfo>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/ip/clk_wiz_0/clk_wiz_0.xci">
+ <FileInfo>
+ <Attr Name="AutoDisabled" Val="1"/>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="implementation"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/audio_init.v">
+ <FileInfo>
+ <Attr Name="AutoDisabled" Val="1"/>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="implementation"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/debounce.v">
+ <FileInfo>
+ <Attr Name="AutoDisabled" Val="1"/>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="implementation"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/TWICtl.vhd">
+ <FileInfo>
+ <Attr Name="AutoDisabled" Val="1"/>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/fir.vhd">
+ <FileInfo>
+ <Attr Name="AutoDisabled" Val="1"/>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/i2s_ctl.vhd">
+ <FileInfo>
+ <Attr Name="AutoDisabled" Val="1"/>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/audioProc.v">
+ <FileInfo>
+ <Attr Name="AutoDisabled" Val="1"/>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="implementation"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/operativeUnit.vhd">
+ <FileInfo>
+ <Attr Name="UserDisabled" Val="1"/>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <Config>
+ <Option Name="DesignMode" Val="RTL"/>
+ <Option Name="TopModule" Val="tb_firUnit"/>
+ </Config>
+ </FileSet>
+ <FileSet Name="constrs_in" Type="Constrs" RelSrcDir="$PSRCDIR/constrs_1" RelGenDir="$PGENDIR/constrs_1">
+ <Filter Type="Constrs"/>
+ <File Path="$PPRDIR/../src/constraints/NexysVideo_Master.xdc">
+ <FileInfo>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="implementation"/>
+ </FileInfo>
+ </File>
+ <Config>
+ <Option Name="ConstrsType" Val="XDC"/>
+ </Config>
+ </FileSet>
+ <FileSet Name="utils" Type="Utils" RelSrcDir="$PSRCDIR/utils_1" RelGenDir="$PGENDIR/utils_1">
+ <Filter Type="Utils"/>
+ <Config>
+ <Option Name="TopAutoSet" Val="TRUE"/>
+ </Config>
+ </FileSet>
+ <Strategy Version="1" Minor="2">
+ <StratHandle Name="Flow_PerfOptimized_High" Flow="Vivado Synthesis 2014">
+ <Desc>Higher performance designs, resource sharing is turned off, the global fanout guide is set to a lower number, FSM extraction forced to one-hot, LUT combining is disabled, equivalent registers are preserved, SRL are inferred with a larger threshold</Desc>
+ </StratHandle>
+ <Step Id="synth_design">
+ <Option Id="FsmExtraction">1</Option>
+ <Option Id="KeepEquivalentRegisters">1</Option>
+ <Option Id="NoCombineLuts">1</Option>
+ <Option Id="RepFanoutThreshold">400</Option>
+ <Option Id="ResourceSharing">2</Option>
+ <Option Id="ShregMinSize">5</Option>
+ </Step>
+ </Strategy>
+</GenRun>
diff --git a/proj/AudioProc.runs/synth_1/htr.txt b/proj/AudioProc.runs/synth_1/htr.txt
new file mode 100644
index 0000000000000000000000000000000000000000..1bde59b3a6199f3388ae0edd4201410344cfed60
--- /dev/null
+++ b/proj/AudioProc.runs/synth_1/htr.txt
@@ -0,0 +1,10 @@
+#
+# Vivado(TM)
+# htr.txt: a Vivado-generated description of how-to-repeat the
+# the basic steps of a run. Note that runme.bat/sh needs
+# to be invoked for Vivado to track run status.
+# Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+# Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
+#
+
+vivado -log tb_firUnit.vds -m64 -product Vivado -mode batch -messageDb vivado.pb -notrace -source tb_firUnit.tcl
diff --git a/proj/AudioProc.runs/synth_1/rundef.js b/proj/AudioProc.runs/synth_1/rundef.js
new file mode 100644
index 0000000000000000000000000000000000000000..02e18e3a9e4770e37be32f3d8e4b4aa9d75aaddf
--- /dev/null
+++ b/proj/AudioProc.runs/synth_1/rundef.js
@@ -0,0 +1,41 @@
+//
+// Vivado(TM)
+// rundef.js: a Vivado-generated Runs Script for WSH 5.1/5.6
+// Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+// Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
+//
+
+echo "This script was generated under a different operating system."
+echo "Please update the PATH variable below, before executing this script"
+exit
+
+var WshShell = new ActiveXObject( "WScript.Shell" );
+var ProcEnv = WshShell.Environment( "Process" );
+var PathVal = ProcEnv("PATH");
+if ( PathVal.length == 0 ) {
+ PathVal = "/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vitis/2024.1/bin:/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/ids_lite/ISE/bin/lin64;/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/bin;";
+} else {
+ PathVal = "/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vitis/2024.1/bin:/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/ids_lite/ISE/bin/lin64;/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/bin;" + PathVal;
+}
+
+ProcEnv("PATH") = PathVal;
+
+var RDScrFP = WScript.ScriptFullName;
+var RDScrN = WScript.ScriptName;
+var RDScrDir = RDScrFP.substr( 0, RDScrFP.length - RDScrN.length - 1 );
+var ISEJScriptLib = RDScrDir + "/ISEWrap.js";
+eval( EAInclude(ISEJScriptLib) );
+
+
+ISEStep( "vivado",
+ "-log tb_firUnit.vds -m64 -product Vivado -mode batch -messageDb vivado.pb -notrace -source tb_firUnit.tcl" );
+
+
+
+function EAInclude( EAInclFilename ) {
+ var EAFso = new ActiveXObject( "Scripting.FileSystemObject" );
+ var EAInclFile = EAFso.OpenTextFile( EAInclFilename );
+ var EAIFContents = EAInclFile.ReadAll();
+ EAInclFile.Close();
+ return EAIFContents;
+}
diff --git a/proj/AudioProc.runs/synth_1/runme.bat b/proj/AudioProc.runs/synth_1/runme.bat
new file mode 100644
index 0000000000000000000000000000000000000000..637899f0be2c412b7962cc0b1c6107b95c906461
--- /dev/null
+++ b/proj/AudioProc.runs/synth_1/runme.bat
@@ -0,0 +1,12 @@
+@echo off
+
+rem Vivado (TM)
+rem runme.bat: a Vivado-generated Script
+rem Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+rem Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
+
+
+set HD_SDIR=%~dp0
+cd /d "%HD_SDIR%"
+set PATH=%SYSTEMROOT%\system32;%PATH%
+cscript /nologo /E:JScript "%HD_SDIR%\rundef.js" %*
diff --git a/proj/AudioProc.runs/synth_1/runme.log b/proj/AudioProc.runs/synth_1/runme.log
new file mode 100644
index 0000000000000000000000000000000000000000..0eaa5ce73bf60dbc25c1ede54b71e6f92f4a5b7a
--- /dev/null
+++ b/proj/AudioProc.runs/synth_1/runme.log
@@ -0,0 +1,540 @@
+
+*** Running vivado
+ with args -log tb_firUnit.vds -m64 -product Vivado -mode batch -messageDb vivado.pb -notrace -source tb_firUnit.tcl
+
+
+****** Vivado v2024.1 (64-bit)
+ **** SW Build 5076996 on Wed May 22 18:36:09 MDT 2024
+ **** IP Build 5075265 on Wed May 22 21:45:21 MDT 2024
+ **** SharedData Build 5076995 on Wed May 22 18:29:18 MDT 2024
+ **** Start of session at: Fri May 9 16:03:09 2025
+ ** Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+ ** Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
+
+source tb_firUnit.tcl -notrace
+create_project: Time (s): cpu = 00:00:15 ; elapsed = 00:00:27 . Memory (MB): peak = 1680.684 ; gain = 327.840 ; free physical = 4724 ; free virtual = 14640
+INFO: [IP_Flow 19-234] Refreshing IP repositories
+WARNING: [IP_Flow 19-2248] Failed to load user IP repository '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/repo'; Can't find the specified path.
+If this directory should no longer be in your list of user repositories, go to the IP Settings dialog and remove it.
+INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/data/ip'.
+Command: synth_design -top tb_firUnit -part xc7a200tsbg484-1 -fanout_limit 400 -fsm_extraction one_hot -keep_equivalent_registers -resource_sharing off -no_lc -shreg_min_size 5
+Starting synth_design
+Attempting to get a license for feature 'Synthesis' and/or device 'xc7a200t'
+INFO: [Common 17-349] Got license for feature 'Synthesis' and/or device 'xc7a200t'
+INFO: [Device 21-403] Loading part xc7a200tsbg484-1
+INFO: [Device 21-9227] Part: xc7a200tsbg484-1 does not have CEAM library.
+INFO: [Synth 8-7079] Multithreading enabled for synth_design using a maximum of 4 processes.
+INFO: [Synth 8-7078] Launching helper process for spawning children vivado processes
+INFO: [Synth 8-7075] Helper process launched with PID 111843
+---------------------------------------------------------------------------------
+Starting RTL Elaboration : Time (s): cpu = 00:00:03 ; elapsed = 00:00:05 . Memory (MB): peak = 2498.047 ; gain = 420.559 ; free physical = 3566 ; free virtual = 13535
+---------------------------------------------------------------------------------
+INFO: [Synth 8-638] synthesizing module 'tb_firUnit' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:36]
+WARNING: [Synth 8-312] ignoring unsynthesizable construct: extra waveform elements [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:57]
+WARNING: [Synth 8-312] ignoring unsynthesizable construct: extra waveform elements [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:63]
+INFO: [Synth 8-638] synthesizing module 'firUnit' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd:42]
+INFO: [Synth 8-638] synthesizing module 'controlUnit' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:45]
+INFO: [Synth 8-256] done synthesizing module 'controlUnit' (0#1) [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:45]
+INFO: [Synth 8-6157] synthesizing module 'operativeUnit' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:17]
+INFO: [Synth 8-6157] synthesizing module 'GND' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:41993]
+INFO: [Synth 8-6155] done synthesizing module 'GND' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:41993]
+INFO: [Synth 8-6157] synthesizing module 'BUFG' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:1951]
+INFO: [Synth 8-6155] done synthesizing module 'BUFG' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:1951]
+INFO: [Synth 8-6157] synthesizing module 'IBUF' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:73643]
+INFO: [Synth 8-6155] done synthesizing module 'IBUF' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:73643]
+INFO: [Synth 8-6157] synthesizing module 'OBUF' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:96458]
+INFO: [Synth 8-6155] done synthesizing module 'OBUF' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:96458]
+INFO: [Synth 8-6157] synthesizing module 'LUT3' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:81959]
+ Parameter INIT bound to: 8'b10000000
+INFO: [Synth 8-6155] done synthesizing module 'LUT3' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:81959]
+INFO: [Synth 8-6157] synthesizing module 'DSP48E1' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:39754]
+ Parameter ACASCREG bound to: 0 - type: integer
+ Parameter ADREG bound to: 1 - type: integer
+ Parameter ALUMODEREG bound to: 0 - type: integer
+ Parameter AREG bound to: 0 - type: integer
+ Parameter AUTORESET_PATDET bound to: NO_RESET - type: string
+ Parameter A_INPUT bound to: DIRECT - type: string
+ Parameter BCASCREG bound to: 0 - type: integer
+ Parameter BREG bound to: 0 - type: integer
+ Parameter B_INPUT bound to: DIRECT - type: string
+ Parameter CARRYINREG bound to: 0 - type: integer
+ Parameter CARRYINSELREG bound to: 0 - type: integer
+ Parameter CREG bound to: 0 - type: integer
+ Parameter DREG bound to: 1 - type: integer
+ Parameter INMODEREG bound to: 0 - type: integer
+ Parameter MASK bound to: 48'b001111111111111111111111111111111111111111111111
+ Parameter MREG bound to: 0 - type: integer
+ Parameter OPMODEREG bound to: 0 - type: integer
+ Parameter PATTERN bound to: 48'b000000000000000000000000000000000000000000000000
+ Parameter PREG bound to: 0 - type: integer
+ Parameter SEL_MASK bound to: MASK - type: string
+ Parameter SEL_PATTERN bound to: PATTERN - type: string
+ Parameter USE_DPORT bound to: FALSE - type: string
+ Parameter USE_MULT bound to: MULTIPLY - type: string
+ Parameter USE_PATTERN_DETECT bound to: NO_PATDET - type: string
+ Parameter USE_SIMD bound to: ONE48 - type: string
+INFO: [Synth 8-6155] done synthesizing module 'DSP48E1' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:39754]
+WARNING: [Synth 8-689] width (36) of port connection 'P' does not match port width (48) of module 'DSP48E1' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:422]
+WARNING: [Synth 8-7071] port 'ACOUT' of module 'DSP48E1' is unconnected for instance 'SC_addResult' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:394]
+WARNING: [Synth 8-7071] port 'BCOUT' of module 'DSP48E1' is unconnected for instance 'SC_addResult' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:394]
+WARNING: [Synth 8-7071] port 'CARRYCASCOUT' of module 'DSP48E1' is unconnected for instance 'SC_addResult' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:394]
+WARNING: [Synth 8-7071] port 'CARRYOUT' of module 'DSP48E1' is unconnected for instance 'SC_addResult' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:394]
+WARNING: [Synth 8-7071] port 'MULTSIGNOUT' of module 'DSP48E1' is unconnected for instance 'SC_addResult' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:394]
+WARNING: [Synth 8-7071] port 'OVERFLOW' of module 'DSP48E1' is unconnected for instance 'SC_addResult' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:394]
+WARNING: [Synth 8-7071] port 'PATTERNBDETECT' of module 'DSP48E1' is unconnected for instance 'SC_addResult' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:394]
+WARNING: [Synth 8-7071] port 'PATTERNDETECT' of module 'DSP48E1' is unconnected for instance 'SC_addResult' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:394]
+WARNING: [Synth 8-7071] port 'PCOUT' of module 'DSP48E1' is unconnected for instance 'SC_addResult' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:394]
+WARNING: [Synth 8-7071] port 'UNDERFLOW' of module 'DSP48E1' is unconnected for instance 'SC_addResult' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:394]
+WARNING: [Synth 8-7023] instance 'SC_addResult' of module 'DSP48E1' has 49 connections declared, but only 39 given [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:394]
+INFO: [Synth 8-6157] synthesizing module 'LUT2' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:81921]
+ Parameter INIT bound to: 4'b0110
+INFO: [Synth 8-6155] done synthesizing module 'LUT2' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:81921]
+INFO: [Synth 8-6157] synthesizing module 'LUT4' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+ Parameter INIT bound to: 16'b1011111111111101
+INFO: [Synth 8-6155] done synthesizing module 'LUT4' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+INFO: [Synth 8-6157] synthesizing module 'LUT6' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82097]
+ Parameter INIT bound to: 64'b1010111110100000110011111100111110101111101000001100000011000000
+INFO: [Synth 8-6155] done synthesizing module 'LUT6' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82097]
+INFO: [Synth 8-6157] synthesizing module 'LUT4__parameterized0' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+ Parameter INIT bound to: 16'b0101100000011010
+INFO: [Synth 8-6155] done synthesizing module 'LUT4__parameterized0' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+INFO: [Synth 8-6157] synthesizing module 'LUT4__parameterized1' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+ Parameter INIT bound to: 16'b1111011001101111
+INFO: [Synth 8-6155] done synthesizing module 'LUT4__parameterized1' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+INFO: [Synth 8-6157] synthesizing module 'MUXF8' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:88674]
+INFO: [Synth 8-6155] done synthesizing module 'MUXF8' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:88674]
+INFO: [Synth 8-6157] synthesizing module 'LUT4__parameterized2' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+ Parameter INIT bound to: 16'b0001111001111000
+INFO: [Synth 8-6155] done synthesizing module 'LUT4__parameterized2' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+INFO: [Synth 8-6157] synthesizing module 'MUXF7' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:88637]
+INFO: [Synth 8-6155] done synthesizing module 'MUXF7' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:88637]
+INFO: [Synth 8-6157] synthesizing module 'LUT4__parameterized3' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+ Parameter INIT bound to: 16'b1110100110010111
+INFO: [Synth 8-6155] done synthesizing module 'LUT4__parameterized3' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+INFO: [Synth 8-6157] synthesizing module 'LUT4__parameterized4' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+ Parameter INIT bound to: 16'b0110000110000110
+INFO: [Synth 8-6155] done synthesizing module 'LUT4__parameterized4' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+INFO: [Synth 8-6157] synthesizing module 'LUT3__parameterized0' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:81959]
+ Parameter INIT bound to: 8'b01000010
+INFO: [Synth 8-6155] done synthesizing module 'LUT3__parameterized0' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:81959]
+INFO: [Synth 8-6157] synthesizing module 'LUT4__parameterized5' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+ Parameter INIT bound to: 16'b1010001001000101
+INFO: [Synth 8-6155] done synthesizing module 'LUT4__parameterized5' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+INFO: [Synth 8-6157] synthesizing module 'LUT4__parameterized6' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+ Parameter INIT bound to: 16'b1111000110001111
+INFO: [Synth 8-6155] done synthesizing module 'LUT4__parameterized6' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+INFO: [Synth 8-6157] synthesizing module 'LUT4__parameterized7' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+ Parameter INIT bound to: 16'b1101010110101011
+INFO: [Synth 8-6155] done synthesizing module 'LUT4__parameterized7' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+INFO: [Synth 8-6157] synthesizing module 'FDCE' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:40798]
+ Parameter INIT bound to: 1'b0
+INFO: [Synth 8-6155] done synthesizing module 'FDCE' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:40798]
+INFO: [Synth 8-6157] synthesizing module 'CARRY4' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:2367]
+INFO: [Synth 8-6155] done synthesizing module 'CARRY4' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:2367]
+WARNING: [Synth 8-689] width (3) of port connection 'CO' does not match port width (4) of module 'CARRY4' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:1478]
+INFO: [Synth 8-6157] synthesizing module 'LUT2__parameterized0' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:81921]
+ Parameter INIT bound to: 4'b0001
+INFO: [Synth 8-6155] done synthesizing module 'LUT2__parameterized0' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:81921]
+INFO: [Synth 8-6157] synthesizing module 'LUT3__parameterized1' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:81959]
+ Parameter INIT bound to: 8'b00000110
+INFO: [Synth 8-6155] done synthesizing module 'LUT3__parameterized1' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:81959]
+INFO: [Synth 8-6157] synthesizing module 'LUT4__parameterized8' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+ Parameter INIT bound to: 16'b0000000001101010
+INFO: [Synth 8-6155] done synthesizing module 'LUT4__parameterized8' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+INFO: [Synth 8-6157] synthesizing module 'LUT2__parameterized1' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:81921]
+ Parameter INIT bound to: 4'b1110
+INFO: [Synth 8-6155] done synthesizing module 'LUT2__parameterized1' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:81921]
+INFO: [Synth 8-6157] synthesizing module 'LUT5' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82047]
+ Parameter INIT bound to: 32'b00000000000000000110101010101010
+INFO: [Synth 8-6155] done synthesizing module 'LUT5' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82047]
+INFO: [Synth 8-6157] synthesizing module 'LUT2__parameterized2' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:81921]
+ Parameter INIT bound to: 4'b0010
+INFO: [Synth 8-6155] done synthesizing module 'LUT2__parameterized2' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:81921]
+INFO: [Synth 8-6157] synthesizing module 'VCC' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:140953]
+INFO: [Synth 8-6155] done synthesizing module 'VCC' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:140953]
+INFO: [Synth 8-6155] done synthesizing module 'operativeUnit' (0#1) [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:17]
+INFO: [Synth 8-256] done synthesizing module 'firUnit' (0#1) [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd:42]
+INFO: [Synth 8-256] done synthesizing module 'tb_firUnit' (0#1) [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:36]
+---------------------------------------------------------------------------------
+Finished RTL Elaboration : Time (s): cpu = 00:00:04 ; elapsed = 00:00:07 . Memory (MB): peak = 2578.016 ; gain = 500.527 ; free physical = 3483 ; free virtual = 13442
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Handling Custom Attributes
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Handling Custom Attributes : Time (s): cpu = 00:00:04 ; elapsed = 00:00:07 . Memory (MB): peak = 2595.828 ; gain = 518.340 ; free physical = 3483 ; free virtual = 13442
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished RTL Optimization Phase 1 : Time (s): cpu = 00:00:04 ; elapsed = 00:00:07 . Memory (MB): peak = 2595.828 ; gain = 518.340 ; free physical = 3483 ; free virtual = 13442
+---------------------------------------------------------------------------------
+Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2601.766 ; gain = 0.000 ; free physical = 3475 ; free virtual = 13434
+INFO: [Netlist 29-17] Analyzing 53 Unisim elements for replacement
+INFO: [Netlist 29-28] Unisim Transformation completed in 0 CPU seconds
+INFO: [Project 1-570] Preparing netlist for logic optimization
+
+Processing XDC Constraints
+Initializing timing engine
+Parsing XDC File [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc]
+WARNING: [Vivado 12-584] No ports matched 'CLK100MHZ'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:8]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:8]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'led2'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:14]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:14]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'led3'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:15]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:15]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'led4'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:16]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:16]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'led5'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:17]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:17]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'led6'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:18]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:18]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'led7'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:19]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:19]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'BTNC'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:23]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:23]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'BTND'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:24]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:24]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'BTNL'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:25]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:25]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'BTNR'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:26]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:26]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'BTNU'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:27]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:27]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'rstn'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:28]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:28]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sw'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:32]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:32]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sw2'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:34]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:34]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sw3'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:35]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:35]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sw4'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:36]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:36]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sw5'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:37]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:37]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sw6'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:38]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:38]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sw7'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:39]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:39]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'ac_adc_sdata'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:91]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:91]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'ac_bclk'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:92]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:92]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'ac_dac_sdata'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:93]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:93]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'ac_lrclk'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:94]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:94]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'ac_mclk'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:95]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:95]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'scl'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:202]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:202]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sda'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:203]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:203]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+Finished Parsing XDC File [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc]
+Completed Processing XDC Constraints
+
+Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2668.766 ; gain = 0.000 ; free physical = 3452 ; free virtual = 13420
+INFO: [Project 1-111] Unisim Transformation Summary:
+No Unisim elements were transformed.
+
+Constraint Validation Runtime : Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.02 . Memory (MB): peak = 2668.766 ; gain = 0.000 ; free physical = 3452 ; free virtual = 13420
+---------------------------------------------------------------------------------
+Finished Constraint Validation : Time (s): cpu = 00:00:10 ; elapsed = 00:00:15 . Memory (MB): peak = 2668.766 ; gain = 591.277 ; free physical = 3385 ; free virtual = 13378
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Loading Part and Timing Information
+---------------------------------------------------------------------------------
+Loading part: xc7a200tsbg484-1
+---------------------------------------------------------------------------------
+Finished Loading Part and Timing Information : Time (s): cpu = 00:00:10 ; elapsed = 00:00:16 . Memory (MB): peak = 2676.770 ; gain = 599.281 ; free physical = 3385 ; free virtual = 13378
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Applying 'set_property' XDC Constraints
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished applying 'set_property' XDC Constraints : Time (s): cpu = 00:00:10 ; elapsed = 00:00:16 . Memory (MB): peak = 2676.770 ; gain = 599.281 ; free physical = 3378 ; free virtual = 13374
+---------------------------------------------------------------------------------
+INFO: [Synth 8-802] inferred FSM for state register 'SR_currentState_reg' in module 'controlUnit'
+---------------------------------------------------------------------------------------------------
+ State | New Encoding | Previous Encoding
+---------------------------------------------------------------------------------------------------
+ wait_sample | 000001 | 000
+ store | 000010 | 001
+ processing_loop | 000100 | 010
+ output | 001000 | 011
+ wait_end_sample | 010000 | 100
+ iSTATE | 100000 | 111
+---------------------------------------------------------------------------------------------------
+INFO: [Synth 8-3354] encoded FSM with state register 'SR_currentState_reg' using encoding 'one-hot' in module 'controlUnit'
+WARNING: [Synth 8-327] inferring latch for variable 'FSM_onehot_SR_nextState_reg' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:62]
+---------------------------------------------------------------------------------
+Finished RTL Optimization Phase 2 : Time (s): cpu = 00:00:10 ; elapsed = 00:00:16 . Memory (MB): peak = 2676.770 ; gain = 599.281 ; free physical = 3354 ; free virtual = 13366
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start RTL Component Statistics
+---------------------------------------------------------------------------------
+Detailed RTL Component Info :
++---Muxes :
+ 5 Input 6 Bit Muxes := 1
+ 2 Input 6 Bit Muxes := 1
+ 6 Input 3 Bit Muxes := 1
+ 6 Input 1 Bit Muxes := 2
+ 2 Input 1 Bit Muxes := 6
+---------------------------------------------------------------------------------
+Finished RTL Component Statistics
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Part Resource Summary
+---------------------------------------------------------------------------------
+Part Resources:
+DSPs: 740 (col length:100)
+BRAMs: 730 (col length: RAMB18 100 RAMB36 50)
+---------------------------------------------------------------------------------
+Finished Part Resource Summary
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Cross Boundary and Area Optimization
+---------------------------------------------------------------------------------
+WARNING: [Synth 8-7080] Parallel synthesis criteria is not met
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/controlUnit_1/FSM_onehot_SR_currentState_reg[5]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/controlUnit_1/FSM_onehot_SR_currentState_reg[4]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/controlUnit_1/FSM_onehot_SR_currentState_reg[3]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/controlUnit_1/FSM_onehot_SR_currentState_reg[2]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/controlUnit_1/FSM_onehot_SR_currentState_reg[1]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/controlUnit_1/FSM_onehot_SR_currentState_reg[0]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/controlUnit_1/FSM_onehot_SR_nextState_reg[5]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/controlUnit_1/FSM_onehot_SR_nextState_reg[4]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/controlUnit_1/FSM_onehot_SR_nextState_reg[3]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/controlUnit_1/FSM_onehot_SR_nextState_reg[2]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/controlUnit_1/FSM_onehot_SR_nextState_reg[1]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/controlUnit_1/FSM_onehot_SR_nextState_reg[0]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_incrAddress_IBUF_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_initAddress_IBUF_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_initSum_IBUF_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[0]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[10]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[11]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[12]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[13]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[14]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[15]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[1]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[2]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[3]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[4]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[5]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[6]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[7]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[8]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[9]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_loadOutput_IBUF_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_loadShift_IBUF_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_loadSum_IBUF_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_reset_IBUF_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[0]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[10]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[11]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[12]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[13]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[14]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[15]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[1]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[2]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[3]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[4]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[5]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[6]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[7]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[8]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[9]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_processingDone_OBUF_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[0]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[10]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[11]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[12]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[13]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[14]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[15]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[1]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[2]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[3]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[4]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[5]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[6]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[7]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[8]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[9]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_readAddress_reg[0]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_readAddress_reg[1]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_readAddress_reg[2]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_readAddress_reg[3]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][0]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][10]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][11]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][12]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][13]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][14]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][15]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][1]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][2]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][3]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][4]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][5]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][6]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][7]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][8]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][9]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[10][0]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[10][10]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[10][11]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[10][12]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[10][13]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[10][14]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[10][15]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[10][1]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[10][2]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[10][3]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[10][4]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[10][5]) is unused and will be removed from module tb_firUnit.
+INFO: [Common 17-14] Message 'Synth 8-3332' appears 100 times and further instances of the messages will be disabled. Use the Tcl command set_msg_config to change the current settings.
+---------------------------------------------------------------------------------
+Finished Cross Boundary and Area Optimization : Time (s): cpu = 00:00:11 ; elapsed = 00:00:18 . Memory (MB): peak = 2676.770 ; gain = 599.281 ; free physical = 3300 ; free virtual = 13357
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Applying XDC Timing Constraints
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Applying XDC Timing Constraints : Time (s): cpu = 00:00:16 ; elapsed = 00:00:23 . Memory (MB): peak = 2676.770 ; gain = 599.281 ; free physical = 3243 ; free virtual = 13231
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Timing Optimization
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Timing Optimization : Time (s): cpu = 00:00:16 ; elapsed = 00:00:23 . Memory (MB): peak = 2676.770 ; gain = 599.281 ; free physical = 3243 ; free virtual = 13231
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Technology Mapping
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Technology Mapping : Time (s): cpu = 00:00:16 ; elapsed = 00:00:23 . Memory (MB): peak = 2676.770 ; gain = 599.281 ; free physical = 3243 ; free virtual = 13232
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start IO Insertion
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Flattening Before IO Insertion
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Flattening Before IO Insertion
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Final Netlist Cleanup
+---------------------------------------------------------------------------------
+WARNING: synth_design option "-fanout_limit" is deprecated.
+---------------------------------------------------------------------------------
+Finished Final Netlist Cleanup
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished IO Insertion : Time (s): cpu = 00:00:19 ; elapsed = 00:00:26 . Memory (MB): peak = 2676.770 ; gain = 599.281 ; free physical = 3264 ; free virtual = 13252
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Renaming Generated Instances
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Renaming Generated Instances : Time (s): cpu = 00:00:19 ; elapsed = 00:00:26 . Memory (MB): peak = 2676.770 ; gain = 599.281 ; free physical = 3264 ; free virtual = 13252
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Rebuilding User Hierarchy
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Rebuilding User Hierarchy : Time (s): cpu = 00:00:19 ; elapsed = 00:00:26 . Memory (MB): peak = 2676.770 ; gain = 599.281 ; free physical = 3265 ; free virtual = 13254
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Renaming Generated Ports
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Renaming Generated Ports : Time (s): cpu = 00:00:19 ; elapsed = 00:00:26 . Memory (MB): peak = 2676.770 ; gain = 599.281 ; free physical = 3266 ; free virtual = 13255
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Handling Custom Attributes
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Handling Custom Attributes : Time (s): cpu = 00:00:19 ; elapsed = 00:00:26 . Memory (MB): peak = 2676.770 ; gain = 599.281 ; free physical = 3266 ; free virtual = 13255
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Renaming Generated Nets
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Renaming Generated Nets : Time (s): cpu = 00:00:19 ; elapsed = 00:00:26 . Memory (MB): peak = 2676.770 ; gain = 599.281 ; free physical = 3266 ; free virtual = 13255
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Writing Synthesis Report
+---------------------------------------------------------------------------------
+
+Report BlackBoxes:
++-+--------------+----------+
+| |BlackBox name |Instances |
++-+--------------+----------+
++-+--------------+----------+
+
+Report Cell Usage:
++------+-----+------+
+| |Cell |Count |
++------+-----+------+
+|1 |BUFG | 1|
+|2 |LUT1 | 1|
+|3 |IBUF | 1|
++------+-----+------+
+---------------------------------------------------------------------------------
+Finished Writing Synthesis Report : Time (s): cpu = 00:00:19 ; elapsed = 00:00:26 . Memory (MB): peak = 2676.770 ; gain = 599.281 ; free physical = 3266 ; free virtual = 13255
+---------------------------------------------------------------------------------
+Synthesis finished with 0 errors, 0 critical warnings and 366 warnings.
+Synthesis Optimization Runtime : Time (s): cpu = 00:00:17 ; elapsed = 00:00:23 . Memory (MB): peak = 2676.770 ; gain = 526.344 ; free physical = 3266 ; free virtual = 13254
+Synthesis Optimization Complete : Time (s): cpu = 00:00:19 ; elapsed = 00:00:26 . Memory (MB): peak = 2676.777 ; gain = 599.281 ; free physical = 3265 ; free virtual = 13254
+INFO: [Project 1-571] Translating synthesized netlist
+Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2676.777 ; gain = 0.000 ; free physical = 3264 ; free virtual = 13254
+INFO: [Project 1-570] Preparing netlist for logic optimization
+WARNING: [Opt 31-32] Removing redundant IBUF since it is not being driven by a top-level port. firUnit_1/operativeUnit_1/I_clock_IBUF_inst
+Resolution: The tool has removed redundant IBUF. To resolve this warning, check for redundant IBUF in the input design.
+INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
+Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2676.777 ; gain = 0.000 ; free physical = 3561 ; free virtual = 13553
+INFO: [Project 1-111] Unisim Transformation Summary:
+No Unisim elements were transformed.
+
+Synth Design complete | Checksum: 1fc2f979
+INFO: [Common 17-83] Releasing license: Synthesis
+86 Infos, 146 Warnings, 27 Critical Warnings and 0 Errors encountered.
+synth_design completed successfully
+synth_design: Time (s): cpu = 00:00:26 ; elapsed = 00:00:43 . Memory (MB): peak = 2676.777 ; gain = 992.125 ; free physical = 3563 ; free virtual = 13555
+INFO: [Common 17-2834] synth_design peak Physical Memory [PSS] (MB): overall = 2220.538; main = 1897.222; forked = 375.091
+INFO: [Common 17-2834] synth_design peak Virtual Memory [VSS] (MB): overall = 3718.098; main = 2676.773; forked = 1041.324
+INFO: [runtcl-6] Synthesis results are not added to the cache due to CRITICAL_WARNING
+INFO: [Common 17-1381] The checkpoint '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.runs/synth_1/tb_firUnit.dcp' has been generated.
+INFO: [Vivado 12-24828] Executing command : report_utilization -file tb_firUnit_utilization_synth.rpt -pb tb_firUnit_utilization_synth.pb
+INFO: [Common 17-206] Exiting Vivado at Fri May 9 16:04:40 2025...
diff --git a/proj/AudioProc.runs/synth_1/runme.sh b/proj/AudioProc.runs/synth_1/runme.sh
new file mode 100755
index 0000000000000000000000000000000000000000..32f569d7d576fa57a1b72ae4784133c8c1600244
--- /dev/null
+++ b/proj/AudioProc.runs/synth_1/runme.sh
@@ -0,0 +1,40 @@
+#!/bin/sh
+
+#
+# Vivado(TM)
+# runme.sh: a Vivado-generated Runs Script for UNIX
+# Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+# Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
+#
+
+if [ -z "$PATH" ]; then
+ PATH=/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vitis/2024.1/bin:/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/ids_lite/ISE/bin/lin64:/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/bin
+else
+ PATH=/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vitis/2024.1/bin:/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/ids_lite/ISE/bin/lin64:/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/bin:$PATH
+fi
+export PATH
+
+if [ -z "$LD_LIBRARY_PATH" ]; then
+ LD_LIBRARY_PATH=
+else
+ LD_LIBRARY_PATH=:$LD_LIBRARY_PATH
+fi
+export LD_LIBRARY_PATH
+
+HD_PWD='/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.runs/synth_1'
+cd "$HD_PWD"
+
+HD_LOG=runme.log
+/bin/touch $HD_LOG
+
+ISEStep="./ISEWrap.sh"
+EAStep()
+{
+ $ISEStep $HD_LOG "$@" >> $HD_LOG 2>&1
+ if [ $? -ne 0 ]
+ then
+ exit
+ fi
+}
+
+EAStep vivado -log tb_firUnit.vds -m64 -product Vivado -mode batch -messageDb vivado.pb -notrace -source tb_firUnit.tcl
diff --git a/proj/AudioProc.runs/synth_1/tb_firUnit.dcp b/proj/AudioProc.runs/synth_1/tb_firUnit.dcp
new file mode 100644
index 0000000000000000000000000000000000000000..f0096280a919e3d4c9b7665975d057766fac19b6
Binary files /dev/null and b/proj/AudioProc.runs/synth_1/tb_firUnit.dcp differ
diff --git a/proj/AudioProc.runs/synth_1/tb_firUnit.tcl b/proj/AudioProc.runs/synth_1/tb_firUnit.tcl
new file mode 100644
index 0000000000000000000000000000000000000000..e97fca84357cb73464ba2e5345afdf499dd6aa3a
--- /dev/null
+++ b/proj/AudioProc.runs/synth_1/tb_firUnit.tcl
@@ -0,0 +1,114 @@
+#
+# Synthesis run script generated by Vivado
+#
+
+set TIME_start [clock seconds]
+namespace eval ::optrace {
+ variable script "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.runs/synth_1/tb_firUnit.tcl"
+ variable category "vivado_synth"
+}
+
+# Try to connect to running dispatch if we haven't done so already.
+# This code assumes that the Tcl interpreter is not using threads,
+# since the ::dispatch::connected variable isn't mutex protected.
+if {![info exists ::dispatch::connected]} {
+ namespace eval ::dispatch {
+ variable connected false
+ if {[llength [array get env XILINX_CD_CONNECT_ID]] > 0} {
+ set result "true"
+ if {[catch {
+ if {[lsearch -exact [package names] DispatchTcl] < 0} {
+ set result [load librdi_cd_clienttcl[info sharedlibextension]]
+ }
+ if {$result eq "false"} {
+ puts "WARNING: Could not load dispatch client library"
+ }
+ set connect_id [ ::dispatch::init_client -mode EXISTING_SERVER ]
+ if { $connect_id eq "" } {
+ puts "WARNING: Could not initialize dispatch client"
+ } else {
+ puts "INFO: Dispatch client connection id - $connect_id"
+ set connected true
+ }
+ } catch_res]} {
+ puts "WARNING: failed to connect to dispatch server - $catch_res"
+ }
+ }
+ }
+}
+if {$::dispatch::connected} {
+ # Remove the dummy proc if it exists.
+ if { [expr {[llength [info procs ::OPTRACE]] > 0}] } {
+ rename ::OPTRACE ""
+ }
+ proc ::OPTRACE { task action {tags {} } } {
+ ::vitis_log::op_trace "$task" $action -tags $tags -script $::optrace::script -category $::optrace::category
+ }
+ # dispatch is generic. We specifically want to attach logging.
+ ::vitis_log::connect_client
+} else {
+ # Add dummy proc if it doesn't exist.
+ if { [expr {[llength [info procs ::OPTRACE]] == 0}] } {
+ proc ::OPTRACE {{arg1 \"\" } {arg2 \"\"} {arg3 \"\" } {arg4 \"\"} {arg5 \"\" } {arg6 \"\"}} {
+ # Do nothing
+ }
+ }
+}
+
+OPTRACE "synth_1" START { ROLLUP_AUTO }
+OPTRACE "Creating in-memory project" START { }
+create_project -in_memory -part xc7a200tsbg484-1
+
+set_param project.singleFileAddWarning.threshold 0
+set_param project.compositeFile.enableAutoGeneration 0
+set_param synth.vivado.isSynthRun true
+set_property webtalk.parent_dir /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.cache/wt [current_project]
+set_property parent.project_path /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.xpr [current_project]
+set_property default_lib xil_defaultlib [current_project]
+set_property target_language VHDL [current_project]
+set_property ip_repo_paths /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/repo [current_project]
+update_ip_catalog
+set_property ip_output_repo /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.cache/ip [current_project]
+set_property ip_cache_permissions {read write} [current_project]
+OPTRACE "Creating in-memory project" END { }
+OPTRACE "Adding files" START { }
+read_verilog -library xil_defaultlib /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v
+read_vhdl -library xil_defaultlib {
+ /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd
+ /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd
+ /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd
+}
+OPTRACE "Adding files" END { }
+# Mark all dcp files as not used in implementation to prevent them from being
+# stitched into the results of this synthesis run. Any black boxes in the
+# design are intentionally left as such for best results. Dcp files will be
+# stitched into the design at a later time, either when this synthesis run is
+# opened, or when it is stitched into a dependent implementation run.
+foreach dcp [get_files -quiet -all -filter file_type=="Design\ Checkpoint"] {
+ set_property used_in_implementation false $dcp
+}
+read_xdc /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc
+set_property used_in_implementation false [get_files /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc]
+
+set_param ips.enableIPCacheLiteLoad 1
+close [open __synthesis_is_running__ w]
+
+OPTRACE "synth_design" START { }
+synth_design -top tb_firUnit -part xc7a200tsbg484-1 -fanout_limit 400 -fsm_extraction one_hot -keep_equivalent_registers -resource_sharing off -no_lc -shreg_min_size 5
+OPTRACE "synth_design" END { }
+if { [get_msg_config -count -severity {CRITICAL WARNING}] > 0 } {
+ send_msg_id runtcl-6 info "Synthesis results are not added to the cache due to CRITICAL_WARNING"
+}
+
+
+OPTRACE "write_checkpoint" START { CHECKPOINT }
+# disable binary constraint mode for synth run checkpoints
+set_param constraints.enableBinaryConstraints false
+write_checkpoint -force -noxdef tb_firUnit.dcp
+OPTRACE "write_checkpoint" END { }
+OPTRACE "synth reports" START { REPORT }
+generate_parallel_reports -reports { "report_utilization -file tb_firUnit_utilization_synth.rpt -pb tb_firUnit_utilization_synth.pb" }
+OPTRACE "synth reports" END { }
+file delete __synthesis_is_running__
+close [open __synthesis_is_complete__ w]
+OPTRACE "synth_1" END { }
diff --git a/proj/AudioProc.runs/synth_1/tb_firUnit.vds b/proj/AudioProc.runs/synth_1/tb_firUnit.vds
new file mode 100644
index 0000000000000000000000000000000000000000..d3c7a9d1b98d19251fe2be69125a62c661fe60c1
--- /dev/null
+++ b/proj/AudioProc.runs/synth_1/tb_firUnit.vds
@@ -0,0 +1,550 @@
+#-----------------------------------------------------------
+# Vivado v2024.1 (64-bit)
+# SW Build 5076996 on Wed May 22 18:36:09 MDT 2024
+# IP Build 5075265 on Wed May 22 21:45:21 MDT 2024
+# SharedData Build 5076995 on Wed May 22 18:29:18 MDT 2024
+# Start of session at: Fri May 9 16:03:09 2025
+# Process ID: 111655
+# Current directory: /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.runs/synth_1
+# Command line: vivado -log tb_firUnit.vds -product Vivado -mode batch -messageDb vivado.pb -notrace -source tb_firUnit.tcl
+# Log file: /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.runs/synth_1/tb_firUnit.vds
+# Journal file: /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.runs/synth_1/vivado.jou
+# Running On :fl-tp-br-515
+# Platform :Ubuntu
+# Operating System :Ubuntu 24.04.2 LTS
+# Processor Detail :Intel(R) Core(TM) i5-10500 CPU @ 3.10GHz
+# CPU Frequency :4099.955 MHz
+# CPU Physical cores:6
+# CPU Logical cores :12
+# Host memory :16533 MB
+# Swap memory :4294 MB
+# Total Virtual :20828 MB
+# Available Virtual :15956 MB
+#-----------------------------------------------------------
+source tb_firUnit.tcl -notrace
+create_project: Time (s): cpu = 00:00:15 ; elapsed = 00:00:27 . Memory (MB): peak = 1680.684 ; gain = 327.840 ; free physical = 4724 ; free virtual = 14640
+INFO: [IP_Flow 19-234] Refreshing IP repositories
+WARNING: [IP_Flow 19-2248] Failed to load user IP repository '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/repo'; Can't find the specified path.
+If this directory should no longer be in your list of user repositories, go to the IP Settings dialog and remove it.
+INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/data/ip'.
+Command: synth_design -top tb_firUnit -part xc7a200tsbg484-1 -fanout_limit 400 -fsm_extraction one_hot -keep_equivalent_registers -resource_sharing off -no_lc -shreg_min_size 5
+Starting synth_design
+Attempting to get a license for feature 'Synthesis' and/or device 'xc7a200t'
+INFO: [Common 17-349] Got license for feature 'Synthesis' and/or device 'xc7a200t'
+INFO: [Device 21-403] Loading part xc7a200tsbg484-1
+INFO: [Device 21-9227] Part: xc7a200tsbg484-1 does not have CEAM library.
+INFO: [Synth 8-7079] Multithreading enabled for synth_design using a maximum of 4 processes.
+INFO: [Synth 8-7078] Launching helper process for spawning children vivado processes
+INFO: [Synth 8-7075] Helper process launched with PID 111843
+---------------------------------------------------------------------------------
+Starting RTL Elaboration : Time (s): cpu = 00:00:03 ; elapsed = 00:00:05 . Memory (MB): peak = 2498.047 ; gain = 420.559 ; free physical = 3566 ; free virtual = 13535
+---------------------------------------------------------------------------------
+INFO: [Synth 8-638] synthesizing module 'tb_firUnit' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:36]
+WARNING: [Synth 8-312] ignoring unsynthesizable construct: extra waveform elements [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:57]
+WARNING: [Synth 8-312] ignoring unsynthesizable construct: extra waveform elements [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:63]
+INFO: [Synth 8-638] synthesizing module 'firUnit' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd:42]
+INFO: [Synth 8-638] synthesizing module 'controlUnit' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:45]
+INFO: [Synth 8-256] done synthesizing module 'controlUnit' (0#1) [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:45]
+INFO: [Synth 8-6157] synthesizing module 'operativeUnit' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:17]
+INFO: [Synth 8-6157] synthesizing module 'GND' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:41993]
+INFO: [Synth 8-6155] done synthesizing module 'GND' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:41993]
+INFO: [Synth 8-6157] synthesizing module 'BUFG' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:1951]
+INFO: [Synth 8-6155] done synthesizing module 'BUFG' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:1951]
+INFO: [Synth 8-6157] synthesizing module 'IBUF' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:73643]
+INFO: [Synth 8-6155] done synthesizing module 'IBUF' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:73643]
+INFO: [Synth 8-6157] synthesizing module 'OBUF' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:96458]
+INFO: [Synth 8-6155] done synthesizing module 'OBUF' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:96458]
+INFO: [Synth 8-6157] synthesizing module 'LUT3' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:81959]
+ Parameter INIT bound to: 8'b10000000
+INFO: [Synth 8-6155] done synthesizing module 'LUT3' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:81959]
+INFO: [Synth 8-6157] synthesizing module 'DSP48E1' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:39754]
+ Parameter ACASCREG bound to: 0 - type: integer
+ Parameter ADREG bound to: 1 - type: integer
+ Parameter ALUMODEREG bound to: 0 - type: integer
+ Parameter AREG bound to: 0 - type: integer
+ Parameter AUTORESET_PATDET bound to: NO_RESET - type: string
+ Parameter A_INPUT bound to: DIRECT - type: string
+ Parameter BCASCREG bound to: 0 - type: integer
+ Parameter BREG bound to: 0 - type: integer
+ Parameter B_INPUT bound to: DIRECT - type: string
+ Parameter CARRYINREG bound to: 0 - type: integer
+ Parameter CARRYINSELREG bound to: 0 - type: integer
+ Parameter CREG bound to: 0 - type: integer
+ Parameter DREG bound to: 1 - type: integer
+ Parameter INMODEREG bound to: 0 - type: integer
+ Parameter MASK bound to: 48'b001111111111111111111111111111111111111111111111
+ Parameter MREG bound to: 0 - type: integer
+ Parameter OPMODEREG bound to: 0 - type: integer
+ Parameter PATTERN bound to: 48'b000000000000000000000000000000000000000000000000
+ Parameter PREG bound to: 0 - type: integer
+ Parameter SEL_MASK bound to: MASK - type: string
+ Parameter SEL_PATTERN bound to: PATTERN - type: string
+ Parameter USE_DPORT bound to: FALSE - type: string
+ Parameter USE_MULT bound to: MULTIPLY - type: string
+ Parameter USE_PATTERN_DETECT bound to: NO_PATDET - type: string
+ Parameter USE_SIMD bound to: ONE48 - type: string
+INFO: [Synth 8-6155] done synthesizing module 'DSP48E1' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:39754]
+WARNING: [Synth 8-689] width (36) of port connection 'P' does not match port width (48) of module 'DSP48E1' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:422]
+WARNING: [Synth 8-7071] port 'ACOUT' of module 'DSP48E1' is unconnected for instance 'SC_addResult' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:394]
+WARNING: [Synth 8-7071] port 'BCOUT' of module 'DSP48E1' is unconnected for instance 'SC_addResult' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:394]
+WARNING: [Synth 8-7071] port 'CARRYCASCOUT' of module 'DSP48E1' is unconnected for instance 'SC_addResult' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:394]
+WARNING: [Synth 8-7071] port 'CARRYOUT' of module 'DSP48E1' is unconnected for instance 'SC_addResult' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:394]
+WARNING: [Synth 8-7071] port 'MULTSIGNOUT' of module 'DSP48E1' is unconnected for instance 'SC_addResult' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:394]
+WARNING: [Synth 8-7071] port 'OVERFLOW' of module 'DSP48E1' is unconnected for instance 'SC_addResult' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:394]
+WARNING: [Synth 8-7071] port 'PATTERNBDETECT' of module 'DSP48E1' is unconnected for instance 'SC_addResult' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:394]
+WARNING: [Synth 8-7071] port 'PATTERNDETECT' of module 'DSP48E1' is unconnected for instance 'SC_addResult' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:394]
+WARNING: [Synth 8-7071] port 'PCOUT' of module 'DSP48E1' is unconnected for instance 'SC_addResult' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:394]
+WARNING: [Synth 8-7071] port 'UNDERFLOW' of module 'DSP48E1' is unconnected for instance 'SC_addResult' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:394]
+WARNING: [Synth 8-7023] instance 'SC_addResult' of module 'DSP48E1' has 49 connections declared, but only 39 given [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:394]
+INFO: [Synth 8-6157] synthesizing module 'LUT2' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:81921]
+ Parameter INIT bound to: 4'b0110
+INFO: [Synth 8-6155] done synthesizing module 'LUT2' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:81921]
+INFO: [Synth 8-6157] synthesizing module 'LUT4' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+ Parameter INIT bound to: 16'b1011111111111101
+INFO: [Synth 8-6155] done synthesizing module 'LUT4' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+INFO: [Synth 8-6157] synthesizing module 'LUT6' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82097]
+ Parameter INIT bound to: 64'b1010111110100000110011111100111110101111101000001100000011000000
+INFO: [Synth 8-6155] done synthesizing module 'LUT6' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82097]
+INFO: [Synth 8-6157] synthesizing module 'LUT4__parameterized0' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+ Parameter INIT bound to: 16'b0101100000011010
+INFO: [Synth 8-6155] done synthesizing module 'LUT4__parameterized0' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+INFO: [Synth 8-6157] synthesizing module 'LUT4__parameterized1' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+ Parameter INIT bound to: 16'b1111011001101111
+INFO: [Synth 8-6155] done synthesizing module 'LUT4__parameterized1' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+INFO: [Synth 8-6157] synthesizing module 'MUXF8' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:88674]
+INFO: [Synth 8-6155] done synthesizing module 'MUXF8' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:88674]
+INFO: [Synth 8-6157] synthesizing module 'LUT4__parameterized2' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+ Parameter INIT bound to: 16'b0001111001111000
+INFO: [Synth 8-6155] done synthesizing module 'LUT4__parameterized2' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+INFO: [Synth 8-6157] synthesizing module 'MUXF7' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:88637]
+INFO: [Synth 8-6155] done synthesizing module 'MUXF7' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:88637]
+INFO: [Synth 8-6157] synthesizing module 'LUT4__parameterized3' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+ Parameter INIT bound to: 16'b1110100110010111
+INFO: [Synth 8-6155] done synthesizing module 'LUT4__parameterized3' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+INFO: [Synth 8-6157] synthesizing module 'LUT4__parameterized4' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+ Parameter INIT bound to: 16'b0110000110000110
+INFO: [Synth 8-6155] done synthesizing module 'LUT4__parameterized4' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+INFO: [Synth 8-6157] synthesizing module 'LUT3__parameterized0' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:81959]
+ Parameter INIT bound to: 8'b01000010
+INFO: [Synth 8-6155] done synthesizing module 'LUT3__parameterized0' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:81959]
+INFO: [Synth 8-6157] synthesizing module 'LUT4__parameterized5' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+ Parameter INIT bound to: 16'b1010001001000101
+INFO: [Synth 8-6155] done synthesizing module 'LUT4__parameterized5' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+INFO: [Synth 8-6157] synthesizing module 'LUT4__parameterized6' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+ Parameter INIT bound to: 16'b1111000110001111
+INFO: [Synth 8-6155] done synthesizing module 'LUT4__parameterized6' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+INFO: [Synth 8-6157] synthesizing module 'LUT4__parameterized7' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+ Parameter INIT bound to: 16'b1101010110101011
+INFO: [Synth 8-6155] done synthesizing module 'LUT4__parameterized7' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+INFO: [Synth 8-6157] synthesizing module 'FDCE' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:40798]
+ Parameter INIT bound to: 1'b0
+INFO: [Synth 8-6155] done synthesizing module 'FDCE' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:40798]
+INFO: [Synth 8-6157] synthesizing module 'CARRY4' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:2367]
+INFO: [Synth 8-6155] done synthesizing module 'CARRY4' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:2367]
+WARNING: [Synth 8-689] width (3) of port connection 'CO' does not match port width (4) of module 'CARRY4' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:1478]
+INFO: [Synth 8-6157] synthesizing module 'LUT2__parameterized0' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:81921]
+ Parameter INIT bound to: 4'b0001
+INFO: [Synth 8-6155] done synthesizing module 'LUT2__parameterized0' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:81921]
+INFO: [Synth 8-6157] synthesizing module 'LUT3__parameterized1' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:81959]
+ Parameter INIT bound to: 8'b00000110
+INFO: [Synth 8-6155] done synthesizing module 'LUT3__parameterized1' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:81959]
+INFO: [Synth 8-6157] synthesizing module 'LUT4__parameterized8' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+ Parameter INIT bound to: 16'b0000000001101010
+INFO: [Synth 8-6155] done synthesizing module 'LUT4__parameterized8' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82001]
+INFO: [Synth 8-6157] synthesizing module 'LUT2__parameterized1' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:81921]
+ Parameter INIT bound to: 4'b1110
+INFO: [Synth 8-6155] done synthesizing module 'LUT2__parameterized1' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:81921]
+INFO: [Synth 8-6157] synthesizing module 'LUT5' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82047]
+ Parameter INIT bound to: 32'b00000000000000000110101010101010
+INFO: [Synth 8-6155] done synthesizing module 'LUT5' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:82047]
+INFO: [Synth 8-6157] synthesizing module 'LUT2__parameterized2' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:81921]
+ Parameter INIT bound to: 4'b0010
+INFO: [Synth 8-6155] done synthesizing module 'LUT2__parameterized2' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:81921]
+INFO: [Synth 8-6157] synthesizing module 'VCC' [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:140953]
+INFO: [Synth 8-6155] done synthesizing module 'VCC' (0#1) [/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/scripts/rt/data/unisim_comp.v:140953]
+INFO: [Synth 8-6155] done synthesizing module 'operativeUnit' (0#1) [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:17]
+INFO: [Synth 8-256] done synthesizing module 'firUnit' (0#1) [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd:42]
+INFO: [Synth 8-256] done synthesizing module 'tb_firUnit' (0#1) [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:36]
+---------------------------------------------------------------------------------
+Finished RTL Elaboration : Time (s): cpu = 00:00:04 ; elapsed = 00:00:07 . Memory (MB): peak = 2578.016 ; gain = 500.527 ; free physical = 3483 ; free virtual = 13442
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Handling Custom Attributes
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Handling Custom Attributes : Time (s): cpu = 00:00:04 ; elapsed = 00:00:07 . Memory (MB): peak = 2595.828 ; gain = 518.340 ; free physical = 3483 ; free virtual = 13442
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished RTL Optimization Phase 1 : Time (s): cpu = 00:00:04 ; elapsed = 00:00:07 . Memory (MB): peak = 2595.828 ; gain = 518.340 ; free physical = 3483 ; free virtual = 13442
+---------------------------------------------------------------------------------
+Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2601.766 ; gain = 0.000 ; free physical = 3475 ; free virtual = 13434
+INFO: [Netlist 29-17] Analyzing 53 Unisim elements for replacement
+INFO: [Netlist 29-28] Unisim Transformation completed in 0 CPU seconds
+INFO: [Project 1-570] Preparing netlist for logic optimization
+
+Processing XDC Constraints
+Initializing timing engine
+Parsing XDC File [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc]
+WARNING: [Vivado 12-584] No ports matched 'CLK100MHZ'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:8]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:8]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'led2'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:14]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:14]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'led3'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:15]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:15]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'led4'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:16]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:16]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'led5'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:17]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:17]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'led6'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:18]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:18]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'led7'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:19]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:19]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'BTNC'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:23]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:23]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'BTND'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:24]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:24]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'BTNL'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:25]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:25]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'BTNR'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:26]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:26]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'BTNU'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:27]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:27]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'rstn'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:28]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:28]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sw'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:32]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:32]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sw2'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:34]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:34]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sw3'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:35]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:35]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sw4'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:36]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:36]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sw5'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:37]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:37]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sw6'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:38]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:38]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sw7'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:39]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:39]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'ac_adc_sdata'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:91]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:91]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'ac_bclk'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:92]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:92]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'ac_dac_sdata'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:93]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:93]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'ac_lrclk'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:94]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:94]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'ac_mclk'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:95]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:95]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'scl'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:202]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:202]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+WARNING: [Vivado 12-584] No ports matched 'sda'. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:203]
+CRITICAL WARNING: [Common 17-55] 'set_property' expects at least one object. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc:203]
+Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
+Finished Parsing XDC File [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/constraints/NexysVideo_Master.xdc]
+Completed Processing XDC Constraints
+
+Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2668.766 ; gain = 0.000 ; free physical = 3452 ; free virtual = 13420
+INFO: [Project 1-111] Unisim Transformation Summary:
+No Unisim elements were transformed.
+
+Constraint Validation Runtime : Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.02 . Memory (MB): peak = 2668.766 ; gain = 0.000 ; free physical = 3452 ; free virtual = 13420
+---------------------------------------------------------------------------------
+Finished Constraint Validation : Time (s): cpu = 00:00:10 ; elapsed = 00:00:15 . Memory (MB): peak = 2668.766 ; gain = 591.277 ; free physical = 3385 ; free virtual = 13378
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Loading Part and Timing Information
+---------------------------------------------------------------------------------
+Loading part: xc7a200tsbg484-1
+---------------------------------------------------------------------------------
+Finished Loading Part and Timing Information : Time (s): cpu = 00:00:10 ; elapsed = 00:00:16 . Memory (MB): peak = 2676.770 ; gain = 599.281 ; free physical = 3385 ; free virtual = 13378
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Applying 'set_property' XDC Constraints
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished applying 'set_property' XDC Constraints : Time (s): cpu = 00:00:10 ; elapsed = 00:00:16 . Memory (MB): peak = 2676.770 ; gain = 599.281 ; free physical = 3378 ; free virtual = 13374
+---------------------------------------------------------------------------------
+INFO: [Synth 8-802] inferred FSM for state register 'SR_currentState_reg' in module 'controlUnit'
+---------------------------------------------------------------------------------------------------
+ State | New Encoding | Previous Encoding
+---------------------------------------------------------------------------------------------------
+ wait_sample | 000001 | 000
+ store | 000010 | 001
+ processing_loop | 000100 | 010
+ output | 001000 | 011
+ wait_end_sample | 010000 | 100
+ iSTATE | 100000 | 111
+---------------------------------------------------------------------------------------------------
+INFO: [Synth 8-3354] encoded FSM with state register 'SR_currentState_reg' using encoding 'one-hot' in module 'controlUnit'
+WARNING: [Synth 8-327] inferring latch for variable 'FSM_onehot_SR_nextState_reg' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:62]
+---------------------------------------------------------------------------------
+Finished RTL Optimization Phase 2 : Time (s): cpu = 00:00:10 ; elapsed = 00:00:16 . Memory (MB): peak = 2676.770 ; gain = 599.281 ; free physical = 3354 ; free virtual = 13366
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start RTL Component Statistics
+---------------------------------------------------------------------------------
+Detailed RTL Component Info :
++---Muxes :
+ 5 Input 6 Bit Muxes := 1
+ 2 Input 6 Bit Muxes := 1
+ 6 Input 3 Bit Muxes := 1
+ 6 Input 1 Bit Muxes := 2
+ 2 Input 1 Bit Muxes := 6
+---------------------------------------------------------------------------------
+Finished RTL Component Statistics
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Part Resource Summary
+---------------------------------------------------------------------------------
+Part Resources:
+DSPs: 740 (col length:100)
+BRAMs: 730 (col length: RAMB18 100 RAMB36 50)
+---------------------------------------------------------------------------------
+Finished Part Resource Summary
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Cross Boundary and Area Optimization
+---------------------------------------------------------------------------------
+WARNING: [Synth 8-7080] Parallel synthesis criteria is not met
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/controlUnit_1/FSM_onehot_SR_currentState_reg[5]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/controlUnit_1/FSM_onehot_SR_currentState_reg[4]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/controlUnit_1/FSM_onehot_SR_currentState_reg[3]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/controlUnit_1/FSM_onehot_SR_currentState_reg[2]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/controlUnit_1/FSM_onehot_SR_currentState_reg[1]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/controlUnit_1/FSM_onehot_SR_currentState_reg[0]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/controlUnit_1/FSM_onehot_SR_nextState_reg[5]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/controlUnit_1/FSM_onehot_SR_nextState_reg[4]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/controlUnit_1/FSM_onehot_SR_nextState_reg[3]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/controlUnit_1/FSM_onehot_SR_nextState_reg[2]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/controlUnit_1/FSM_onehot_SR_nextState_reg[1]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/controlUnit_1/FSM_onehot_SR_nextState_reg[0]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_incrAddress_IBUF_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_initAddress_IBUF_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_initSum_IBUF_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[0]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[10]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[11]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[12]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[13]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[14]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[15]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[1]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[2]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[3]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[4]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[5]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[6]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[7]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[8]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_inputSample_IBUF[9]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_loadOutput_IBUF_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_loadShift_IBUF_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_loadSum_IBUF_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/I_reset_IBUF_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[0]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[10]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[11]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[12]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[13]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[14]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[15]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[1]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[2]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[3]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[4]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[5]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[6]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[7]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[8]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_filteredSample_OBUF[9]_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/O_processingDone_OBUF_inst) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[0]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[10]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[11]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[12]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[13]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[14]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[15]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[1]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[2]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[3]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[4]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[5]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[6]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[7]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[8]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_filteredSample_reg[9]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_readAddress_reg[0]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_readAddress_reg[1]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_readAddress_reg[2]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_readAddress_reg[3]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][0]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][10]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][11]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][12]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][13]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][14]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][15]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][1]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][2]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][3]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][4]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][5]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][6]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][7]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][8]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[0][9]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[10][0]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[10][10]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[10][11]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[10][12]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[10][13]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[10][14]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[10][15]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[10][1]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[10][2]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[10][3]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[10][4]) is unused and will be removed from module tb_firUnit.
+WARNING: [Synth 8-3332] Sequential element (firUnit_1/operativeUnit_1/SR_shiftRegister_reg[10][5]) is unused and will be removed from module tb_firUnit.
+INFO: [Common 17-14] Message 'Synth 8-3332' appears 100 times and further instances of the messages will be disabled. Use the Tcl command set_msg_config to change the current settings.
+---------------------------------------------------------------------------------
+Finished Cross Boundary and Area Optimization : Time (s): cpu = 00:00:11 ; elapsed = 00:00:18 . Memory (MB): peak = 2676.770 ; gain = 599.281 ; free physical = 3300 ; free virtual = 13357
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Applying XDC Timing Constraints
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Applying XDC Timing Constraints : Time (s): cpu = 00:00:16 ; elapsed = 00:00:23 . Memory (MB): peak = 2676.770 ; gain = 599.281 ; free physical = 3243 ; free virtual = 13231
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Timing Optimization
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Timing Optimization : Time (s): cpu = 00:00:16 ; elapsed = 00:00:23 . Memory (MB): peak = 2676.770 ; gain = 599.281 ; free physical = 3243 ; free virtual = 13231
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Technology Mapping
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Technology Mapping : Time (s): cpu = 00:00:16 ; elapsed = 00:00:23 . Memory (MB): peak = 2676.770 ; gain = 599.281 ; free physical = 3243 ; free virtual = 13232
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start IO Insertion
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Flattening Before IO Insertion
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Flattening Before IO Insertion
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Final Netlist Cleanup
+---------------------------------------------------------------------------------
+WARNING: synth_design option "-fanout_limit" is deprecated.
+---------------------------------------------------------------------------------
+Finished Final Netlist Cleanup
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished IO Insertion : Time (s): cpu = 00:00:19 ; elapsed = 00:00:26 . Memory (MB): peak = 2676.770 ; gain = 599.281 ; free physical = 3264 ; free virtual = 13252
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Renaming Generated Instances
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Renaming Generated Instances : Time (s): cpu = 00:00:19 ; elapsed = 00:00:26 . Memory (MB): peak = 2676.770 ; gain = 599.281 ; free physical = 3264 ; free virtual = 13252
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Rebuilding User Hierarchy
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Rebuilding User Hierarchy : Time (s): cpu = 00:00:19 ; elapsed = 00:00:26 . Memory (MB): peak = 2676.770 ; gain = 599.281 ; free physical = 3265 ; free virtual = 13254
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Renaming Generated Ports
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Renaming Generated Ports : Time (s): cpu = 00:00:19 ; elapsed = 00:00:26 . Memory (MB): peak = 2676.770 ; gain = 599.281 ; free physical = 3266 ; free virtual = 13255
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Handling Custom Attributes
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Handling Custom Attributes : Time (s): cpu = 00:00:19 ; elapsed = 00:00:26 . Memory (MB): peak = 2676.770 ; gain = 599.281 ; free physical = 3266 ; free virtual = 13255
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Renaming Generated Nets
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Renaming Generated Nets : Time (s): cpu = 00:00:19 ; elapsed = 00:00:26 . Memory (MB): peak = 2676.770 ; gain = 599.281 ; free physical = 3266 ; free virtual = 13255
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Writing Synthesis Report
+---------------------------------------------------------------------------------
+
+Report BlackBoxes:
++-+--------------+----------+
+| |BlackBox name |Instances |
++-+--------------+----------+
++-+--------------+----------+
+
+Report Cell Usage:
++------+-----+------+
+| |Cell |Count |
++------+-----+------+
+|1 |BUFG | 1|
+|2 |LUT1 | 1|
+|3 |IBUF | 1|
++------+-----+------+
+---------------------------------------------------------------------------------
+Finished Writing Synthesis Report : Time (s): cpu = 00:00:19 ; elapsed = 00:00:26 . Memory (MB): peak = 2676.770 ; gain = 599.281 ; free physical = 3266 ; free virtual = 13255
+---------------------------------------------------------------------------------
+Synthesis finished with 0 errors, 0 critical warnings and 366 warnings.
+Synthesis Optimization Runtime : Time (s): cpu = 00:00:17 ; elapsed = 00:00:23 . Memory (MB): peak = 2676.770 ; gain = 526.344 ; free physical = 3266 ; free virtual = 13254
+Synthesis Optimization Complete : Time (s): cpu = 00:00:19 ; elapsed = 00:00:26 . Memory (MB): peak = 2676.777 ; gain = 599.281 ; free physical = 3265 ; free virtual = 13254
+INFO: [Project 1-571] Translating synthesized netlist
+Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2676.777 ; gain = 0.000 ; free physical = 3264 ; free virtual = 13254
+INFO: [Project 1-570] Preparing netlist for logic optimization
+WARNING: [Opt 31-32] Removing redundant IBUF since it is not being driven by a top-level port. firUnit_1/operativeUnit_1/I_clock_IBUF_inst
+Resolution: The tool has removed redundant IBUF. To resolve this warning, check for redundant IBUF in the input design.
+INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
+Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2676.777 ; gain = 0.000 ; free physical = 3561 ; free virtual = 13553
+INFO: [Project 1-111] Unisim Transformation Summary:
+No Unisim elements were transformed.
+
+Synth Design complete | Checksum: 1fc2f979
+INFO: [Common 17-83] Releasing license: Synthesis
+86 Infos, 146 Warnings, 27 Critical Warnings and 0 Errors encountered.
+synth_design completed successfully
+synth_design: Time (s): cpu = 00:00:26 ; elapsed = 00:00:43 . Memory (MB): peak = 2676.777 ; gain = 992.125 ; free physical = 3563 ; free virtual = 13555
+INFO: [Common 17-2834] synth_design peak Physical Memory [PSS] (MB): overall = 2220.538; main = 1897.222; forked = 375.091
+INFO: [Common 17-2834] synth_design peak Virtual Memory [VSS] (MB): overall = 3718.098; main = 2676.773; forked = 1041.324
+INFO: [runtcl-6] Synthesis results are not added to the cache due to CRITICAL_WARNING
+INFO: [Common 17-1381] The checkpoint '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.runs/synth_1/tb_firUnit.dcp' has been generated.
+INFO: [Vivado 12-24828] Executing command : report_utilization -file tb_firUnit_utilization_synth.rpt -pb tb_firUnit_utilization_synth.pb
+INFO: [Common 17-206] Exiting Vivado at Fri May 9 16:04:40 2025...
diff --git a/proj/AudioProc.runs/synth_1/tb_firUnit_utilization_synth.pb b/proj/AudioProc.runs/synth_1/tb_firUnit_utilization_synth.pb
new file mode 100644
index 0000000000000000000000000000000000000000..5025e353ba537f34af2cf8001ac91e37695c0681
Binary files /dev/null and b/proj/AudioProc.runs/synth_1/tb_firUnit_utilization_synth.pb differ
diff --git a/proj/AudioProc.runs/synth_1/tb_firUnit_utilization_synth.rpt b/proj/AudioProc.runs/synth_1/tb_firUnit_utilization_synth.rpt
new file mode 100644
index 0000000000000000000000000000000000000000..c69e47c74d485b62a924471442d09e59930eba03
--- /dev/null
+++ b/proj/AudioProc.runs/synth_1/tb_firUnit_utilization_synth.rpt
@@ -0,0 +1,175 @@
+Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
+---------------------------------------------------------------------------------------------------------------------------------------------
+| Tool Version : Vivado v.2024.1 (lin64) Build 5076996 Wed May 22 18:36:09 MDT 2024
+| Date : Fri May 9 16:04:40 2025
+| Host : fl-tp-br-515 running 64-bit Ubuntu 24.04.2 LTS
+| Command : report_utilization -file tb_firUnit_utilization_synth.rpt -pb tb_firUnit_utilization_synth.pb
+| Design : tb_firUnit
+| Device : xc7a200tsbg484-1
+| Speed File : -1
+| Design State : Synthesized
+---------------------------------------------------------------------------------------------------------------------------------------------
+
+Utilization Design Information
+
+Table of Contents
+-----------------
+1. Slice Logic
+1.1 Summary of Registers by Type
+2. Memory
+3. DSP
+4. IO and GT Specific
+5. Clocking
+6. Specific Feature
+7. Primitives
+8. Black Boxes
+9. Instantiated Netlists
+
+1. Slice Logic
+--------------
+
++-------------------------+------+-------+------------+-----------+-------+
+| Site Type | Used | Fixed | Prohibited | Available | Util% |
++-------------------------+------+-------+------------+-----------+-------+
+| Slice LUTs* | 1 | 0 | 0 | 134600 | <0.01 |
+| LUT as Logic | 1 | 0 | 0 | 134600 | <0.01 |
+| LUT as Memory | 0 | 0 | 0 | 46200 | 0.00 |
+| Slice Registers | 0 | 0 | 0 | 269200 | 0.00 |
+| Register as Flip Flop | 0 | 0 | 0 | 269200 | 0.00 |
+| Register as Latch | 0 | 0 | 0 | 269200 | 0.00 |
+| F7 Muxes | 0 | 0 | 0 | 67300 | 0.00 |
+| F8 Muxes | 0 | 0 | 0 | 33650 | 0.00 |
++-------------------------+------+-------+------------+-----------+-------+
+* Warning! The Final LUT count, after physical optimizations and full implementation, is typically lower. Run opt_design after synthesis, if not already completed, for a more realistic count.
+Warning! LUT value is adjusted to account for LUT combining.
+Warning! For any ECO changes, please run place_design if there are unplaced instances
+
+
+1.1 Summary of Registers by Type
+--------------------------------
+
++-------+--------------+-------------+--------------+
+| Total | Clock Enable | Synchronous | Asynchronous |
++-------+--------------+-------------+--------------+
+| 0 | _ | - | - |
+| 0 | _ | - | Set |
+| 0 | _ | - | Reset |
+| 0 | _ | Set | - |
+| 0 | _ | Reset | - |
+| 0 | Yes | - | - |
+| 0 | Yes | - | Set |
+| 0 | Yes | - | Reset |
+| 0 | Yes | Set | - |
+| 0 | Yes | Reset | - |
++-------+--------------+-------------+--------------+
+
+
+2. Memory
+---------
+
++----------------+------+-------+------------+-----------+-------+
+| Site Type | Used | Fixed | Prohibited | Available | Util% |
++----------------+------+-------+------------+-----------+-------+
+| Block RAM Tile | 0 | 0 | 0 | 365 | 0.00 |
+| RAMB36/FIFO* | 0 | 0 | 0 | 365 | 0.00 |
+| RAMB18 | 0 | 0 | 0 | 730 | 0.00 |
++----------------+------+-------+------------+-----------+-------+
+* Note: Each Block RAM Tile only has one FIFO logic available and therefore can accommodate only one FIFO36E1 or one FIFO18E1. However, if a FIFO18E1 occupies a Block RAM Tile, that tile can still accommodate a RAMB18E1
+
+
+3. DSP
+------
+
++-----------+------+-------+------------+-----------+-------+
+| Site Type | Used | Fixed | Prohibited | Available | Util% |
++-----------+------+-------+------------+-----------+-------+
+| DSPs | 0 | 0 | 0 | 740 | 0.00 |
++-----------+------+-------+------------+-----------+-------+
+
+
+4. IO and GT Specific
+---------------------
+
++-----------------------------+------+-------+------------+-----------+-------+
+| Site Type | Used | Fixed | Prohibited | Available | Util% |
++-----------------------------+------+-------+------------+-----------+-------+
+| Bonded IOB | 0 | 0 | 0 | 285 | 0.00 |
+| Bonded IPADs | 0 | 0 | 0 | 14 | 0.00 |
+| Bonded OPADs | 0 | 0 | 0 | 8 | 0.00 |
+| PHY_CONTROL | 0 | 0 | 0 | 10 | 0.00 |
+| PHASER_REF | 0 | 0 | 0 | 10 | 0.00 |
+| OUT_FIFO | 0 | 0 | 0 | 40 | 0.00 |
+| IN_FIFO | 0 | 0 | 0 | 40 | 0.00 |
+| IDELAYCTRL | 0 | 0 | 0 | 10 | 0.00 |
+| IBUFDS | 0 | 0 | 0 | 274 | 0.00 |
+| GTPE2_CHANNEL | 0 | 0 | 0 | 4 | 0.00 |
+| PHASER_OUT/PHASER_OUT_PHY | 0 | 0 | 0 | 40 | 0.00 |
+| PHASER_IN/PHASER_IN_PHY | 0 | 0 | 0 | 40 | 0.00 |
+| IDELAYE2/IDELAYE2_FINEDELAY | 0 | 0 | 0 | 500 | 0.00 |
+| IBUFDS_GTE2 | 0 | 0 | 0 | 2 | 0.00 |
+| ILOGIC | 0 | 0 | 0 | 285 | 0.00 |
+| OLOGIC | 0 | 0 | 0 | 285 | 0.00 |
++-----------------------------+------+-------+------------+-----------+-------+
+
+
+5. Clocking
+-----------
+
++------------+------+-------+------------+-----------+-------+
+| Site Type | Used | Fixed | Prohibited | Available | Util% |
++------------+------+-------+------------+-----------+-------+
+| BUFGCTRL | 1 | 0 | 0 | 32 | 3.13 |
+| BUFIO | 0 | 0 | 0 | 40 | 0.00 |
+| MMCME2_ADV | 0 | 0 | 0 | 10 | 0.00 |
+| PLLE2_ADV | 0 | 0 | 0 | 10 | 0.00 |
+| BUFMRCE | 0 | 0 | 0 | 20 | 0.00 |
+| BUFHCE | 0 | 0 | 0 | 120 | 0.00 |
+| BUFR | 0 | 0 | 0 | 40 | 0.00 |
++------------+------+-------+------------+-----------+-------+
+
+
+6. Specific Feature
+-------------------
+
++-------------+------+-------+------------+-----------+-------+
+| Site Type | Used | Fixed | Prohibited | Available | Util% |
++-------------+------+-------+------------+-----------+-------+
+| BSCANE2 | 0 | 0 | 0 | 4 | 0.00 |
+| CAPTUREE2 | 0 | 0 | 0 | 1 | 0.00 |
+| DNA_PORT | 0 | 0 | 0 | 1 | 0.00 |
+| EFUSE_USR | 0 | 0 | 0 | 1 | 0.00 |
+| FRAME_ECCE2 | 0 | 0 | 0 | 1 | 0.00 |
+| ICAPE2 | 0 | 0 | 0 | 2 | 0.00 |
+| PCIE_2_1 | 0 | 0 | 0 | 1 | 0.00 |
+| STARTUPE2 | 0 | 0 | 0 | 1 | 0.00 |
+| XADC | 0 | 0 | 0 | 1 | 0.00 |
++-------------+------+-------+------------+-----------+-------+
+
+
+7. Primitives
+-------------
+
++----------+------+---------------------+
+| Ref Name | Used | Functional Category |
++----------+------+---------------------+
+| LUT1 | 1 | LUT |
+| BUFG | 1 | Clock |
++----------+------+---------------------+
+
+
+8. Black Boxes
+--------------
+
++----------+------+
+| Ref Name | Used |
++----------+------+
+
+
+9. Instantiated Netlists
+------------------------
+
++----------+------+
+| Ref Name | Used |
++----------+------+
+
+
diff --git a/proj/AudioProc.runs/synth_1/vivado.jou b/proj/AudioProc.runs/synth_1/vivado.jou
new file mode 100644
index 0000000000000000000000000000000000000000..8e623c0e512522f4fa4ba180ad5ecfe163c535e0
--- /dev/null
+++ b/proj/AudioProc.runs/synth_1/vivado.jou
@@ -0,0 +1,24 @@
+#-----------------------------------------------------------
+# Vivado v2024.1 (64-bit)
+# SW Build 5076996 on Wed May 22 18:36:09 MDT 2024
+# IP Build 5075265 on Wed May 22 21:45:21 MDT 2024
+# SharedData Build 5076995 on Wed May 22 18:29:18 MDT 2024
+# Start of session at: Fri May 9 16:03:09 2025
+# Process ID: 111655
+# Current directory: /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.runs/synth_1
+# Command line: vivado -log tb_firUnit.vds -product Vivado -mode batch -messageDb vivado.pb -notrace -source tb_firUnit.tcl
+# Log file: /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.runs/synth_1/tb_firUnit.vds
+# Journal file: /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.runs/synth_1/vivado.jou
+# Running On :fl-tp-br-515
+# Platform :Ubuntu
+# Operating System :Ubuntu 24.04.2 LTS
+# Processor Detail :Intel(R) Core(TM) i5-10500 CPU @ 3.10GHz
+# CPU Frequency :4099.955 MHz
+# CPU Physical cores:6
+# CPU Logical cores :12
+# Host memory :16533 MB
+# Swap memory :4294 MB
+# Total Virtual :20828 MB
+# Available Virtual :15956 MB
+#-----------------------------------------------------------
+source tb_firUnit.tcl -notrace
diff --git a/proj/AudioProc.runs/synth_1/vivado.pb b/proj/AudioProc.runs/synth_1/vivado.pb
new file mode 100644
index 0000000000000000000000000000000000000000..1245da19d09b8e54f456c55ff6ce4c76f24d9dd4
Binary files /dev/null and b/proj/AudioProc.runs/synth_1/vivado.pb differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/audioProc.tcl b/proj/AudioProc.sim/sim_1/behav/xsim/audioProc.tcl
new file mode 100644
index 0000000000000000000000000000000000000000..1094e45dcf2527b60296acfc006fb85a3e752cba
--- /dev/null
+++ b/proj/AudioProc.sim/sim_1/behav/xsim/audioProc.tcl
@@ -0,0 +1,11 @@
+set curr_wave [current_wave_config]
+if { [string length $curr_wave] == 0 } {
+ if { [llength [get_objects]] > 0} {
+ add_wave /
+ set_property needs_save false [current_wave_config]
+ } else {
+ send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console."
+ }
+}
+
+run 1000ns
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/audioProc_behav.wdb b/proj/AudioProc.sim/sim_1/behav/xsim/audioProc_behav.wdb
new file mode 100644
index 0000000000000000000000000000000000000000..3b63e5f576d3b4f3ff5541c92d21346932a2ba43
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/audioProc_behav.wdb differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/compile.sh b/proj/AudioProc.sim/sim_1/behav/xsim/compile.sh
new file mode 100755
index 0000000000000000000000000000000000000000..20421964565c2f5728a9d5ec372d2e664ea409c1
--- /dev/null
+++ b/proj/AudioProc.sim/sim_1/behav/xsim/compile.sh
@@ -0,0 +1,28 @@
+#!/usr/bin/env bash
+# ****************************************************************************
+# Vivado (TM) v2024.1 (64-bit)
+#
+# Filename : compile.sh
+# Simulator : AMD Vivado Simulator
+# Description : Script for compiling the simulation design source files
+#
+# Generated by Vivado on Fri May 09 15:49:39 CEST 2025
+# SW Build 5076996 on Wed May 22 18:36:09 MDT 2024
+#
+# Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+# Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
+#
+# usage: compile.sh
+#
+# ****************************************************************************
+set -Eeuo pipefail
+# compile Verilog/System Verilog design sources
+echo "xvlog --incr --relax -prj tb_firUnit_vlog.prj"
+xvlog --incr --relax -prj tb_firUnit_vlog.prj 2>&1 | tee compile.log
+
+# compile VHDL design sources
+echo "xvhdl --incr --relax -prj tb_firUnit_vhdl.prj"
+xvhdl --incr --relax -prj tb_firUnit_vhdl.prj 2>&1 | tee -a compile.log
+
+echo "Waiting for jobs to finish..."
+echo "No pending jobs, compilation finished."
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/elaborate.log b/proj/AudioProc.sim/sim_1/behav/xsim/elaborate.log
new file mode 100644
index 0000000000000000000000000000000000000000..d82ee6ec36afa6e8f1beba6e9472111b20718b43
--- /dev/null
+++ b/proj/AudioProc.sim/sim_1/behav/xsim/elaborate.log
@@ -0,0 +1,11 @@
+Vivado Simulator v2024.1
+Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
+Running: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/bin/unwrapped/lnx64.o/xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log
+Using 8 slave threads.
+Starting static elaboration
+Pass Through NonSizing Optimizer
+WARNING: [VRFC 10-3091] actual bit length 36 differs from formal bit length 48 for port 'P' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:422]
+WARNING: [VRFC 10-3091] actual bit length 3 differs from formal bit length 4 for port 'CO' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:1478]
+Completed static elaboration
+INFO: [XSIM 43-4323] No Change in HDL. Linking previously generated obj files to create kernel
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/elaborate.sh b/proj/AudioProc.sim/sim_1/behav/xsim/elaborate.sh
new file mode 100755
index 0000000000000000000000000000000000000000..bf50b73a1ac41f1ef86fb02729697bed31994d53
--- /dev/null
+++ b/proj/AudioProc.sim/sim_1/behav/xsim/elaborate.sh
@@ -0,0 +1,22 @@
+#!/usr/bin/env bash
+# ****************************************************************************
+# Vivado (TM) v2024.1 (64-bit)
+#
+# Filename : elaborate.sh
+# Simulator : AMD Vivado Simulator
+# Description : Script for elaborating the compiled design
+#
+# Generated by Vivado on Fri May 09 15:49:42 CEST 2025
+# SW Build 5076996 on Wed May 22 18:36:09 MDT 2024
+#
+# Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+# Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
+#
+# usage: elaborate.sh
+#
+# ****************************************************************************
+set -Eeuo pipefail
+# elaborate design
+echo "xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log"
+xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log
+
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/glbl.v b/proj/AudioProc.sim/sim_1/behav/xsim/glbl.v
new file mode 100755
index 0000000000000000000000000000000000000000..ed3b249ceef65a0d1b42790def9ee8179363679c
--- /dev/null
+++ b/proj/AudioProc.sim/sim_1/behav/xsim/glbl.v
@@ -0,0 +1,84 @@
+// $Header: /devl/xcs/repo/env/Databases/CAEInterfaces/verunilibs/data/glbl.v,v 1.14 2010/10/28 20:44:00 fphillip Exp $
+`ifndef GLBL
+`define GLBL
+`timescale 1 ps / 1 ps
+
+module glbl ();
+
+ parameter ROC_WIDTH = 100000;
+ parameter TOC_WIDTH = 0;
+ parameter GRES_WIDTH = 10000;
+ parameter GRES_START = 10000;
+
+//-------- STARTUP Globals --------------
+ wire GSR;
+ wire GTS;
+ wire GWE;
+ wire PRLD;
+ wire GRESTORE;
+ tri1 p_up_tmp;
+ tri (weak1, strong0) PLL_LOCKG = p_up_tmp;
+
+ wire PROGB_GLBL;
+ wire CCLKO_GLBL;
+ wire FCSBO_GLBL;
+ wire [3:0] DO_GLBL;
+ wire [3:0] DI_GLBL;
+
+ reg GSR_int;
+ reg GTS_int;
+ reg PRLD_int;
+ reg GRESTORE_int;
+
+//-------- JTAG Globals --------------
+ wire JTAG_TDO_GLBL;
+ wire JTAG_TCK_GLBL;
+ wire JTAG_TDI_GLBL;
+ wire JTAG_TMS_GLBL;
+ wire JTAG_TRST_GLBL;
+
+ reg JTAG_CAPTURE_GLBL;
+ reg JTAG_RESET_GLBL;
+ reg JTAG_SHIFT_GLBL;
+ reg JTAG_UPDATE_GLBL;
+ reg JTAG_RUNTEST_GLBL;
+
+ reg JTAG_SEL1_GLBL = 0;
+ reg JTAG_SEL2_GLBL = 0 ;
+ reg JTAG_SEL3_GLBL = 0;
+ reg JTAG_SEL4_GLBL = 0;
+
+ reg JTAG_USER_TDO1_GLBL = 1'bz;
+ reg JTAG_USER_TDO2_GLBL = 1'bz;
+ reg JTAG_USER_TDO3_GLBL = 1'bz;
+ reg JTAG_USER_TDO4_GLBL = 1'bz;
+
+ assign (strong1, weak0) GSR = GSR_int;
+ assign (strong1, weak0) GTS = GTS_int;
+ assign (weak1, weak0) PRLD = PRLD_int;
+ assign (strong1, weak0) GRESTORE = GRESTORE_int;
+
+ initial begin
+ GSR_int = 1'b1;
+ PRLD_int = 1'b1;
+ #(ROC_WIDTH)
+ GSR_int = 1'b0;
+ PRLD_int = 1'b0;
+ end
+
+ initial begin
+ GTS_int = 1'b1;
+ #(TOC_WIDTH)
+ GTS_int = 1'b0;
+ end
+
+ initial begin
+ GRESTORE_int = 1'b0;
+ #(GRES_START);
+ GRESTORE_int = 1'b1;
+ #(GRES_WIDTH);
+ GRESTORE_int = 1'b0;
+ end
+
+endmodule
+`endif
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/simulate.log b/proj/AudioProc.sim/sim_1/behav/xsim/simulate.log
new file mode 100644
index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/simulate.sh b/proj/AudioProc.sim/sim_1/behav/xsim/simulate.sh
new file mode 100755
index 0000000000000000000000000000000000000000..60b643640339c37737bdc8be2e0693e8b2b1b000
--- /dev/null
+++ b/proj/AudioProc.sim/sim_1/behav/xsim/simulate.sh
@@ -0,0 +1,22 @@
+#!/usr/bin/env bash
+# ****************************************************************************
+# Vivado (TM) v2024.1 (64-bit)
+#
+# Filename : simulate.sh
+# Simulator : AMD Vivado Simulator
+# Description : Script for simulating the design by launching the simulator
+#
+# Generated by Vivado on Fri May 09 15:42:20 CEST 2025
+# SW Build 5076996 on Wed May 22 18:36:09 MDT 2024
+#
+# Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+# Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
+#
+# usage: simulate.sh
+#
+# ****************************************************************************
+set -Eeuo pipefail
+# simulate design
+echo "xsim tb_firUnit_behav -key {Behavioral:sim_1:Functional:tb_firUnit} -tclbatch tb_firUnit.tcl -log simulate.log"
+xsim tb_firUnit_behav -key {Behavioral:sim_1:Functional:tb_firUnit} -tclbatch tb_firUnit.tcl -log simulate.log
+
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/tb_firUnit.tcl b/proj/AudioProc.sim/sim_1/behav/xsim/tb_firUnit.tcl
new file mode 100644
index 0000000000000000000000000000000000000000..1094e45dcf2527b60296acfc006fb85a3e752cba
--- /dev/null
+++ b/proj/AudioProc.sim/sim_1/behav/xsim/tb_firUnit.tcl
@@ -0,0 +1,11 @@
+set curr_wave [current_wave_config]
+if { [string length $curr_wave] == 0 } {
+ if { [llength [get_objects]] > 0} {
+ add_wave /
+ set_property needs_save false [current_wave_config]
+ } else {
+ send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console."
+ }
+}
+
+run 1000ns
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/tb_firUnit_behav.wdb b/proj/AudioProc.sim/sim_1/behav/xsim/tb_firUnit_behav.wdb
new file mode 100644
index 0000000000000000000000000000000000000000..beb3da55cedbbaafab58db3fc1d325340832c9d5
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/tb_firUnit_behav.wdb differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/tb_firUnit_vhdl.prj b/proj/AudioProc.sim/sim_1/behav/xsim/tb_firUnit_vhdl.prj
new file mode 100644
index 0000000000000000000000000000000000000000..f5164303db8b7813dd76fdb363b7c18c0c679809
--- /dev/null
+++ b/proj/AudioProc.sim/sim_1/behav/xsim/tb_firUnit_vhdl.prj
@@ -0,0 +1,8 @@
+# compile vhdl design source files
+vhdl xil_defaultlib \
+"../../../../../src/hdl/controlUnit.vhd" \
+"../../../../../src/hdl/firUnit.vhd" \
+"../../../../../src/hdl/tb_firUnit.vhd" \
+
+# Do not sort compile order
+nosort
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/tb_firUnit_vlog.prj b/proj/AudioProc.sim/sim_1/behav/xsim/tb_firUnit_vlog.prj
new file mode 100644
index 0000000000000000000000000000000000000000..4918d41c886ff6e9c7b433572c2692552e42d4f0
--- /dev/null
+++ b/proj/AudioProc.sim/sim_1/behav/xsim/tb_firUnit_vlog.prj
@@ -0,0 +1,9 @@
+# compile verilog/system verilog design source files
+verilog xil_defaultlib \
+"../../../../../src/hdl/operativeUnit.v" \
+
+# compile glbl module
+verilog xil_defaultlib "glbl.v"
+
+# Do not sort compile order
+nosort
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xelab.pb b/proj/AudioProc.sim/sim_1/behav/xsim/xelab.pb
new file mode 100644
index 0000000000000000000000000000000000000000..69071c5714dc58b42ac3a2f73ee62acdd9979c04
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xelab.pb differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/Compile_Options.txt b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/Compile_Options.txt
new file mode 100644
index 0000000000000000000000000000000000000000..f3cebc99ece0e8fe86988ba6ddf5df500f7b77ae
--- /dev/null
+++ b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/Compile_Options.txt
@@ -0,0 +1 @@
+--incr --debug "typical" --relax --mt "8" -L "xil_defaultlib" -L "unisims_ver" -L "unimacro_ver" -L "secureip" -L "xpm" --snapshot "audioProc_behav" "xil_defaultlib.audioProc" "xil_defaultlib.glbl" -log "elaborate.log"
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/TempBreakPointFile.txt b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/TempBreakPointFile.txt
new file mode 100644
index 0000000000000000000000000000000000000000..fdbc612e3497473d6b58c7f0c1432b55416f6136
--- /dev/null
+++ b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/TempBreakPointFile.txt
@@ -0,0 +1 @@
+Breakpoint File Version 1.0
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/obj/xsim_0.lnx64.o b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/obj/xsim_0.lnx64.o
new file mode 100644
index 0000000000000000000000000000000000000000..a60d81057c63319b79c361af990a24062e253d5c
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diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/obj/xsim_1.lnx64.o b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/obj/xsim_1.lnx64.o
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diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/obj/xsim_2.lnx64.o b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/obj/xsim_2.lnx64.o
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Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/obj/xsim_2.lnx64.o differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/obj/xsim_3.c b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/obj/xsim_3.c
new file mode 100644
index 0000000000000000000000000000000000000000..cc3096dd8c37d50dd0e2d9ddca1635fab43336a4
--- /dev/null
+++ b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/obj/xsim_3.c
@@ -0,0 +1,1437 @@
+/**********************************************************************/
+/* ____ ____ */
+/* / /\/ / */
+/* /___/ \ / */
+/* \ \ \/ */
+/* \ \ Copyright (c) 2003-2020 Xilinx, Inc. */
+/* / / All Right Reserved. */
+/* /---/ /\ */
+/* \ \ / \ */
+/* \___\/\___\ */
+/**********************************************************************/
+
+#if defined(_WIN32)
+ #include "stdio.h"
+ #define IKI_DLLESPEC __declspec(dllimport)
+#else
+ #define IKI_DLLESPEC
+#endif
+#include "iki.h"
+#include <string.h>
+#include <math.h>
+#ifdef __GNUC__
+#include <stdlib.h>
+#else
+#include <malloc.h>
+#define alloca _alloca
+#endif
+/**********************************************************************/
+/* ____ ____ */
+/* / /\/ / */
+/* /___/ \ / */
+/* \ \ \/ */
+/* \ \ Copyright (c) 2003-2020 Xilinx, Inc. */
+/* / / All Right Reserved. */
+/* /---/ /\ */
+/* \ \ / \ */
+/* \___\/\___\ */
+/**********************************************************************/
+
+#if defined(_WIN32)
+ #include "stdio.h"
+ #define IKI_DLLESPEC __declspec(dllimport)
+#else
+ #define IKI_DLLESPEC
+#endif
+#include "iki.h"
+#include <string.h>
+#include <math.h>
+#ifdef __GNUC__
+#include <stdlib.h>
+#else
+#include <malloc.h>
+#define alloca _alloca
+#endif
+typedef void (*funcp)(char *, char *);
+extern int main(int, char**);
+IKI_DLLESPEC extern void execute_218(char*, char *);
+IKI_DLLESPEC extern void execute_219(char*, char *);
+IKI_DLLESPEC extern void execute_4057(char*, char *);
+IKI_DLLESPEC extern void execute_4058(char*, char *);
+IKI_DLLESPEC extern void execute_4064(char*, char *);
+IKI_DLLESPEC extern void execute_4065(char*, char *);
+IKI_DLLESPEC extern void execute_4154(char*, char *);
+IKI_DLLESPEC extern void execute_4155(char*, char *);
+IKI_DLLESPEC extern void execute_4156(char*, char *);
+IKI_DLLESPEC extern void execute_4157(char*, char *);
+IKI_DLLESPEC extern void execute_4158(char*, char *);
+IKI_DLLESPEC extern void execute_4159(char*, char *);
+IKI_DLLESPEC extern void execute_4160(char*, char *);
+IKI_DLLESPEC extern void execute_4161(char*, char *);
+IKI_DLLESPEC extern void execute_4162(char*, char *);
+IKI_DLLESPEC extern void vlog_simple_process_execute_0_fast_no_reg_no_agg(char*, char*, char*);
+IKI_DLLESPEC extern void execute_7903(char*, char *);
+IKI_DLLESPEC extern void execute_7904(char*, char *);
+IKI_DLLESPEC extern void execute_7905(char*, char *);
+IKI_DLLESPEC extern void execute_7906(char*, char *);
+IKI_DLLESPEC extern void execute_7907(char*, char *);
+IKI_DLLESPEC extern void execute_7908(char*, char *);
+IKI_DLLESPEC extern void vlog_const_rhs_process_execute_0_fast_no_reg_no_agg(char*, char*, char*);
+IKI_DLLESPEC extern void execute_4150(char*, char *);
+IKI_DLLESPEC extern void execute_4151(char*, char *);
+IKI_DLLESPEC extern void execute_4066(char*, char *);
+IKI_DLLESPEC extern void execute_6(char*, char *);
+IKI_DLLESPEC extern void execute_7(char*, char *);
+IKI_DLLESPEC extern void execute_8(char*, char *);
+IKI_DLLESPEC extern void execute_9(char*, char *);
+IKI_DLLESPEC extern void execute_10(char*, char *);
+IKI_DLLESPEC extern void execute_11(char*, char *);
+IKI_DLLESPEC extern void execute_12(char*, char *);
+IKI_DLLESPEC extern void execute_13(char*, char *);
+IKI_DLLESPEC extern void execute_14(char*, char *);
+IKI_DLLESPEC extern void execute_15(char*, char *);
+IKI_DLLESPEC extern void execute_16(char*, char *);
+IKI_DLLESPEC extern void execute_17(char*, char *);
+IKI_DLLESPEC extern void execute_18(char*, char *);
+IKI_DLLESPEC extern void execute_19(char*, char *);
+IKI_DLLESPEC extern void execute_20(char*, char *);
+IKI_DLLESPEC extern void execute_22(char*, char *);
+IKI_DLLESPEC extern void execute_23(char*, char *);
+IKI_DLLESPEC extern void execute_24(char*, char *);
+IKI_DLLESPEC extern void execute_25(char*, char *);
+IKI_DLLESPEC extern void execute_26(char*, char *);
+IKI_DLLESPEC extern void execute_27(char*, char *);
+IKI_DLLESPEC extern void execute_28(char*, char *);
+IKI_DLLESPEC extern void execute_29(char*, char *);
+IKI_DLLESPEC extern void execute_30(char*, char *);
+IKI_DLLESPEC extern void execute_31(char*, char *);
+IKI_DLLESPEC extern void execute_32(char*, char *);
+IKI_DLLESPEC extern void execute_33(char*, char *);
+IKI_DLLESPEC extern void execute_34(char*, char *);
+IKI_DLLESPEC extern void execute_35(char*, char *);
+IKI_DLLESPEC extern void execute_36(char*, char *);
+IKI_DLLESPEC extern void execute_37(char*, char *);
+IKI_DLLESPEC extern void execute_38(char*, char *);
+IKI_DLLESPEC extern void execute_39(char*, char *);
+IKI_DLLESPEC extern void execute_40(char*, char *);
+IKI_DLLESPEC extern void execute_41(char*, char *);
+IKI_DLLESPEC extern void execute_42(char*, char *);
+IKI_DLLESPEC extern void execute_43(char*, char *);
+IKI_DLLESPEC extern void execute_44(char*, char *);
+IKI_DLLESPEC extern void execute_45(char*, char *);
+IKI_DLLESPEC extern void execute_46(char*, char *);
+IKI_DLLESPEC extern void execute_47(char*, char *);
+IKI_DLLESPEC extern void execute_48(char*, char *);
+IKI_DLLESPEC extern void execute_49(char*, char *);
+IKI_DLLESPEC extern void execute_50(char*, char *);
+IKI_DLLESPEC extern void execute_51(char*, char *);
+IKI_DLLESPEC extern void execute_52(char*, char *);
+IKI_DLLESPEC extern void execute_53(char*, char *);
+IKI_DLLESPEC extern void execute_54(char*, char *);
+IKI_DLLESPEC extern void execute_55(char*, char *);
+IKI_DLLESPEC extern void execute_56(char*, char *);
+IKI_DLLESPEC extern void execute_57(char*, char *);
+IKI_DLLESPEC extern void execute_58(char*, char *);
+IKI_DLLESPEC extern void execute_59(char*, char *);
+IKI_DLLESPEC extern void execute_60(char*, char *);
+IKI_DLLESPEC extern void execute_61(char*, char *);
+IKI_DLLESPEC extern void execute_62(char*, char *);
+IKI_DLLESPEC extern void execute_63(char*, char *);
+IKI_DLLESPEC extern void execute_64(char*, char *);
+IKI_DLLESPEC extern void execute_65(char*, char *);
+IKI_DLLESPEC extern void execute_66(char*, char *);
+IKI_DLLESPEC extern void execute_67(char*, char *);
+IKI_DLLESPEC extern void execute_68(char*, char *);
+IKI_DLLESPEC extern void execute_69(char*, char *);
+IKI_DLLESPEC extern void execute_70(char*, char *);
+IKI_DLLESPEC extern void execute_71(char*, char *);
+IKI_DLLESPEC extern void execute_72(char*, char *);
+IKI_DLLESPEC extern void execute_73(char*, char *);
+IKI_DLLESPEC extern void execute_74(char*, char *);
+IKI_DLLESPEC extern void execute_75(char*, char *);
+IKI_DLLESPEC extern void execute_76(char*, char *);
+IKI_DLLESPEC extern void execute_77(char*, char *);
+IKI_DLLESPEC extern void execute_78(char*, char *);
+IKI_DLLESPEC extern void execute_79(char*, char *);
+IKI_DLLESPEC extern void execute_80(char*, char *);
+IKI_DLLESPEC extern void execute_81(char*, char *);
+IKI_DLLESPEC extern void execute_82(char*, char *);
+IKI_DLLESPEC extern void execute_83(char*, char *);
+IKI_DLLESPEC extern void execute_84(char*, char *);
+IKI_DLLESPEC extern void execute_85(char*, char *);
+IKI_DLLESPEC extern void execute_86(char*, char *);
+IKI_DLLESPEC extern void execute_87(char*, char *);
+IKI_DLLESPEC extern void execute_88(char*, char *);
+IKI_DLLESPEC extern void execute_89(char*, char *);
+IKI_DLLESPEC extern void execute_90(char*, char *);
+IKI_DLLESPEC extern void execute_91(char*, char *);
+IKI_DLLESPEC extern void execute_92(char*, char *);
+IKI_DLLESPEC extern void execute_93(char*, char *);
+IKI_DLLESPEC extern void execute_94(char*, char *);
+IKI_DLLESPEC extern void execute_95(char*, char *);
+IKI_DLLESPEC extern void execute_96(char*, char *);
+IKI_DLLESPEC extern void execute_97(char*, char *);
+IKI_DLLESPEC extern void execute_98(char*, char *);
+IKI_DLLESPEC extern void execute_99(char*, char *);
+IKI_DLLESPEC extern void execute_100(char*, char *);
+IKI_DLLESPEC extern void execute_101(char*, char *);
+IKI_DLLESPEC extern void execute_102(char*, char *);
+IKI_DLLESPEC extern void execute_103(char*, char *);
+IKI_DLLESPEC extern void execute_104(char*, char *);
+IKI_DLLESPEC extern void execute_105(char*, char *);
+IKI_DLLESPEC extern void execute_106(char*, char *);
+IKI_DLLESPEC extern void execute_107(char*, char *);
+IKI_DLLESPEC extern void execute_108(char*, char *);
+IKI_DLLESPEC extern void execute_109(char*, char *);
+IKI_DLLESPEC extern void execute_110(char*, char *);
+IKI_DLLESPEC extern void execute_111(char*, char *);
+IKI_DLLESPEC extern void execute_112(char*, char *);
+IKI_DLLESPEC extern void execute_113(char*, char *);
+IKI_DLLESPEC extern void execute_114(char*, char *);
+IKI_DLLESPEC extern void execute_115(char*, char *);
+IKI_DLLESPEC extern void execute_131(char*, char *);
+IKI_DLLESPEC extern void execute_4067(char*, char *);
+IKI_DLLESPEC extern void execute_4068(char*, char *);
+IKI_DLLESPEC extern void execute_4071(char*, char *);
+IKI_DLLESPEC extern void execute_4072(char*, char *);
+IKI_DLLESPEC extern void execute_4084(char*, char *);
+IKI_DLLESPEC extern void execute_4085(char*, char *);
+IKI_DLLESPEC extern void execute_4086(char*, char *);
+IKI_DLLESPEC extern void execute_4087(char*, char *);
+IKI_DLLESPEC extern void execute_4088(char*, char *);
+IKI_DLLESPEC extern void execute_4089(char*, char *);
+IKI_DLLESPEC extern void execute_4090(char*, char *);
+IKI_DLLESPEC extern void execute_4091(char*, char *);
+IKI_DLLESPEC extern void execute_4092(char*, char *);
+IKI_DLLESPEC extern void execute_4093(char*, char *);
+IKI_DLLESPEC extern void execute_4094(char*, char *);
+IKI_DLLESPEC extern void execute_4095(char*, char *);
+IKI_DLLESPEC extern void execute_4096(char*, char *);
+IKI_DLLESPEC extern void execute_4097(char*, char *);
+IKI_DLLESPEC extern void execute_4098(char*, char *);
+IKI_DLLESPEC extern void execute_4099(char*, char *);
+IKI_DLLESPEC extern void execute_4100(char*, char *);
+IKI_DLLESPEC extern void execute_4101(char*, char *);
+IKI_DLLESPEC extern void execute_4102(char*, char *);
+IKI_DLLESPEC extern void execute_4103(char*, char *);
+IKI_DLLESPEC extern void execute_4104(char*, char *);
+IKI_DLLESPEC extern void execute_4105(char*, char *);
+IKI_DLLESPEC extern void execute_4106(char*, char *);
+IKI_DLLESPEC extern void execute_4107(char*, char *);
+IKI_DLLESPEC extern void execute_4108(char*, char *);
+IKI_DLLESPEC extern void execute_4109(char*, char *);
+IKI_DLLESPEC extern void execute_4110(char*, char *);
+IKI_DLLESPEC extern void execute_4111(char*, char *);
+IKI_DLLESPEC extern void execute_4112(char*, char *);
+IKI_DLLESPEC extern void execute_4113(char*, char *);
+IKI_DLLESPEC extern void execute_4114(char*, char *);
+IKI_DLLESPEC extern void execute_4115(char*, char *);
+IKI_DLLESPEC extern void execute_4116(char*, char *);
+IKI_DLLESPEC extern void execute_4117(char*, char *);
+IKI_DLLESPEC extern void execute_4118(char*, char *);
+IKI_DLLESPEC extern void execute_4119(char*, char *);
+IKI_DLLESPEC extern void execute_4120(char*, char *);
+IKI_DLLESPEC extern void execute_4121(char*, char *);
+IKI_DLLESPEC extern void execute_4122(char*, char *);
+IKI_DLLESPEC extern void execute_4123(char*, char *);
+IKI_DLLESPEC extern void execute_4124(char*, char *);
+IKI_DLLESPEC extern void execute_4125(char*, char *);
+IKI_DLLESPEC extern void execute_4126(char*, char *);
+IKI_DLLESPEC extern void execute_4127(char*, char *);
+IKI_DLLESPEC extern void execute_4128(char*, char *);
+IKI_DLLESPEC extern void execute_4129(char*, char *);
+IKI_DLLESPEC extern void execute_4130(char*, char *);
+IKI_DLLESPEC extern void execute_4131(char*, char *);
+IKI_DLLESPEC extern void execute_4132(char*, char *);
+IKI_DLLESPEC extern void execute_4133(char*, char *);
+IKI_DLLESPEC extern void execute_4134(char*, char *);
+IKI_DLLESPEC extern void execute_4135(char*, char *);
+IKI_DLLESPEC extern void execute_4136(char*, char *);
+IKI_DLLESPEC extern void execute_4137(char*, char *);
+IKI_DLLESPEC extern void execute_4138(char*, char *);
+IKI_DLLESPEC extern void execute_4139(char*, char *);
+IKI_DLLESPEC extern void execute_4140(char*, char *);
+IKI_DLLESPEC extern void execute_4143(char*, char *);
+IKI_DLLESPEC extern void execute_138(char*, char *);
+IKI_DLLESPEC extern void execute_195(char*, char *);
+IKI_DLLESPEC extern void execute_196(char*, char *);
+IKI_DLLESPEC extern void execute_197(char*, char *);
+IKI_DLLESPEC extern void execute_198(char*, char *);
+IKI_DLLESPEC extern void execute_4152(char*, char *);
+IKI_DLLESPEC extern void execute_4153(char*, char *);
+IKI_DLLESPEC extern void execute_173(char*, char *);
+IKI_DLLESPEC extern void execute_174(char*, char *);
+IKI_DLLESPEC extern void execute_175(char*, char *);
+IKI_DLLESPEC extern void execute_176(char*, char *);
+IKI_DLLESPEC extern void execute_177(char*, char *);
+IKI_DLLESPEC extern void execute_178(char*, char *);
+IKI_DLLESPEC extern void execute_179(char*, char *);
+IKI_DLLESPEC extern void execute_180(char*, char *);
+IKI_DLLESPEC extern void execute_181(char*, char *);
+IKI_DLLESPEC extern void execute_182(char*, char *);
+IKI_DLLESPEC extern void execute_183(char*, char *);
+IKI_DLLESPEC extern void execute_184(char*, char *);
+IKI_DLLESPEC extern void execute_185(char*, char *);
+IKI_DLLESPEC extern void execute_186(char*, char *);
+IKI_DLLESPEC extern void execute_187(char*, char *);
+IKI_DLLESPEC extern void execute_188(char*, char *);
+IKI_DLLESPEC extern void execute_189(char*, char *);
+IKI_DLLESPEC extern void execute_190(char*, char *);
+IKI_DLLESPEC extern void execute_191(char*, char *);
+IKI_DLLESPEC extern void execute_192(char*, char *);
+IKI_DLLESPEC extern void execute_193(char*, char *);
+IKI_DLLESPEC extern void execute_194(char*, char *);
+IKI_DLLESPEC extern void execute_200(char*, char *);
+IKI_DLLESPEC extern void execute_201(char*, char *);
+IKI_DLLESPEC extern void execute_203(char*, char *);
+IKI_DLLESPEC extern void execute_204(char*, char *);
+IKI_DLLESPEC extern void execute_205(char*, char *);
+IKI_DLLESPEC extern void execute_206(char*, char *);
+IKI_DLLESPEC extern void execute_207(char*, char *);
+IKI_DLLESPEC extern void execute_208(char*, char *);
+IKI_DLLESPEC extern void execute_209(char*, char *);
+IKI_DLLESPEC extern void execute_210(char*, char *);
+IKI_DLLESPEC extern void execute_211(char*, char *);
+IKI_DLLESPEC extern void execute_212(char*, char *);
+IKI_DLLESPEC extern void execute_213(char*, char *);
+IKI_DLLESPEC extern void execute_214(char*, char *);
+IKI_DLLESPEC extern void execute_215(char*, char *);
+IKI_DLLESPEC extern void execute_216(char*, char *);
+IKI_DLLESPEC extern void execute_217(char*, char *);
+IKI_DLLESPEC extern void execute_230(char*, char *);
+IKI_DLLESPEC extern void execute_2136(char*, char *);
+IKI_DLLESPEC extern void execute_2137(char*, char *);
+IKI_DLLESPEC extern void execute_233(char*, char *);
+IKI_DLLESPEC extern void execute_234(char*, char *);
+IKI_DLLESPEC extern void execute_235(char*, char *);
+IKI_DLLESPEC extern void execute_236(char*, char *);
+IKI_DLLESPEC extern void execute_237(char*, char *);
+IKI_DLLESPEC extern void execute_238(char*, char *);
+IKI_DLLESPEC extern void execute_239(char*, char *);
+IKI_DLLESPEC extern void execute_240(char*, char *);
+IKI_DLLESPEC extern void execute_241(char*, char *);
+IKI_DLLESPEC extern void execute_6034(char*, char *);
+IKI_DLLESPEC extern void execute_6035(char*, char *);
+IKI_DLLESPEC extern void execute_271(char*, char *);
+IKI_DLLESPEC extern void execute_4196(char*, char *);
+IKI_DLLESPEC extern void execute_4197(char*, char *);
+IKI_DLLESPEC extern void execute_4198(char*, char *);
+IKI_DLLESPEC extern void execute_306(char*, char *);
+IKI_DLLESPEC extern void execute_4248(char*, char *);
+IKI_DLLESPEC extern void execute_4249(char*, char *);
+IKI_DLLESPEC extern void execute_4250(char*, char *);
+IKI_DLLESPEC extern void execute_4251(char*, char *);
+IKI_DLLESPEC extern void execute_4252(char*, char *);
+IKI_DLLESPEC extern void execute_4253(char*, char *);
+IKI_DLLESPEC extern void execute_4254(char*, char *);
+IKI_DLLESPEC extern void execute_4255(char*, char *);
+IKI_DLLESPEC extern void execute_4247(char*, char *);
+IKI_DLLESPEC extern void execute_308(char*, char *);
+IKI_DLLESPEC extern void execute_309(char*, char *);
+IKI_DLLESPEC extern void execute_310(char*, char *);
+IKI_DLLESPEC extern void execute_311(char*, char *);
+IKI_DLLESPEC extern void execute_312(char*, char *);
+IKI_DLLESPEC extern void execute_313(char*, char *);
+IKI_DLLESPEC extern void execute_314(char*, char *);
+IKI_DLLESPEC extern void execute_315(char*, char *);
+IKI_DLLESPEC extern void execute_316(char*, char *);
+IKI_DLLESPEC extern void execute_317(char*, char *);
+IKI_DLLESPEC extern void execute_318(char*, char *);
+IKI_DLLESPEC extern void execute_319(char*, char *);
+IKI_DLLESPEC extern void execute_320(char*, char *);
+IKI_DLLESPEC extern void execute_321(char*, char *);
+IKI_DLLESPEC extern void execute_322(char*, char *);
+IKI_DLLESPEC extern void execute_323(char*, char *);
+IKI_DLLESPEC extern void execute_324(char*, char *);
+IKI_DLLESPEC extern void execute_325(char*, char *);
+IKI_DLLESPEC extern void execute_326(char*, char *);
+IKI_DLLESPEC extern void execute_327(char*, char *);
+IKI_DLLESPEC extern void execute_328(char*, char *);
+IKI_DLLESPEC extern void execute_329(char*, char *);
+IKI_DLLESPEC extern void execute_330(char*, char *);
+IKI_DLLESPEC extern void execute_331(char*, char *);
+IKI_DLLESPEC extern void execute_332(char*, char *);
+IKI_DLLESPEC extern void execute_333(char*, char *);
+IKI_DLLESPEC extern void execute_334(char*, char *);
+IKI_DLLESPEC extern void execute_335(char*, char *);
+IKI_DLLESPEC extern void execute_338(char*, char *);
+IKI_DLLESPEC extern void execute_339(char*, char *);
+IKI_DLLESPEC extern void execute_340(char*, char *);
+IKI_DLLESPEC extern void execute_341(char*, char *);
+IKI_DLLESPEC extern void execute_342(char*, char *);
+IKI_DLLESPEC extern void execute_343(char*, char *);
+IKI_DLLESPEC extern void execute_344(char*, char *);
+IKI_DLLESPEC extern void execute_345(char*, char *);
+IKI_DLLESPEC extern void execute_346(char*, char *);
+IKI_DLLESPEC extern void execute_347(char*, char *);
+IKI_DLLESPEC extern void execute_348(char*, char *);
+IKI_DLLESPEC extern void execute_349(char*, char *);
+IKI_DLLESPEC extern void execute_350(char*, char *);
+IKI_DLLESPEC extern void execute_351(char*, char *);
+IKI_DLLESPEC extern void execute_352(char*, char *);
+IKI_DLLESPEC extern void execute_353(char*, char *);
+IKI_DLLESPEC extern void execute_4256(char*, char *);
+IKI_DLLESPEC extern void execute_4257(char*, char *);
+IKI_DLLESPEC extern void execute_4258(char*, char *);
+IKI_DLLESPEC extern void execute_4259(char*, char *);
+IKI_DLLESPEC extern void execute_4260(char*, char *);
+IKI_DLLESPEC extern void execute_4261(char*, char *);
+IKI_DLLESPEC extern void execute_4262(char*, char *);
+IKI_DLLESPEC extern void execute_4263(char*, char *);
+IKI_DLLESPEC extern void execute_4264(char*, char *);
+IKI_DLLESPEC extern void execute_4265(char*, char *);
+IKI_DLLESPEC extern void execute_4266(char*, char *);
+IKI_DLLESPEC extern void execute_4267(char*, char *);
+IKI_DLLESPEC extern void execute_4268(char*, char *);
+IKI_DLLESPEC extern void execute_4269(char*, char *);
+IKI_DLLESPEC extern void execute_4270(char*, char *);
+IKI_DLLESPEC extern void vlog_simple_process_execute_1_fast_no_reg_no_agg(char*, char*, char*);
+IKI_DLLESPEC extern void execute_4311(char*, char *);
+IKI_DLLESPEC extern void execute_4316(char*, char *);
+IKI_DLLESPEC extern void execute_4331(char*, char *);
+IKI_DLLESPEC extern void execute_4333(char*, char *);
+IKI_DLLESPEC extern void execute_4335(char*, char *);
+IKI_DLLESPEC extern void execute_4347(char*, char *);
+IKI_DLLESPEC extern void execute_4348(char*, char *);
+IKI_DLLESPEC extern void execute_4349(char*, char *);
+IKI_DLLESPEC extern void execute_4351(char*, char *);
+IKI_DLLESPEC extern void execute_4352(char*, char *);
+IKI_DLLESPEC extern void execute_4353(char*, char *);
+IKI_DLLESPEC extern void execute_4354(char*, char *);
+IKI_DLLESPEC extern void execute_4355(char*, char *);
+IKI_DLLESPEC extern void execute_4356(char*, char *);
+IKI_DLLESPEC extern void execute_4357(char*, char *);
+IKI_DLLESPEC extern void execute_4358(char*, char *);
+IKI_DLLESPEC extern void execute_4360(char*, char *);
+IKI_DLLESPEC extern void execute_4361(char*, char *);
+IKI_DLLESPEC extern void execute_4362(char*, char *);
+IKI_DLLESPEC extern void execute_4363(char*, char *);
+IKI_DLLESPEC extern void execute_4364(char*, char *);
+IKI_DLLESPEC extern void execute_4365(char*, char *);
+IKI_DLLESPEC extern void execute_4366(char*, char *);
+IKI_DLLESPEC extern void execute_4367(char*, char *);
+IKI_DLLESPEC extern void execute_4368(char*, char *);
+IKI_DLLESPEC extern void execute_4369(char*, char *);
+IKI_DLLESPEC extern void execute_4370(char*, char *);
+IKI_DLLESPEC extern void execute_4375(char*, char *);
+IKI_DLLESPEC extern void execute_4376(char*, char *);
+IKI_DLLESPEC extern void execute_4377(char*, char *);
+IKI_DLLESPEC extern void execute_4378(char*, char *);
+IKI_DLLESPEC extern void execute_4379(char*, char *);
+IKI_DLLESPEC extern void execute_4380(char*, char *);
+IKI_DLLESPEC extern void execute_4381(char*, char *);
+IKI_DLLESPEC extern void execute_4382(char*, char *);
+IKI_DLLESPEC extern void execute_4383(char*, char *);
+IKI_DLLESPEC extern void execute_4384(char*, char *);
+IKI_DLLESPEC extern void execute_4385(char*, char *);
+IKI_DLLESPEC extern void execute_4386(char*, char *);
+IKI_DLLESPEC extern void execute_4387(char*, char *);
+IKI_DLLESPEC extern void execute_4388(char*, char *);
+IKI_DLLESPEC extern void execute_4389(char*, char *);
+IKI_DLLESPEC extern void execute_4390(char*, char *);
+IKI_DLLESPEC extern void execute_4391(char*, char *);
+IKI_DLLESPEC extern void execute_4392(char*, char *);
+IKI_DLLESPEC extern void execute_4393(char*, char *);
+IKI_DLLESPEC extern void execute_4394(char*, char *);
+IKI_DLLESPEC extern void execute_4395(char*, char *);
+IKI_DLLESPEC extern void execute_4396(char*, char *);
+IKI_DLLESPEC extern void execute_4397(char*, char *);
+IKI_DLLESPEC extern void execute_356(char*, char *);
+IKI_DLLESPEC extern void execute_4399(char*, char *);
+IKI_DLLESPEC extern void execute_4400(char*, char *);
+IKI_DLLESPEC extern void execute_4401(char*, char *);
+IKI_DLLESPEC extern void execute_4402(char*, char *);
+IKI_DLLESPEC extern void execute_4398(char*, char *);
+IKI_DLLESPEC extern void execute_359(char*, char *);
+IKI_DLLESPEC extern void execute_360(char*, char *);
+IKI_DLLESPEC extern void execute_363(char*, char *);
+IKI_DLLESPEC extern void execute_364(char*, char *);
+IKI_DLLESPEC extern void execute_470(char*, char *);
+IKI_DLLESPEC extern void execute_506(char*, char *);
+IKI_DLLESPEC extern void execute_755(char*, char *);
+IKI_DLLESPEC extern void execute_756(char*, char *);
+IKI_DLLESPEC extern void execute_757(char*, char *);
+IKI_DLLESPEC extern void execute_4543(char*, char *);
+IKI_DLLESPEC extern void execute_4544(char*, char *);
+IKI_DLLESPEC extern void execute_4545(char*, char *);
+IKI_DLLESPEC extern void execute_4546(char*, char *);
+IKI_DLLESPEC extern void execute_4555(char*, char *);
+IKI_DLLESPEC extern void execute_4556(char*, char *);
+IKI_DLLESPEC extern void execute_4557(char*, char *);
+IKI_DLLESPEC extern void execute_4560(char*, char *);
+IKI_DLLESPEC extern void execute_4561(char*, char *);
+IKI_DLLESPEC extern void execute_4562(char*, char *);
+IKI_DLLESPEC extern void execute_4563(char*, char *);
+IKI_DLLESPEC extern void execute_838(char*, char *);
+IKI_DLLESPEC extern void execute_839(char*, char *);
+IKI_DLLESPEC extern void execute_4060(char*, char *);
+IKI_DLLESPEC extern void execute_4061(char*, char *);
+IKI_DLLESPEC extern void execute_4062(char*, char *);
+IKI_DLLESPEC extern void execute_4063(char*, char *);
+IKI_DLLESPEC extern void execute_7909(char*, char *);
+IKI_DLLESPEC extern void execute_7910(char*, char *);
+IKI_DLLESPEC extern void execute_7911(char*, char *);
+IKI_DLLESPEC extern void execute_7912(char*, char *);
+IKI_DLLESPEC extern void execute_7913(char*, char *);
+IKI_DLLESPEC extern void execute_7914(char*, char *);
+IKI_DLLESPEC extern void vlog_transfunc_eventcallback(char*, char*, unsigned, unsigned, unsigned, char *);
+IKI_DLLESPEC extern void transaction_20(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_21(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_23(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_24(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_25(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_26(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_27(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_28(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_40(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_42(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_43(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_44(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_45(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_53(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_54(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_55(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_56(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_57(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_58(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_59(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_60(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_63(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_64(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_65(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_66(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_67(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_69(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_70(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_71(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_72(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_73(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_74(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_75(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_76(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_77(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_78(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_79(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_83(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_84(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_85(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_86(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_87(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_88(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_710(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_711(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_712(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_714(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void vhdl_transfunc_eventcallback(char*, char*, unsigned, unsigned, unsigned, char *);
+IKI_DLLESPEC extern void transaction_725(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_770(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_811(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_819(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_820(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_822(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_823(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_824(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_825(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_826(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_827(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_828(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_833(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_834(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_835(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_836(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_837(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_838(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_839(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_840(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_841(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_842(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_843(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_844(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_855(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_965(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_974(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_975(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_976(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_977(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_978(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_979(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_983(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_984(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_985(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_986(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_987(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_988(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_989(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_990(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_997(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1014(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1019(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1047(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1048(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1049(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1050(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1051(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1052(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1053(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1054(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1055(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1056(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1057(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1058(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1059(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1060(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1061(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1062(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1063(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1064(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1065(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1066(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1067(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3937(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3945(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3946(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3948(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3949(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3950(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3951(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3952(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3953(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3954(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3959(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3960(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3961(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3962(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3963(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3964(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3965(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3966(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3967(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3968(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3969(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3970(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3981(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4091(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4100(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4101(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4102(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4103(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4104(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4105(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4109(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4110(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4111(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4112(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4113(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4114(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4115(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4116(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4123(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4140(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4145(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4173(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4174(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4175(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4176(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4177(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4178(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4179(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4180(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4181(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4182(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4183(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4184(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4185(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4186(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4187(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4188(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4189(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4190(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4191(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4192(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4193(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_50(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_194(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_195(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_263(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_264(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_265(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_266(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_296(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_707(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_708(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_709(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1076(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1077(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1080(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1084(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1085(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1088(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1091(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1093(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1095(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1097(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1102(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1105(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1111(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1116(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1132(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1139(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1140(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1141(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1142(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1148(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1776(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1782(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1788(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1802(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1808(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1814(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1820(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1833(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1839(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1845(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1860(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1866(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1872(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1878(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1892(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1898(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1941(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1947(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1953(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1959(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1965(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1971(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1977(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1983(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1989(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1995(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2001(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2007(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2013(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2019(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2025(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2031(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2037(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2043(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2049(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2055(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2061(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2067(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2073(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2079(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2085(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2091(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2097(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2103(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2109(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2115(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2121(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2127(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2133(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2139(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2145(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2151(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2157(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2163(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2169(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2175(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2181(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2187(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2193(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2199(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2205(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2211(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2217(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2223(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2229(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2235(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2241(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2247(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2253(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2259(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2265(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2271(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2277(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2283(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2289(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2295(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2301(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2307(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2313(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2319(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2325(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2331(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2337(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2343(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2349(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2355(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2361(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2367(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2373(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2379(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2385(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2391(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2397(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2403(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2409(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2415(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2421(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2427(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2433(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2439(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2445(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2451(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2457(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2463(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2469(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2475(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2481(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2487(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2493(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2499(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2505(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2511(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2517(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2523(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2529(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2535(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2541(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2547(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2553(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2559(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2565(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2571(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2577(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2583(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2589(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2595(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2601(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2607(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2613(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2619(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2625(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2631(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2637(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2643(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2649(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2655(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2661(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2667(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2673(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2679(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2685(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2691(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2697(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2703(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2709(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2715(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2721(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2727(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2733(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2739(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2745(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2751(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2757(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2763(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2769(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2775(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2781(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2787(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2793(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2799(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2805(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2811(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2817(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2823(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2829(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2835(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2841(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2847(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2853(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2859(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2865(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2871(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2877(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2883(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2889(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2895(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2901(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2907(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2913(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2919(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2925(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2931(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2937(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2943(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2949(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2955(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2961(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2967(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2973(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2979(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2985(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2991(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2997(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3003(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3009(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3015(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3021(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3027(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3033(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3039(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3045(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3051(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3057(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3063(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3069(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3075(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3081(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3087(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3093(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3099(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3105(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3111(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3117(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3123(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3129(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3135(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3141(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3147(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3153(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3159(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3165(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3171(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3177(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3183(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3189(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3195(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3201(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3207(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3213(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3219(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3225(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3231(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3237(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3243(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3249(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3255(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3261(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3267(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3273(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3279(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3285(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3291(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3297(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3303(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3309(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3315(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3321(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3327(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3333(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3339(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3345(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3351(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3357(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3363(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3369(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3375(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3381(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3387(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3393(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3399(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3405(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3411(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3417(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3423(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3429(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3435(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3441(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3447(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3453(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3459(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3465(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3471(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3477(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3483(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3489(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3495(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3723(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3729(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3735(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3741(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3747(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3753(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3759(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3765(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3771(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3777(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3783(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3789(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3795(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3801(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3807(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3813(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3819(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3825(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3831(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3837(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3843(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3849(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3855(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3861(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3867(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3873(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3879(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3885(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3891(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3897(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3903(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3909(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3915(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3921(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3927(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3933(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4202(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4203(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4206(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4210(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4211(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4214(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4217(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4219(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4221(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4223(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4228(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4231(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4237(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4242(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4258(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4265(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4266(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4267(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4268(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4274(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4902(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4908(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4914(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4928(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4934(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4940(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4946(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4959(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4965(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4971(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4986(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4992(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_4998(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5004(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5018(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5024(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5067(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5073(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5079(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5085(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5091(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5097(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5103(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5109(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5115(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5121(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5127(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5133(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5139(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5145(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5151(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5157(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5163(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5169(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5175(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5181(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5187(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5193(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5199(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5205(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5211(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5217(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5223(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5229(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5235(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5241(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5247(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5253(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5259(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5265(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5271(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5277(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5283(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5289(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5295(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5301(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5307(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5313(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5319(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5325(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5331(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5337(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5343(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5349(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5355(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5361(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5367(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5373(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5379(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5385(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5391(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5397(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5403(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5409(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5415(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5421(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5427(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5433(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5439(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5445(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5451(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5457(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5463(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5469(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5475(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5481(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5487(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5493(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5499(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5505(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5511(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5517(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5523(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5529(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5535(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5541(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5547(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5553(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5559(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5565(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5571(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5577(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5583(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5589(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5595(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5601(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5607(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5613(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5619(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5625(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5631(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5637(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5643(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5649(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5655(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5661(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5667(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5673(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5679(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5685(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5691(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5697(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5703(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5709(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5715(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5721(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5727(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5733(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5739(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5745(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5751(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5757(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5763(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5769(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5775(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5781(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5787(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5793(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5799(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5805(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5811(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5817(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5823(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5829(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5835(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5841(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5847(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5853(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5859(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5865(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5871(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5877(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5883(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5889(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5895(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5901(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5907(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5913(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5919(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5925(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5931(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5937(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5943(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5949(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5955(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5961(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5967(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5973(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5979(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5985(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5991(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_5997(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6003(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6009(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6015(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6021(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6027(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6033(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6039(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6045(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6051(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6057(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6063(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6069(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6075(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6081(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6087(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6093(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6099(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6105(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6111(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6117(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6123(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6129(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6135(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6141(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6147(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6153(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6159(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6165(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6171(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6177(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6183(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6189(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6195(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6201(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6207(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6213(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6219(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6225(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6231(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6237(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6243(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6249(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6255(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6261(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6267(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6273(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6279(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6285(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6291(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6297(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6303(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6309(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6315(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6321(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6327(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6333(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6339(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6345(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6351(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6357(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6363(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6369(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6375(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6381(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6387(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6393(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6399(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6405(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6411(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6417(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6423(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6429(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6435(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6441(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6447(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6453(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6459(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6465(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6471(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6477(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6483(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6489(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6495(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6501(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6507(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6513(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6519(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6525(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6531(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6537(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6543(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6549(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6555(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6561(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6567(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6573(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6579(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6585(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6591(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6597(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6603(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6609(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6615(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6621(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6849(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6855(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6861(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6867(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6873(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6879(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6885(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6891(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6897(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6903(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6909(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6915(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6921(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6927(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6933(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6939(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6945(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6951(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6957(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6963(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6969(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6975(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6981(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6987(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6993(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_6999(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_7005(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_7011(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_7017(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_7023(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_7029(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_7035(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_7041(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_7047(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_7053(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_7059(char*, char*, unsigned, unsigned, unsigned);
+funcp funcTab[1270] = {(funcp)execute_218, (funcp)execute_219, (funcp)execute_4057, (funcp)execute_4058, (funcp)execute_4064, (funcp)execute_4065, (funcp)execute_4154, (funcp)execute_4155, (funcp)execute_4156, (funcp)execute_4157, (funcp)execute_4158, (funcp)execute_4159, (funcp)execute_4160, (funcp)execute_4161, (funcp)execute_4162, (funcp)vlog_simple_process_execute_0_fast_no_reg_no_agg, (funcp)execute_7903, (funcp)execute_7904, (funcp)execute_7905, (funcp)execute_7906, (funcp)execute_7907, (funcp)execute_7908, (funcp)vlog_const_rhs_process_execute_0_fast_no_reg_no_agg, (funcp)execute_4150, (funcp)execute_4151, (funcp)execute_4066, (funcp)execute_6, (funcp)execute_7, (funcp)execute_8, (funcp)execute_9, (funcp)execute_10, (funcp)execute_11, (funcp)execute_12, (funcp)execute_13, (funcp)execute_14, (funcp)execute_15, (funcp)execute_16, (funcp)execute_17, (funcp)execute_18, (funcp)execute_19, (funcp)execute_20, (funcp)execute_22, (funcp)execute_23, (funcp)execute_24, (funcp)execute_25, (funcp)execute_26, (funcp)execute_27, (funcp)execute_28, (funcp)execute_29, (funcp)execute_30, (funcp)execute_31, (funcp)execute_32, (funcp)execute_33, (funcp)execute_34, (funcp)execute_35, (funcp)execute_36, (funcp)execute_37, (funcp)execute_38, (funcp)execute_39, (funcp)execute_40, (funcp)execute_41, (funcp)execute_42, (funcp)execute_43, (funcp)execute_44, (funcp)execute_45, (funcp)execute_46, (funcp)execute_47, (funcp)execute_48, (funcp)execute_49, (funcp)execute_50, (funcp)execute_51, (funcp)execute_52, (funcp)execute_53, (funcp)execute_54, (funcp)execute_55, (funcp)execute_56, (funcp)execute_57, (funcp)execute_58, (funcp)execute_59, (funcp)execute_60, (funcp)execute_61, (funcp)execute_62, (funcp)execute_63, (funcp)execute_64, (funcp)execute_65, (funcp)execute_66, (funcp)execute_67, (funcp)execute_68, (funcp)execute_69, (funcp)execute_70, (funcp)execute_71, (funcp)execute_72, (funcp)execute_73, (funcp)execute_74, (funcp)execute_75, (funcp)execute_76, (funcp)execute_77, (funcp)execute_78, (funcp)execute_79, (funcp)execute_80, (funcp)execute_81, (funcp)execute_82, (funcp)execute_83, (funcp)execute_84, (funcp)execute_85, (funcp)execute_86, (funcp)execute_87, (funcp)execute_88, (funcp)execute_89, (funcp)execute_90, (funcp)execute_91, (funcp)execute_92, (funcp)execute_93, (funcp)execute_94, (funcp)execute_95, (funcp)execute_96, (funcp)execute_97, (funcp)execute_98, (funcp)execute_99, (funcp)execute_100, (funcp)execute_101, (funcp)execute_102, (funcp)execute_103, (funcp)execute_104, (funcp)execute_105, (funcp)execute_106, (funcp)execute_107, (funcp)execute_108, (funcp)execute_109, (funcp)execute_110, (funcp)execute_111, (funcp)execute_112, (funcp)execute_113, (funcp)execute_114, (funcp)execute_115, (funcp)execute_131, (funcp)execute_4067, (funcp)execute_4068, (funcp)execute_4071, (funcp)execute_4072, (funcp)execute_4084, (funcp)execute_4085, (funcp)execute_4086, (funcp)execute_4087, (funcp)execute_4088, (funcp)execute_4089, (funcp)execute_4090, (funcp)execute_4091, (funcp)execute_4092, (funcp)execute_4093, (funcp)execute_4094, (funcp)execute_4095, (funcp)execute_4096, (funcp)execute_4097, (funcp)execute_4098, (funcp)execute_4099, (funcp)execute_4100, (funcp)execute_4101, (funcp)execute_4102, (funcp)execute_4103, (funcp)execute_4104, (funcp)execute_4105, (funcp)execute_4106, (funcp)execute_4107, (funcp)execute_4108, (funcp)execute_4109, (funcp)execute_4110, (funcp)execute_4111, (funcp)execute_4112, (funcp)execute_4113, (funcp)execute_4114, (funcp)execute_4115, (funcp)execute_4116, (funcp)execute_4117, (funcp)execute_4118, (funcp)execute_4119, (funcp)execute_4120, (funcp)execute_4121, (funcp)execute_4122, (funcp)execute_4123, (funcp)execute_4124, (funcp)execute_4125, (funcp)execute_4126, (funcp)execute_4127, (funcp)execute_4128, (funcp)execute_4129, (funcp)execute_4130, (funcp)execute_4131, (funcp)execute_4132, (funcp)execute_4133, (funcp)execute_4134, (funcp)execute_4135, (funcp)execute_4136, (funcp)execute_4137, (funcp)execute_4138, (funcp)execute_4139, (funcp)execute_4140, (funcp)execute_4143, (funcp)execute_138, (funcp)execute_195, (funcp)execute_196, (funcp)execute_197, (funcp)execute_198, (funcp)execute_4152, (funcp)execute_4153, (funcp)execute_173, (funcp)execute_174, (funcp)execute_175, (funcp)execute_176, (funcp)execute_177, (funcp)execute_178, (funcp)execute_179, (funcp)execute_180, (funcp)execute_181, (funcp)execute_182, (funcp)execute_183, (funcp)execute_184, (funcp)execute_185, (funcp)execute_186, (funcp)execute_187, (funcp)execute_188, (funcp)execute_189, (funcp)execute_190, (funcp)execute_191, (funcp)execute_192, (funcp)execute_193, (funcp)execute_194, (funcp)execute_200, (funcp)execute_201, (funcp)execute_203, (funcp)execute_204, (funcp)execute_205, (funcp)execute_206, (funcp)execute_207, (funcp)execute_208, (funcp)execute_209, (funcp)execute_210, (funcp)execute_211, (funcp)execute_212, (funcp)execute_213, (funcp)execute_214, (funcp)execute_215, (funcp)execute_216, (funcp)execute_217, (funcp)execute_230, (funcp)execute_2136, (funcp)execute_2137, (funcp)execute_233, (funcp)execute_234, (funcp)execute_235, (funcp)execute_236, (funcp)execute_237, (funcp)execute_238, (funcp)execute_239, (funcp)execute_240, (funcp)execute_241, (funcp)execute_6034, (funcp)execute_6035, (funcp)execute_271, (funcp)execute_4196, (funcp)execute_4197, (funcp)execute_4198, (funcp)execute_306, (funcp)execute_4248, (funcp)execute_4249, (funcp)execute_4250, (funcp)execute_4251, (funcp)execute_4252, (funcp)execute_4253, (funcp)execute_4254, (funcp)execute_4255, (funcp)execute_4247, (funcp)execute_308, (funcp)execute_309, (funcp)execute_310, (funcp)execute_311, (funcp)execute_312, (funcp)execute_313, (funcp)execute_314, (funcp)execute_315, (funcp)execute_316, (funcp)execute_317, (funcp)execute_318, (funcp)execute_319, (funcp)execute_320, (funcp)execute_321, (funcp)execute_322, (funcp)execute_323, (funcp)execute_324, (funcp)execute_325, (funcp)execute_326, (funcp)execute_327, (funcp)execute_328, (funcp)execute_329, (funcp)execute_330, (funcp)execute_331, (funcp)execute_332, (funcp)execute_333, (funcp)execute_334, (funcp)execute_335, (funcp)execute_338, (funcp)execute_339, (funcp)execute_340, (funcp)execute_341, (funcp)execute_342, (funcp)execute_343, (funcp)execute_344, (funcp)execute_345, (funcp)execute_346, (funcp)execute_347, (funcp)execute_348, (funcp)execute_349, (funcp)execute_350, (funcp)execute_351, (funcp)execute_352, (funcp)execute_353, (funcp)execute_4256, (funcp)execute_4257, (funcp)execute_4258, (funcp)execute_4259, (funcp)execute_4260, (funcp)execute_4261, (funcp)execute_4262, (funcp)execute_4263, (funcp)execute_4264, (funcp)execute_4265, (funcp)execute_4266, (funcp)execute_4267, (funcp)execute_4268, (funcp)execute_4269, (funcp)execute_4270, (funcp)vlog_simple_process_execute_1_fast_no_reg_no_agg, (funcp)execute_4311, (funcp)execute_4316, (funcp)execute_4331, (funcp)execute_4333, (funcp)execute_4335, (funcp)execute_4347, (funcp)execute_4348, (funcp)execute_4349, (funcp)execute_4351, (funcp)execute_4352, (funcp)execute_4353, (funcp)execute_4354, (funcp)execute_4355, (funcp)execute_4356, (funcp)execute_4357, (funcp)execute_4358, (funcp)execute_4360, (funcp)execute_4361, (funcp)execute_4362, (funcp)execute_4363, (funcp)execute_4364, (funcp)execute_4365, (funcp)execute_4366, (funcp)execute_4367, (funcp)execute_4368, (funcp)execute_4369, (funcp)execute_4370, (funcp)execute_4375, (funcp)execute_4376, (funcp)execute_4377, (funcp)execute_4378, (funcp)execute_4379, (funcp)execute_4380, (funcp)execute_4381, (funcp)execute_4382, (funcp)execute_4383, (funcp)execute_4384, (funcp)execute_4385, (funcp)execute_4386, (funcp)execute_4387, (funcp)execute_4388, (funcp)execute_4389, (funcp)execute_4390, (funcp)execute_4391, (funcp)execute_4392, (funcp)execute_4393, (funcp)execute_4394, (funcp)execute_4395, (funcp)execute_4396, (funcp)execute_4397, (funcp)execute_356, (funcp)execute_4399, (funcp)execute_4400, (funcp)execute_4401, (funcp)execute_4402, (funcp)execute_4398, (funcp)execute_359, (funcp)execute_360, (funcp)execute_363, (funcp)execute_364, (funcp)execute_470, (funcp)execute_506, (funcp)execute_755, (funcp)execute_756, (funcp)execute_757, (funcp)execute_4543, (funcp)execute_4544, (funcp)execute_4545, (funcp)execute_4546, (funcp)execute_4555, (funcp)execute_4556, (funcp)execute_4557, (funcp)execute_4560, (funcp)execute_4561, (funcp)execute_4562, (funcp)execute_4563, (funcp)execute_838, (funcp)execute_839, (funcp)execute_4060, (funcp)execute_4061, (funcp)execute_4062, (funcp)execute_4063, (funcp)execute_7909, (funcp)execute_7910, (funcp)execute_7911, (funcp)execute_7912, (funcp)execute_7913, (funcp)execute_7914, (funcp)vlog_transfunc_eventcallback, (funcp)transaction_20, (funcp)transaction_21, (funcp)transaction_23, (funcp)transaction_24, (funcp)transaction_25, (funcp)transaction_26, (funcp)transaction_27, (funcp)transaction_28, (funcp)transaction_40, (funcp)transaction_42, (funcp)transaction_43, (funcp)transaction_44, (funcp)transaction_45, (funcp)transaction_53, (funcp)transaction_54, (funcp)transaction_55, (funcp)transaction_56, (funcp)transaction_57, (funcp)transaction_58, (funcp)transaction_59, (funcp)transaction_60, (funcp)transaction_63, (funcp)transaction_64, (funcp)transaction_65, (funcp)transaction_66, (funcp)transaction_67, (funcp)transaction_69, (funcp)transaction_70, (funcp)transaction_71, (funcp)transaction_72, (funcp)transaction_73, (funcp)transaction_74, (funcp)transaction_75, (funcp)transaction_76, (funcp)transaction_77, (funcp)transaction_78, (funcp)transaction_79, (funcp)transaction_83, (funcp)transaction_84, (funcp)transaction_85, (funcp)transaction_86, (funcp)transaction_87, (funcp)transaction_88, (funcp)transaction_710, (funcp)transaction_711, (funcp)transaction_712, (funcp)transaction_714, (funcp)vhdl_transfunc_eventcallback, (funcp)transaction_725, (funcp)transaction_770, (funcp)transaction_811, (funcp)transaction_819, (funcp)transaction_820, (funcp)transaction_822, (funcp)transaction_823, (funcp)transaction_824, (funcp)transaction_825, (funcp)transaction_826, (funcp)transaction_827, (funcp)transaction_828, (funcp)transaction_833, (funcp)transaction_834, (funcp)transaction_835, (funcp)transaction_836, (funcp)transaction_837, (funcp)transaction_838, (funcp)transaction_839, (funcp)transaction_840, (funcp)transaction_841, (funcp)transaction_842, (funcp)transaction_843, (funcp)transaction_844, (funcp)transaction_855, (funcp)transaction_965, (funcp)transaction_974, (funcp)transaction_975, (funcp)transaction_976, (funcp)transaction_977, (funcp)transaction_978, (funcp)transaction_979, (funcp)transaction_983, (funcp)transaction_984, (funcp)transaction_985, (funcp)transaction_986, (funcp)transaction_987, (funcp)transaction_988, (funcp)transaction_989, (funcp)transaction_990, (funcp)transaction_997, (funcp)transaction_1014, (funcp)transaction_1019, (funcp)transaction_1047, (funcp)transaction_1048, (funcp)transaction_1049, (funcp)transaction_1050, (funcp)transaction_1051, (funcp)transaction_1052, (funcp)transaction_1053, (funcp)transaction_1054, (funcp)transaction_1055, (funcp)transaction_1056, (funcp)transaction_1057, (funcp)transaction_1058, (funcp)transaction_1059, (funcp)transaction_1060, (funcp)transaction_1061, (funcp)transaction_1062, (funcp)transaction_1063, (funcp)transaction_1064, (funcp)transaction_1065, (funcp)transaction_1066, (funcp)transaction_1067, (funcp)transaction_3937, (funcp)transaction_3945, (funcp)transaction_3946, (funcp)transaction_3948, (funcp)transaction_3949, (funcp)transaction_3950, (funcp)transaction_3951, (funcp)transaction_3952, (funcp)transaction_3953, (funcp)transaction_3954, (funcp)transaction_3959, (funcp)transaction_3960, (funcp)transaction_3961, (funcp)transaction_3962, (funcp)transaction_3963, (funcp)transaction_3964, (funcp)transaction_3965, (funcp)transaction_3966, (funcp)transaction_3967, (funcp)transaction_3968, (funcp)transaction_3969, (funcp)transaction_3970, (funcp)transaction_3981, (funcp)transaction_4091, (funcp)transaction_4100, (funcp)transaction_4101, (funcp)transaction_4102, (funcp)transaction_4103, (funcp)transaction_4104, (funcp)transaction_4105, (funcp)transaction_4109, (funcp)transaction_4110, (funcp)transaction_4111, (funcp)transaction_4112, (funcp)transaction_4113, (funcp)transaction_4114, (funcp)transaction_4115, (funcp)transaction_4116, (funcp)transaction_4123, (funcp)transaction_4140, (funcp)transaction_4145, (funcp)transaction_4173, (funcp)transaction_4174, (funcp)transaction_4175, (funcp)transaction_4176, (funcp)transaction_4177, (funcp)transaction_4178, (funcp)transaction_4179, (funcp)transaction_4180, (funcp)transaction_4181, (funcp)transaction_4182, (funcp)transaction_4183, (funcp)transaction_4184, (funcp)transaction_4185, (funcp)transaction_4186, (funcp)transaction_4187, (funcp)transaction_4188, (funcp)transaction_4189, (funcp)transaction_4190, (funcp)transaction_4191, (funcp)transaction_4192, (funcp)transaction_4193, (funcp)transaction_50, (funcp)transaction_194, (funcp)transaction_195, (funcp)transaction_263, (funcp)transaction_264, (funcp)transaction_265, (funcp)transaction_266, (funcp)transaction_296, (funcp)transaction_707, (funcp)transaction_708, (funcp)transaction_709, (funcp)transaction_1076, (funcp)transaction_1077, (funcp)transaction_1080, (funcp)transaction_1084, (funcp)transaction_1085, (funcp)transaction_1088, (funcp)transaction_1091, (funcp)transaction_1093, (funcp)transaction_1095, (funcp)transaction_1097, (funcp)transaction_1102, (funcp)transaction_1105, (funcp)transaction_1111, (funcp)transaction_1116, (funcp)transaction_1132, (funcp)transaction_1139, (funcp)transaction_1140, (funcp)transaction_1141, (funcp)transaction_1142, (funcp)transaction_1148, (funcp)transaction_1776, (funcp)transaction_1782, (funcp)transaction_1788, (funcp)transaction_1802, (funcp)transaction_1808, (funcp)transaction_1814, (funcp)transaction_1820, (funcp)transaction_1833, (funcp)transaction_1839, (funcp)transaction_1845, (funcp)transaction_1860, (funcp)transaction_1866, (funcp)transaction_1872, (funcp)transaction_1878, (funcp)transaction_1892, (funcp)transaction_1898, (funcp)transaction_1941, (funcp)transaction_1947, (funcp)transaction_1953, (funcp)transaction_1959, (funcp)transaction_1965, (funcp)transaction_1971, (funcp)transaction_1977, (funcp)transaction_1983, (funcp)transaction_1989, (funcp)transaction_1995, (funcp)transaction_2001, (funcp)transaction_2007, (funcp)transaction_2013, (funcp)transaction_2019, (funcp)transaction_2025, (funcp)transaction_2031, (funcp)transaction_2037, (funcp)transaction_2043, (funcp)transaction_2049, (funcp)transaction_2055, (funcp)transaction_2061, (funcp)transaction_2067, (funcp)transaction_2073, (funcp)transaction_2079, (funcp)transaction_2085, (funcp)transaction_2091, (funcp)transaction_2097, (funcp)transaction_2103, (funcp)transaction_2109, (funcp)transaction_2115, (funcp)transaction_2121, (funcp)transaction_2127, (funcp)transaction_2133, (funcp)transaction_2139, (funcp)transaction_2145, (funcp)transaction_2151, (funcp)transaction_2157, (funcp)transaction_2163, (funcp)transaction_2169, (funcp)transaction_2175, (funcp)transaction_2181, (funcp)transaction_2187, (funcp)transaction_2193, (funcp)transaction_2199, (funcp)transaction_2205, (funcp)transaction_2211, (funcp)transaction_2217, (funcp)transaction_2223, (funcp)transaction_2229, (funcp)transaction_2235, (funcp)transaction_2241, (funcp)transaction_2247, (funcp)transaction_2253, (funcp)transaction_2259, (funcp)transaction_2265, (funcp)transaction_2271, (funcp)transaction_2277, (funcp)transaction_2283, (funcp)transaction_2289, (funcp)transaction_2295, (funcp)transaction_2301, (funcp)transaction_2307, (funcp)transaction_2313, (funcp)transaction_2319, (funcp)transaction_2325, (funcp)transaction_2331, (funcp)transaction_2337, (funcp)transaction_2343, (funcp)transaction_2349, (funcp)transaction_2355, (funcp)transaction_2361, (funcp)transaction_2367, (funcp)transaction_2373, (funcp)transaction_2379, (funcp)transaction_2385, (funcp)transaction_2391, (funcp)transaction_2397, (funcp)transaction_2403, (funcp)transaction_2409, (funcp)transaction_2415, (funcp)transaction_2421, (funcp)transaction_2427, (funcp)transaction_2433, (funcp)transaction_2439, (funcp)transaction_2445, (funcp)transaction_2451, (funcp)transaction_2457, (funcp)transaction_2463, (funcp)transaction_2469, (funcp)transaction_2475, (funcp)transaction_2481, (funcp)transaction_2487, (funcp)transaction_2493, (funcp)transaction_2499, (funcp)transaction_2505, (funcp)transaction_2511, (funcp)transaction_2517, (funcp)transaction_2523, (funcp)transaction_2529, (funcp)transaction_2535, (funcp)transaction_2541, (funcp)transaction_2547, (funcp)transaction_2553, (funcp)transaction_2559, (funcp)transaction_2565, (funcp)transaction_2571, (funcp)transaction_2577, (funcp)transaction_2583, (funcp)transaction_2589, (funcp)transaction_2595, (funcp)transaction_2601, (funcp)transaction_2607, (funcp)transaction_2613, (funcp)transaction_2619, (funcp)transaction_2625, (funcp)transaction_2631, (funcp)transaction_2637, (funcp)transaction_2643, (funcp)transaction_2649, (funcp)transaction_2655, (funcp)transaction_2661, (funcp)transaction_2667, (funcp)transaction_2673, (funcp)transaction_2679, (funcp)transaction_2685, (funcp)transaction_2691, (funcp)transaction_2697, (funcp)transaction_2703, (funcp)transaction_2709, (funcp)transaction_2715, (funcp)transaction_2721, (funcp)transaction_2727, (funcp)transaction_2733, (funcp)transaction_2739, (funcp)transaction_2745, (funcp)transaction_2751, (funcp)transaction_2757, (funcp)transaction_2763, (funcp)transaction_2769, (funcp)transaction_2775, (funcp)transaction_2781, (funcp)transaction_2787, (funcp)transaction_2793, (funcp)transaction_2799, (funcp)transaction_2805, (funcp)transaction_2811, (funcp)transaction_2817, (funcp)transaction_2823, (funcp)transaction_2829, (funcp)transaction_2835, (funcp)transaction_2841, (funcp)transaction_2847, (funcp)transaction_2853, (funcp)transaction_2859, (funcp)transaction_2865, (funcp)transaction_2871, (funcp)transaction_2877, (funcp)transaction_2883, (funcp)transaction_2889, (funcp)transaction_2895, (funcp)transaction_2901, (funcp)transaction_2907, (funcp)transaction_2913, (funcp)transaction_2919, (funcp)transaction_2925, (funcp)transaction_2931, (funcp)transaction_2937, (funcp)transaction_2943, (funcp)transaction_2949, (funcp)transaction_2955, (funcp)transaction_2961, (funcp)transaction_2967, (funcp)transaction_2973, (funcp)transaction_2979, (funcp)transaction_2985, (funcp)transaction_2991, (funcp)transaction_2997, (funcp)transaction_3003, (funcp)transaction_3009, (funcp)transaction_3015, (funcp)transaction_3021, (funcp)transaction_3027, (funcp)transaction_3033, (funcp)transaction_3039, (funcp)transaction_3045, (funcp)transaction_3051, (funcp)transaction_3057, (funcp)transaction_3063, (funcp)transaction_3069, (funcp)transaction_3075, (funcp)transaction_3081, (funcp)transaction_3087, (funcp)transaction_3093, (funcp)transaction_3099, (funcp)transaction_3105, (funcp)transaction_3111, (funcp)transaction_3117, (funcp)transaction_3123, (funcp)transaction_3129, (funcp)transaction_3135, (funcp)transaction_3141, (funcp)transaction_3147, (funcp)transaction_3153, (funcp)transaction_3159, (funcp)transaction_3165, (funcp)transaction_3171, (funcp)transaction_3177, (funcp)transaction_3183, (funcp)transaction_3189, (funcp)transaction_3195, (funcp)transaction_3201, (funcp)transaction_3207, (funcp)transaction_3213, (funcp)transaction_3219, (funcp)transaction_3225, (funcp)transaction_3231, (funcp)transaction_3237, (funcp)transaction_3243, (funcp)transaction_3249, (funcp)transaction_3255, (funcp)transaction_3261, (funcp)transaction_3267, (funcp)transaction_3273, (funcp)transaction_3279, (funcp)transaction_3285, (funcp)transaction_3291, (funcp)transaction_3297, (funcp)transaction_3303, (funcp)transaction_3309, (funcp)transaction_3315, (funcp)transaction_3321, (funcp)transaction_3327, (funcp)transaction_3333, (funcp)transaction_3339, (funcp)transaction_3345, (funcp)transaction_3351, (funcp)transaction_3357, (funcp)transaction_3363, (funcp)transaction_3369, (funcp)transaction_3375, (funcp)transaction_3381, (funcp)transaction_3387, (funcp)transaction_3393, (funcp)transaction_3399, (funcp)transaction_3405, (funcp)transaction_3411, (funcp)transaction_3417, (funcp)transaction_3423, (funcp)transaction_3429, (funcp)transaction_3435, (funcp)transaction_3441, (funcp)transaction_3447, (funcp)transaction_3453, (funcp)transaction_3459, (funcp)transaction_3465, (funcp)transaction_3471, (funcp)transaction_3477, (funcp)transaction_3483, (funcp)transaction_3489, (funcp)transaction_3495, (funcp)transaction_3723, (funcp)transaction_3729, (funcp)transaction_3735, (funcp)transaction_3741, (funcp)transaction_3747, (funcp)transaction_3753, (funcp)transaction_3759, (funcp)transaction_3765, (funcp)transaction_3771, (funcp)transaction_3777, (funcp)transaction_3783, (funcp)transaction_3789, (funcp)transaction_3795, (funcp)transaction_3801, (funcp)transaction_3807, (funcp)transaction_3813, (funcp)transaction_3819, (funcp)transaction_3825, (funcp)transaction_3831, (funcp)transaction_3837, (funcp)transaction_3843, (funcp)transaction_3849, (funcp)transaction_3855, (funcp)transaction_3861, (funcp)transaction_3867, (funcp)transaction_3873, (funcp)transaction_3879, (funcp)transaction_3885, (funcp)transaction_3891, (funcp)transaction_3897, (funcp)transaction_3903, (funcp)transaction_3909, (funcp)transaction_3915, (funcp)transaction_3921, (funcp)transaction_3927, (funcp)transaction_3933, (funcp)transaction_4202, (funcp)transaction_4203, (funcp)transaction_4206, (funcp)transaction_4210, (funcp)transaction_4211, (funcp)transaction_4214, (funcp)transaction_4217, (funcp)transaction_4219, (funcp)transaction_4221, (funcp)transaction_4223, (funcp)transaction_4228, (funcp)transaction_4231, (funcp)transaction_4237, (funcp)transaction_4242, (funcp)transaction_4258, (funcp)transaction_4265, (funcp)transaction_4266, (funcp)transaction_4267, (funcp)transaction_4268, (funcp)transaction_4274, (funcp)transaction_4902, (funcp)transaction_4908, (funcp)transaction_4914, (funcp)transaction_4928, (funcp)transaction_4934, (funcp)transaction_4940, (funcp)transaction_4946, (funcp)transaction_4959, (funcp)transaction_4965, (funcp)transaction_4971, (funcp)transaction_4986, (funcp)transaction_4992, (funcp)transaction_4998, (funcp)transaction_5004, (funcp)transaction_5018, (funcp)transaction_5024, (funcp)transaction_5067, (funcp)transaction_5073, (funcp)transaction_5079, (funcp)transaction_5085, (funcp)transaction_5091, (funcp)transaction_5097, (funcp)transaction_5103, (funcp)transaction_5109, (funcp)transaction_5115, (funcp)transaction_5121, (funcp)transaction_5127, (funcp)transaction_5133, (funcp)transaction_5139, (funcp)transaction_5145, (funcp)transaction_5151, (funcp)transaction_5157, (funcp)transaction_5163, (funcp)transaction_5169, (funcp)transaction_5175, (funcp)transaction_5181, (funcp)transaction_5187, (funcp)transaction_5193, (funcp)transaction_5199, (funcp)transaction_5205, (funcp)transaction_5211, (funcp)transaction_5217, (funcp)transaction_5223, (funcp)transaction_5229, (funcp)transaction_5235, (funcp)transaction_5241, (funcp)transaction_5247, (funcp)transaction_5253, (funcp)transaction_5259, (funcp)transaction_5265, (funcp)transaction_5271, (funcp)transaction_5277, (funcp)transaction_5283, (funcp)transaction_5289, (funcp)transaction_5295, (funcp)transaction_5301, (funcp)transaction_5307, (funcp)transaction_5313, (funcp)transaction_5319, (funcp)transaction_5325, (funcp)transaction_5331, (funcp)transaction_5337, (funcp)transaction_5343, (funcp)transaction_5349, (funcp)transaction_5355, (funcp)transaction_5361, (funcp)transaction_5367, (funcp)transaction_5373, (funcp)transaction_5379, (funcp)transaction_5385, (funcp)transaction_5391, (funcp)transaction_5397, (funcp)transaction_5403, (funcp)transaction_5409, (funcp)transaction_5415, (funcp)transaction_5421, (funcp)transaction_5427, (funcp)transaction_5433, (funcp)transaction_5439, (funcp)transaction_5445, (funcp)transaction_5451, (funcp)transaction_5457, (funcp)transaction_5463, (funcp)transaction_5469, (funcp)transaction_5475, (funcp)transaction_5481, (funcp)transaction_5487, (funcp)transaction_5493, (funcp)transaction_5499, (funcp)transaction_5505, (funcp)transaction_5511, (funcp)transaction_5517, (funcp)transaction_5523, (funcp)transaction_5529, (funcp)transaction_5535, (funcp)transaction_5541, (funcp)transaction_5547, (funcp)transaction_5553, (funcp)transaction_5559, (funcp)transaction_5565, (funcp)transaction_5571, (funcp)transaction_5577, (funcp)transaction_5583, (funcp)transaction_5589, (funcp)transaction_5595, (funcp)transaction_5601, (funcp)transaction_5607, (funcp)transaction_5613, (funcp)transaction_5619, (funcp)transaction_5625, (funcp)transaction_5631, (funcp)transaction_5637, (funcp)transaction_5643, (funcp)transaction_5649, (funcp)transaction_5655, (funcp)transaction_5661, (funcp)transaction_5667, (funcp)transaction_5673, (funcp)transaction_5679, (funcp)transaction_5685, (funcp)transaction_5691, (funcp)transaction_5697, (funcp)transaction_5703, (funcp)transaction_5709, (funcp)transaction_5715, (funcp)transaction_5721, (funcp)transaction_5727, (funcp)transaction_5733, (funcp)transaction_5739, (funcp)transaction_5745, (funcp)transaction_5751, (funcp)transaction_5757, (funcp)transaction_5763, (funcp)transaction_5769, (funcp)transaction_5775, (funcp)transaction_5781, (funcp)transaction_5787, (funcp)transaction_5793, (funcp)transaction_5799, (funcp)transaction_5805, (funcp)transaction_5811, (funcp)transaction_5817, (funcp)transaction_5823, (funcp)transaction_5829, (funcp)transaction_5835, (funcp)transaction_5841, (funcp)transaction_5847, (funcp)transaction_5853, (funcp)transaction_5859, (funcp)transaction_5865, (funcp)transaction_5871, (funcp)transaction_5877, (funcp)transaction_5883, (funcp)transaction_5889, (funcp)transaction_5895, (funcp)transaction_5901, (funcp)transaction_5907, (funcp)transaction_5913, (funcp)transaction_5919, (funcp)transaction_5925, (funcp)transaction_5931, (funcp)transaction_5937, (funcp)transaction_5943, (funcp)transaction_5949, (funcp)transaction_5955, (funcp)transaction_5961, (funcp)transaction_5967, (funcp)transaction_5973, (funcp)transaction_5979, (funcp)transaction_5985, (funcp)transaction_5991, (funcp)transaction_5997, (funcp)transaction_6003, (funcp)transaction_6009, (funcp)transaction_6015, (funcp)transaction_6021, (funcp)transaction_6027, (funcp)transaction_6033, (funcp)transaction_6039, (funcp)transaction_6045, (funcp)transaction_6051, (funcp)transaction_6057, (funcp)transaction_6063, (funcp)transaction_6069, (funcp)transaction_6075, (funcp)transaction_6081, (funcp)transaction_6087, (funcp)transaction_6093, (funcp)transaction_6099, (funcp)transaction_6105, (funcp)transaction_6111, (funcp)transaction_6117, (funcp)transaction_6123, (funcp)transaction_6129, (funcp)transaction_6135, (funcp)transaction_6141, (funcp)transaction_6147, (funcp)transaction_6153, (funcp)transaction_6159, (funcp)transaction_6165, (funcp)transaction_6171, (funcp)transaction_6177, (funcp)transaction_6183, (funcp)transaction_6189, (funcp)transaction_6195, (funcp)transaction_6201, (funcp)transaction_6207, (funcp)transaction_6213, (funcp)transaction_6219, (funcp)transaction_6225, (funcp)transaction_6231, (funcp)transaction_6237, (funcp)transaction_6243, (funcp)transaction_6249, (funcp)transaction_6255, (funcp)transaction_6261, (funcp)transaction_6267, (funcp)transaction_6273, (funcp)transaction_6279, (funcp)transaction_6285, (funcp)transaction_6291, (funcp)transaction_6297, (funcp)transaction_6303, (funcp)transaction_6309, (funcp)transaction_6315, (funcp)transaction_6321, (funcp)transaction_6327, (funcp)transaction_6333, (funcp)transaction_6339, (funcp)transaction_6345, (funcp)transaction_6351, (funcp)transaction_6357, (funcp)transaction_6363, (funcp)transaction_6369, (funcp)transaction_6375, (funcp)transaction_6381, (funcp)transaction_6387, (funcp)transaction_6393, (funcp)transaction_6399, (funcp)transaction_6405, (funcp)transaction_6411, (funcp)transaction_6417, (funcp)transaction_6423, (funcp)transaction_6429, (funcp)transaction_6435, (funcp)transaction_6441, (funcp)transaction_6447, (funcp)transaction_6453, (funcp)transaction_6459, (funcp)transaction_6465, (funcp)transaction_6471, (funcp)transaction_6477, (funcp)transaction_6483, (funcp)transaction_6489, (funcp)transaction_6495, (funcp)transaction_6501, (funcp)transaction_6507, (funcp)transaction_6513, (funcp)transaction_6519, (funcp)transaction_6525, (funcp)transaction_6531, (funcp)transaction_6537, (funcp)transaction_6543, (funcp)transaction_6549, (funcp)transaction_6555, (funcp)transaction_6561, (funcp)transaction_6567, (funcp)transaction_6573, (funcp)transaction_6579, (funcp)transaction_6585, (funcp)transaction_6591, (funcp)transaction_6597, (funcp)transaction_6603, (funcp)transaction_6609, (funcp)transaction_6615, (funcp)transaction_6621, (funcp)transaction_6849, (funcp)transaction_6855, (funcp)transaction_6861, (funcp)transaction_6867, (funcp)transaction_6873, (funcp)transaction_6879, (funcp)transaction_6885, (funcp)transaction_6891, (funcp)transaction_6897, (funcp)transaction_6903, (funcp)transaction_6909, (funcp)transaction_6915, (funcp)transaction_6921, (funcp)transaction_6927, (funcp)transaction_6933, (funcp)transaction_6939, (funcp)transaction_6945, (funcp)transaction_6951, (funcp)transaction_6957, (funcp)transaction_6963, (funcp)transaction_6969, (funcp)transaction_6975, (funcp)transaction_6981, (funcp)transaction_6987, (funcp)transaction_6993, (funcp)transaction_6999, (funcp)transaction_7005, (funcp)transaction_7011, (funcp)transaction_7017, (funcp)transaction_7023, (funcp)transaction_7029, (funcp)transaction_7035, (funcp)transaction_7041, (funcp)transaction_7047, (funcp)transaction_7053, (funcp)transaction_7059};
+const int NumRelocateId= 1270;
+
+void relocate(char *dp)
+{
+ iki_relocate(dp, "xsim.dir/audioProc_behav/xsim.reloc", (void **)funcTab, 1270);
+ iki_vhdl_file_variable_register(dp + 1557080);
+ iki_vhdl_file_variable_register(dp + 1557136);
+
+
+ /*Populate the transaction function pointer field in the whole net structure */
+}
+
+void sensitize(char *dp)
+{
+ iki_sensitize(dp, "xsim.dir/audioProc_behav/xsim.reloc");
+}
+
+ // Initialize Verilog nets in mixed simulation, for the cases when the value at time 0 should be propagated from the mixed language Vhdl net
+
+void wrapper_func_0(char *dp)
+
+{
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 1642776, dp + 1560744, 0, 0, 0, 0, 1, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 1642720, dp + 1560800, 0, 0, 0, 0, 1, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 1650416, dp + 1560968, 0, 0, 0, 0, 1, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 1650304, dp + 1561024, 0, 0, 0, 0, 1, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 1650360, dp + 1561080, 0, 0, 0, 0, 1, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 1650224, dp + 1562088, 0, 23, 0, 23, 24, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 1650264, dp + 1562144, 0, 23, 0, 23, 24, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 1654656, dp + 1562704, 0, 23, 0, 23, 24, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 2558192, dp + 1562760, 0, 23, 0, 23, 24, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 1642456, dp + 1640648, 0, 7, 0, 7, 8, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 1642496, dp + 1640704, 0, 0, 0, 0, 1, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 1642552, dp + 1640760, 0, 0, 0, 0, 1, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 1655152, dp + 1660296, 0, 15, 0, 15, 16, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 1656968, dp + 1660520, 0, 0, 0, 0, 1, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 1657024, dp + 1660072, 0, 0, 0, 0, 1, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 1657080, dp + 1659960, 0, 0, 0, 0, 1, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 1657136, dp + 1660184, 0, 0, 0, 0, 1, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 1657192, dp + 1660632, 0, 0, 0, 0, 1, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 1657248, dp + 1660408, 0, 0, 0, 0, 1, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 2558688, dp + 2563832, 0, 15, 0, 15, 16, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 2560504, dp + 2564056, 0, 0, 0, 0, 1, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 2560560, dp + 2563608, 0, 0, 0, 0, 1, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 2560616, dp + 2563496, 0, 0, 0, 0, 1, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 2560672, dp + 2563720, 0, 0, 0, 0, 1, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 2560728, dp + 2564168, 0, 0, 0, 0, 1, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 2560784, dp + 2563944, 0, 0, 0, 0, 1, 1);
+
+}
+
+void simulate(char *dp)
+{
+ iki_schedule_processes_at_time_zero(dp, "xsim.dir/audioProc_behav/xsim.reloc");
+ wrapper_func_0(dp);
+
+ iki_execute_processes();
+
+ // Schedule resolution functions for the multiply driven Verilog nets that have strength
+ // Schedule transaction functions for the singly driven Verilog nets that have strength
+
+}
+#include "iki_bridge.h"
+void relocate(char *);
+
+void sensitize(char *);
+
+void simulate(char *);
+
+extern SYSTEMCLIB_IMP_DLLSPEC void local_register_implicit_channel(int, char*);
+extern SYSTEMCLIB_IMP_DLLSPEC int xsim_argc_copy ;
+extern SYSTEMCLIB_IMP_DLLSPEC char** xsim_argv_copy ;
+
+int main(int argc, char **argv)
+{
+ iki_heap_initialize("ms", "isimmm", 0, 2147483648) ;
+ iki_set_xsimdir_location_if_remapped(argc, argv) ;
+ iki_set_sv_type_file_path_name("xsim.dir/audioProc_behav/xsim.svtype");
+ iki_set_crvs_dump_file_path_name("xsim.dir/audioProc_behav/xsim.crvsdump");
+ void* design_handle = iki_create_design("xsim.dir/audioProc_behav/xsim.mem", (void *)relocate, (void *)sensitize, (void *)simulate, (void*)0, 0, isimBridge_getWdbWriter(), 0, argc, argv);
+ iki_set_rc_trial_count(100);
+ (void) design_handle;
+ return iki_simulate_design();
+}
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/obj/xsim_3.lnx64.o b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/obj/xsim_3.lnx64.o
new file mode 100644
index 0000000000000000000000000000000000000000..585e8796c954eb04d1d1afb19bc0674202cacb00
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/obj/xsim_3.lnx64.o differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsim.dbg b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsim.dbg
new file mode 100644
index 0000000000000000000000000000000000000000..9e65f76eec74765a8722f20f31c6c0ced24f08cd
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsim.dbg differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsim.mem b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsim.mem
new file mode 100644
index 0000000000000000000000000000000000000000..8a6b837f3b6186a465f97c95845df50e3694c75a
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsim.mem differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsim.reloc b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsim.reloc
new file mode 100644
index 0000000000000000000000000000000000000000..af15eb23bc7edc6e95a1fa7be709f3f3bc3d5d17
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsim.reloc differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsim.rlx b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsim.rlx
new file mode 100644
index 0000000000000000000000000000000000000000..4e2d9fdbe15d2635f78ff260c73ee2b3cb9b823b
--- /dev/null
+++ b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsim.rlx
@@ -0,0 +1,12 @@
+
+{
+ crc : 12773917742071035718 ,
+ ccp_crc : 0 ,
+ cmdline : " --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot audioProc_behav xil_defaultlib.audioProc xil_defaultlib.glbl" ,
+ buildDate : "May 22 2024" ,
+ buildTime : "18:54:44" ,
+ linkCmd : "/usr/bin/gcc -Wa,-W -O -fPIC -m64 -Wl,--no-as-needed -Wl,--unresolved-symbols=ignore-all -o \"xsim.dir/audioProc_behav/xsimk\" \"xsim.dir/audioProc_behav/obj/xsim_0.lnx64.o\" \"xsim.dir/audioProc_behav/obj/xsim_1.lnx64.o\" \"xsim.dir/audioProc_behav/obj/xsim_2.lnx64.o\" \"xsim.dir/audioProc_behav/obj/xsim_3.lnx64.o\" -L\"/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/lib/lnx64.o\" -lrdi_simulator_kernel -L/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/lib/lnx64.o/../../tps/lnx64/gcc-9.3.0/bin/../lib64 -Wl,--disable-new-dtags -Wl,-rpath=/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/lib/lnx64.o/../../tps/lnx64/gcc-9.3.0/bin/../lib64 -lrdi_simbridge_kernel" ,
+ aggregate_nets :
+ [
+ ]
+}
\ No newline at end of file
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsim.rtti b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsim.rtti
new file mode 100644
index 0000000000000000000000000000000000000000..a9e77947dbb5fba36a6d661a03f32a673d2e5d88
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsim.rtti differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsim.svtype b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsim.svtype
new file mode 100644
index 0000000000000000000000000000000000000000..8240d0639442c8d02b45edeef15a77a5e7555de0
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsim.svtype differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsim.type b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsim.type
new file mode 100644
index 0000000000000000000000000000000000000000..8ad130bffaf19b01c1a8df872a77076a0152d111
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsim.type differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsim.xdbg b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsim.xdbg
new file mode 100644
index 0000000000000000000000000000000000000000..fc73380d97b4261502cadb8b8ba33304ce457fc9
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsim.xdbg differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsimSettings.ini b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsimSettings.ini
new file mode 100644
index 0000000000000000000000000000000000000000..476ecfb8676b567a7a4e34583f7e60f4607d2973
--- /dev/null
+++ b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsimSettings.ini
@@ -0,0 +1,50 @@
+[General]
+ARRAY_DISPLAY_LIMIT=512
+RADIX=hex
+TIME_UNIT=ns
+TRACE_LIMIT=2147483647
+VHDL_ENTITY_SCOPE_FILTER=true
+VHDL_PACKAGE_SCOPE_FILTER=false
+VHDL_BLOCK_SCOPE_FILTER=true
+VHDL_PROCESS_SCOPE_FILTER=false
+VHDL_PROCEDURE_SCOPE_FILTER=false
+VERILOG_MODULE_SCOPE_FILTER=true
+VERILOG_PACKAGE_SCOPE_FILTER=false
+VERILOG_BLOCK_SCOPE_FILTER=false
+VERILOG_TASK_SCOPE_FILTER=false
+VERILOG_PROCESS_SCOPE_FILTER=false
+INPUT_OBJECT_FILTER=true
+OUTPUT_OBJECT_FILTER=true
+INOUT_OBJECT_FILTER=true
+INTERNAL_OBJECT_FILTER=true
+CONSTANT_OBJECT_FILTER=true
+VARIABLE_OBJECT_FILTER=true
+INPUT_PROTOINST_FILTER=true
+OUTPUT_PROTOINST_FILTER=true
+INOUT_PROTOINST_FILTER=true
+INTERNAL_PROTOINST_FILTER=true
+CONSTANT_PROTOINST_FILTER=true
+VARIABLE_PROTOINST_FILTER=true
+SCOPE_NAME_COLUMN_WIDTH=152
+SCOPE_DESIGN_UNIT_COLUMN_WIDTH=121
+SCOPE_BLOCK_TYPE_COLUMN_WIDTH=103
+OBJECT_NAME_COLUMN_WIDTH=123
+OBJECT_VALUE_COLUMN_WIDTH=49
+OBJECT_DATA_TYPE_COLUMN_WIDTH=75
+PROCESS_NAME_COLUMN_WIDTH=75
+PROCESS_TYPE_COLUMN_WIDTH=75
+FRAME_INDEX_COLUMN_WIDTH=75
+FRAME_NAME_COLUMN_WIDTH=75
+FRAME_FILE_NAME_COLUMN_WIDTH=75
+FRAME_LINE_NUM_COLUMN_WIDTH=75
+LOCAL_NAME_COLUMN_WIDTH=75
+LOCAL_VALUE_COLUMN_WIDTH=75
+LOCAL_DATA_TYPE_COLUMN_WIDTH=0
+PROTO_NAME_COLUMN_WIDTH=0
+PROTO_VALUE_COLUMN_WIDTH=0
+INPUT_LOCAL_FILTER=1
+OUTPUT_LOCAL_FILTER=1
+INOUT_LOCAL_FILTER=1
+INTERNAL_LOCAL_FILTER=1
+CONSTANT_LOCAL_FILTER=1
+VARIABLE_LOCAL_FILTER=1
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsimcrash.log b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsimcrash.log
new file mode 100644
index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsimk b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsimk
new file mode 100755
index 0000000000000000000000000000000000000000..5e1ea818382ee7ad275ef129271ff38655f3d6c8
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsimk differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsimkernel.log b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsimkernel.log
new file mode 100644
index 0000000000000000000000000000000000000000..93170642ef9dfe2df5447e59efe463ecfcf70e74
--- /dev/null
+++ b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/audioProc_behav/xsimkernel.log
@@ -0,0 +1,7 @@
+Running: xsim.dir/audioProc_behav/xsimk -simmode gui -wdb audioProc_behav.wdb -simrunnum 0 -socket 44521
+Design successfully loaded
+Design Loading Memory Usage: 24916 KB (Peak: 24924 KB)
+Design Loading CPU Usage: 10 ms
+Simulation completed
+Simulation Memory Usage: 111440 KB (Peak: 164184 KB)
+Simulation CPU Usage: 30 ms
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/Compile_Options.txt b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/Compile_Options.txt
new file mode 100644
index 0000000000000000000000000000000000000000..2965ab3b73825075d89f3fba7755ebff3606c69a
--- /dev/null
+++ b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/Compile_Options.txt
@@ -0,0 +1 @@
+--incr --debug "typical" --relax --mt "8" -L "xil_defaultlib" -L "unisims_ver" -L "unimacro_ver" -L "secureip" -L "xpm" --snapshot "tb_firUnit_behav" "xil_defaultlib.tb_firUnit" "xil_defaultlib.glbl" -log "elaborate.log"
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/TempBreakPointFile.txt b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/TempBreakPointFile.txt
new file mode 100644
index 0000000000000000000000000000000000000000..fdbc612e3497473d6b58c7f0c1432b55416f6136
--- /dev/null
+++ b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/TempBreakPointFile.txt
@@ -0,0 +1 @@
+Breakpoint File Version 1.0
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/obj/xsim_0.lnx64.o b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/obj/xsim_0.lnx64.o
new file mode 100644
index 0000000000000000000000000000000000000000..5ee797baee77bb08bbabc6d1f4508370d065912b
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/obj/xsim_0.lnx64.o differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/obj/xsim_1.c b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/obj/xsim_1.c
new file mode 100644
index 0000000000000000000000000000000000000000..82891810cefac246dd5535788ebac91bf57678ef
--- /dev/null
+++ b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/obj/xsim_1.c
@@ -0,0 +1,714 @@
+/**********************************************************************/
+/* ____ ____ */
+/* / /\/ / */
+/* /___/ \ / */
+/* \ \ \/ */
+/* \ \ Copyright (c) 2003-2020 Xilinx, Inc. */
+/* / / All Right Reserved. */
+/* /---/ /\ */
+/* \ \ / \ */
+/* \___\/\___\ */
+/**********************************************************************/
+
+#if defined(_WIN32)
+ #include "stdio.h"
+ #define IKI_DLLESPEC __declspec(dllimport)
+#else
+ #define IKI_DLLESPEC
+#endif
+#include "iki.h"
+#include <string.h>
+#include <math.h>
+#ifdef __GNUC__
+#include <stdlib.h>
+#else
+#include <malloc.h>
+#define alloca _alloca
+#endif
+/**********************************************************************/
+/* ____ ____ */
+/* / /\/ / */
+/* /___/ \ / */
+/* \ \ \/ */
+/* \ \ Copyright (c) 2003-2020 Xilinx, Inc. */
+/* / / All Right Reserved. */
+/* /---/ /\ */
+/* \ \ / \ */
+/* \___\/\___\ */
+/**********************************************************************/
+
+#if defined(_WIN32)
+ #include "stdio.h"
+ #define IKI_DLLESPEC __declspec(dllimport)
+#else
+ #define IKI_DLLESPEC
+#endif
+#include "iki.h"
+#include <string.h>
+#include <math.h>
+#ifdef __GNUC__
+#include <stdlib.h>
+#else
+#include <malloc.h>
+#define alloca _alloca
+#endif
+typedef void (*funcp)(char *, char *);
+extern int main(int, char**);
+IKI_DLLESPEC extern void execute_2(char*, char *);
+IKI_DLLESPEC extern void execute_3(char*, char *);
+IKI_DLLESPEC extern void execute_4(char*, char *);
+IKI_DLLESPEC extern void execute_5(char*, char *);
+IKI_DLLESPEC extern void execute_6(char*, char *);
+IKI_DLLESPEC extern void execute_7(char*, char *);
+IKI_DLLESPEC extern void execute_8(char*, char *);
+IKI_DLLESPEC extern void execute_9(char*, char *);
+IKI_DLLESPEC extern void execute_10(char*, char *);
+IKI_DLLESPEC extern void execute_11(char*, char *);
+IKI_DLLESPEC extern void execute_21(char*, char *);
+IKI_DLLESPEC extern void execute_22(char*, char *);
+IKI_DLLESPEC extern void execute_23(char*, char *);
+IKI_DLLESPEC extern void execute_24(char*, char *);
+IKI_DLLESPEC extern void execute_27(char*, char *);
+IKI_DLLESPEC extern void execute_28(char*, char *);
+IKI_DLLESPEC extern void execute_29(char*, char *);
+IKI_DLLESPEC extern void execute_30(char*, char *);
+IKI_DLLESPEC extern void execute_31(char*, char *);
+IKI_DLLESPEC extern void execute_32(char*, char *);
+IKI_DLLESPEC extern void execute_33(char*, char *);
+IKI_DLLESPEC extern void execute_34(char*, char *);
+IKI_DLLESPEC extern void execute_35(char*, char *);
+IKI_DLLESPEC extern void execute_3821(char*, char *);
+IKI_DLLESPEC extern void execute_3822(char*, char *);
+IKI_DLLESPEC extern void vlog_const_rhs_process_execute_0_fast_no_reg_no_agg(char*, char*, char*);
+IKI_DLLESPEC extern void execute_1958(char*, char *);
+IKI_DLLESPEC extern void execute_41(char*, char *);
+IKI_DLLESPEC extern void execute_1959(char*, char *);
+IKI_DLLESPEC extern void execute_89(char*, char *);
+IKI_DLLESPEC extern void execute_1983(char*, char *);
+IKI_DLLESPEC extern void execute_1984(char*, char *);
+IKI_DLLESPEC extern void execute_1985(char*, char *);
+IKI_DLLESPEC extern void execute_124(char*, char *);
+IKI_DLLESPEC extern void execute_2035(char*, char *);
+IKI_DLLESPEC extern void execute_2036(char*, char *);
+IKI_DLLESPEC extern void execute_2037(char*, char *);
+IKI_DLLESPEC extern void execute_2038(char*, char *);
+IKI_DLLESPEC extern void execute_2039(char*, char *);
+IKI_DLLESPEC extern void execute_2040(char*, char *);
+IKI_DLLESPEC extern void execute_2041(char*, char *);
+IKI_DLLESPEC extern void execute_2042(char*, char *);
+IKI_DLLESPEC extern void execute_2034(char*, char *);
+IKI_DLLESPEC extern void execute_126(char*, char *);
+IKI_DLLESPEC extern void execute_127(char*, char *);
+IKI_DLLESPEC extern void execute_128(char*, char *);
+IKI_DLLESPEC extern void execute_129(char*, char *);
+IKI_DLLESPEC extern void execute_130(char*, char *);
+IKI_DLLESPEC extern void execute_131(char*, char *);
+IKI_DLLESPEC extern void execute_132(char*, char *);
+IKI_DLLESPEC extern void execute_133(char*, char *);
+IKI_DLLESPEC extern void execute_134(char*, char *);
+IKI_DLLESPEC extern void execute_135(char*, char *);
+IKI_DLLESPEC extern void execute_136(char*, char *);
+IKI_DLLESPEC extern void execute_137(char*, char *);
+IKI_DLLESPEC extern void execute_138(char*, char *);
+IKI_DLLESPEC extern void execute_139(char*, char *);
+IKI_DLLESPEC extern void execute_140(char*, char *);
+IKI_DLLESPEC extern void execute_141(char*, char *);
+IKI_DLLESPEC extern void execute_142(char*, char *);
+IKI_DLLESPEC extern void execute_143(char*, char *);
+IKI_DLLESPEC extern void execute_144(char*, char *);
+IKI_DLLESPEC extern void execute_145(char*, char *);
+IKI_DLLESPEC extern void execute_146(char*, char *);
+IKI_DLLESPEC extern void execute_147(char*, char *);
+IKI_DLLESPEC extern void execute_148(char*, char *);
+IKI_DLLESPEC extern void execute_149(char*, char *);
+IKI_DLLESPEC extern void execute_150(char*, char *);
+IKI_DLLESPEC extern void execute_151(char*, char *);
+IKI_DLLESPEC extern void execute_152(char*, char *);
+IKI_DLLESPEC extern void execute_153(char*, char *);
+IKI_DLLESPEC extern void execute_156(char*, char *);
+IKI_DLLESPEC extern void execute_157(char*, char *);
+IKI_DLLESPEC extern void execute_158(char*, char *);
+IKI_DLLESPEC extern void execute_159(char*, char *);
+IKI_DLLESPEC extern void execute_160(char*, char *);
+IKI_DLLESPEC extern void execute_161(char*, char *);
+IKI_DLLESPEC extern void execute_162(char*, char *);
+IKI_DLLESPEC extern void execute_163(char*, char *);
+IKI_DLLESPEC extern void execute_164(char*, char *);
+IKI_DLLESPEC extern void execute_165(char*, char *);
+IKI_DLLESPEC extern void execute_166(char*, char *);
+IKI_DLLESPEC extern void execute_167(char*, char *);
+IKI_DLLESPEC extern void execute_168(char*, char *);
+IKI_DLLESPEC extern void execute_169(char*, char *);
+IKI_DLLESPEC extern void execute_170(char*, char *);
+IKI_DLLESPEC extern void execute_171(char*, char *);
+IKI_DLLESPEC extern void execute_2043(char*, char *);
+IKI_DLLESPEC extern void execute_2044(char*, char *);
+IKI_DLLESPEC extern void execute_2045(char*, char *);
+IKI_DLLESPEC extern void execute_2046(char*, char *);
+IKI_DLLESPEC extern void execute_2047(char*, char *);
+IKI_DLLESPEC extern void execute_2048(char*, char *);
+IKI_DLLESPEC extern void execute_2049(char*, char *);
+IKI_DLLESPEC extern void execute_2050(char*, char *);
+IKI_DLLESPEC extern void execute_2051(char*, char *);
+IKI_DLLESPEC extern void execute_2052(char*, char *);
+IKI_DLLESPEC extern void execute_2053(char*, char *);
+IKI_DLLESPEC extern void execute_2054(char*, char *);
+IKI_DLLESPEC extern void execute_2055(char*, char *);
+IKI_DLLESPEC extern void execute_2056(char*, char *);
+IKI_DLLESPEC extern void execute_2057(char*, char *);
+IKI_DLLESPEC extern void vlog_simple_process_execute_0_fast_no_reg_no_agg(char*, char*, char*);
+IKI_DLLESPEC extern void vlog_simple_process_execute_1_fast_no_reg_no_agg(char*, char*, char*);
+IKI_DLLESPEC extern void execute_2098(char*, char *);
+IKI_DLLESPEC extern void execute_2103(char*, char *);
+IKI_DLLESPEC extern void execute_2118(char*, char *);
+IKI_DLLESPEC extern void execute_2120(char*, char *);
+IKI_DLLESPEC extern void execute_2122(char*, char *);
+IKI_DLLESPEC extern void execute_2134(char*, char *);
+IKI_DLLESPEC extern void execute_2135(char*, char *);
+IKI_DLLESPEC extern void execute_2136(char*, char *);
+IKI_DLLESPEC extern void execute_2138(char*, char *);
+IKI_DLLESPEC extern void execute_2139(char*, char *);
+IKI_DLLESPEC extern void execute_2140(char*, char *);
+IKI_DLLESPEC extern void execute_2141(char*, char *);
+IKI_DLLESPEC extern void execute_2142(char*, char *);
+IKI_DLLESPEC extern void execute_2143(char*, char *);
+IKI_DLLESPEC extern void execute_2144(char*, char *);
+IKI_DLLESPEC extern void execute_2145(char*, char *);
+IKI_DLLESPEC extern void execute_2147(char*, char *);
+IKI_DLLESPEC extern void execute_2148(char*, char *);
+IKI_DLLESPEC extern void execute_2149(char*, char *);
+IKI_DLLESPEC extern void execute_2150(char*, char *);
+IKI_DLLESPEC extern void execute_2151(char*, char *);
+IKI_DLLESPEC extern void execute_2152(char*, char *);
+IKI_DLLESPEC extern void execute_2153(char*, char *);
+IKI_DLLESPEC extern void execute_2154(char*, char *);
+IKI_DLLESPEC extern void execute_2155(char*, char *);
+IKI_DLLESPEC extern void execute_2156(char*, char *);
+IKI_DLLESPEC extern void execute_2157(char*, char *);
+IKI_DLLESPEC extern void execute_2162(char*, char *);
+IKI_DLLESPEC extern void execute_2163(char*, char *);
+IKI_DLLESPEC extern void execute_2164(char*, char *);
+IKI_DLLESPEC extern void execute_2165(char*, char *);
+IKI_DLLESPEC extern void execute_2166(char*, char *);
+IKI_DLLESPEC extern void execute_2167(char*, char *);
+IKI_DLLESPEC extern void execute_2168(char*, char *);
+IKI_DLLESPEC extern void execute_2169(char*, char *);
+IKI_DLLESPEC extern void execute_2170(char*, char *);
+IKI_DLLESPEC extern void execute_2171(char*, char *);
+IKI_DLLESPEC extern void execute_2172(char*, char *);
+IKI_DLLESPEC extern void execute_2173(char*, char *);
+IKI_DLLESPEC extern void execute_2174(char*, char *);
+IKI_DLLESPEC extern void execute_2175(char*, char *);
+IKI_DLLESPEC extern void execute_2176(char*, char *);
+IKI_DLLESPEC extern void execute_2177(char*, char *);
+IKI_DLLESPEC extern void execute_2178(char*, char *);
+IKI_DLLESPEC extern void execute_2179(char*, char *);
+IKI_DLLESPEC extern void execute_2180(char*, char *);
+IKI_DLLESPEC extern void execute_2181(char*, char *);
+IKI_DLLESPEC extern void execute_2182(char*, char *);
+IKI_DLLESPEC extern void execute_2183(char*, char *);
+IKI_DLLESPEC extern void execute_2184(char*, char *);
+IKI_DLLESPEC extern void execute_174(char*, char *);
+IKI_DLLESPEC extern void execute_2186(char*, char *);
+IKI_DLLESPEC extern void execute_2187(char*, char *);
+IKI_DLLESPEC extern void execute_2188(char*, char *);
+IKI_DLLESPEC extern void execute_2189(char*, char *);
+IKI_DLLESPEC extern void execute_2185(char*, char *);
+IKI_DLLESPEC extern void execute_177(char*, char *);
+IKI_DLLESPEC extern void execute_178(char*, char *);
+IKI_DLLESPEC extern void execute_181(char*, char *);
+IKI_DLLESPEC extern void execute_182(char*, char *);
+IKI_DLLESPEC extern void execute_288(char*, char *);
+IKI_DLLESPEC extern void execute_324(char*, char *);
+IKI_DLLESPEC extern void execute_573(char*, char *);
+IKI_DLLESPEC extern void execute_574(char*, char *);
+IKI_DLLESPEC extern void execute_575(char*, char *);
+IKI_DLLESPEC extern void execute_2330(char*, char *);
+IKI_DLLESPEC extern void execute_2331(char*, char *);
+IKI_DLLESPEC extern void execute_2332(char*, char *);
+IKI_DLLESPEC extern void execute_2333(char*, char *);
+IKI_DLLESPEC extern void execute_2342(char*, char *);
+IKI_DLLESPEC extern void execute_2343(char*, char *);
+IKI_DLLESPEC extern void execute_2344(char*, char *);
+IKI_DLLESPEC extern void execute_2347(char*, char *);
+IKI_DLLESPEC extern void execute_2348(char*, char *);
+IKI_DLLESPEC extern void execute_2349(char*, char *);
+IKI_DLLESPEC extern void execute_2350(char*, char *);
+IKI_DLLESPEC extern void execute_656(char*, char *);
+IKI_DLLESPEC extern void execute_657(char*, char *);
+IKI_DLLESPEC extern void vlog_transfunc_eventcallback(char*, char*, unsigned, unsigned, unsigned, char *);
+IKI_DLLESPEC extern void transaction_34(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_35(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_36(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_38(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void vhdl_transfunc_eventcallback(char*, char*, unsigned, unsigned, unsigned, char *);
+IKI_DLLESPEC extern void transaction_40(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_41(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_42(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_43(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_44(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_45(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_46(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_49(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_50(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_51(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_52(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_53(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_54(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_55(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_56(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_57(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_58(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_59(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_60(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_61(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_62(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_73(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_183(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_192(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_193(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_194(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_195(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_196(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_197(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_201(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_202(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_203(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_204(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_205(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_206(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_207(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_208(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_215(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_232(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_237(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_265(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_266(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_267(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_268(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_269(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_270(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_271(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_272(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_273(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_274(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_275(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_276(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_277(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_278(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_279(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_280(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_281(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_282(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_283(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_284(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_285(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_294(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_295(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_298(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_302(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_303(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_306(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_309(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_311(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_313(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_315(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_320(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_323(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_329(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_334(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_350(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_357(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_358(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_359(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_360(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_366(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_994(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1000(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1006(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1020(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1026(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1032(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1038(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1051(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1057(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1063(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1078(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1084(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1090(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1096(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1110(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1116(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1159(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1165(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1171(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1177(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1183(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1189(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1195(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1201(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1207(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1213(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1219(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1225(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1231(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1237(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1243(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1249(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1255(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1261(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1267(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1273(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1279(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1285(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1291(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1297(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1303(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1309(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1315(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1321(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1327(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1333(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1339(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1345(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1351(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1357(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1363(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1369(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1375(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1381(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1387(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1393(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1399(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1405(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1411(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1417(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1423(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1429(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1435(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1441(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1447(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1453(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1459(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1465(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1471(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1477(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1483(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1489(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1495(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1501(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1507(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1513(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1519(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1525(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1531(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1537(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1543(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1549(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1555(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1561(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1567(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1573(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1579(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1585(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1591(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1597(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1603(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1609(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1615(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1621(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1627(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1633(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1639(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1645(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1651(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1657(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1663(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1669(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1675(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1681(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1687(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1693(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1699(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1705(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1711(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1717(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1723(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1729(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1735(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1741(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1747(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1753(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1759(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1765(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1771(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1777(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1783(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1789(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1795(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1801(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1807(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1813(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1819(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1825(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1831(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1837(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1843(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1849(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1855(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1861(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1867(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1873(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1879(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1885(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1891(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1897(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1903(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1909(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1915(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1921(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1927(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1933(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1939(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1945(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1951(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1957(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1963(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1969(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1975(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1981(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1987(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1993(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_1999(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2005(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2011(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2017(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2023(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2029(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2035(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2041(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2047(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2053(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2059(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2065(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2071(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2077(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2083(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2089(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2095(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2101(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2107(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2113(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2119(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2125(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2131(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2137(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2143(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2149(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2155(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2161(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2167(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2173(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2179(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2185(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2191(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2197(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2203(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2209(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2215(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2221(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2227(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2233(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2239(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2245(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2251(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2257(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2263(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2269(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2275(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2281(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2287(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2293(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2299(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2305(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2311(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2317(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2323(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2329(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2335(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2341(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2347(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2353(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2359(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2365(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2371(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2377(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2383(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2389(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2395(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2401(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2407(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2413(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2419(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2425(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2431(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2437(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2443(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2449(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2455(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2461(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2467(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2473(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2479(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2485(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2491(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2497(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2503(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2509(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2515(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2521(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2527(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2533(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2539(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2545(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2551(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2557(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2563(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2569(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2575(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2581(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2587(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2593(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2599(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2605(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2611(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2617(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2623(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2629(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2635(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2641(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2647(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2653(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2659(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2665(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2671(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2677(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2683(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2689(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2695(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2701(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2707(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2713(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2941(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2947(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2953(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2959(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2965(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2971(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2977(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2983(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2989(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_2995(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3001(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3007(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3013(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3019(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3025(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3031(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3037(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3043(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3049(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3055(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3061(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3067(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3073(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3079(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3085(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3091(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3097(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3103(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3109(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3115(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3121(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3127(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3133(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3139(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3145(char*, char*, unsigned, unsigned, unsigned);
+IKI_DLLESPEC extern void transaction_3151(char*, char*, unsigned, unsigned, unsigned);
+funcp funcTab[581] = {(funcp)execute_2, (funcp)execute_3, (funcp)execute_4, (funcp)execute_5, (funcp)execute_6, (funcp)execute_7, (funcp)execute_8, (funcp)execute_9, (funcp)execute_10, (funcp)execute_11, (funcp)execute_21, (funcp)execute_22, (funcp)execute_23, (funcp)execute_24, (funcp)execute_27, (funcp)execute_28, (funcp)execute_29, (funcp)execute_30, (funcp)execute_31, (funcp)execute_32, (funcp)execute_33, (funcp)execute_34, (funcp)execute_35, (funcp)execute_3821, (funcp)execute_3822, (funcp)vlog_const_rhs_process_execute_0_fast_no_reg_no_agg, (funcp)execute_1958, (funcp)execute_41, (funcp)execute_1959, (funcp)execute_89, (funcp)execute_1983, (funcp)execute_1984, (funcp)execute_1985, (funcp)execute_124, (funcp)execute_2035, (funcp)execute_2036, (funcp)execute_2037, (funcp)execute_2038, (funcp)execute_2039, (funcp)execute_2040, (funcp)execute_2041, (funcp)execute_2042, (funcp)execute_2034, (funcp)execute_126, (funcp)execute_127, (funcp)execute_128, (funcp)execute_129, (funcp)execute_130, (funcp)execute_131, (funcp)execute_132, (funcp)execute_133, (funcp)execute_134, (funcp)execute_135, (funcp)execute_136, (funcp)execute_137, (funcp)execute_138, (funcp)execute_139, (funcp)execute_140, (funcp)execute_141, (funcp)execute_142, (funcp)execute_143, (funcp)execute_144, (funcp)execute_145, (funcp)execute_146, (funcp)execute_147, (funcp)execute_148, (funcp)execute_149, (funcp)execute_150, (funcp)execute_151, (funcp)execute_152, (funcp)execute_153, (funcp)execute_156, (funcp)execute_157, (funcp)execute_158, (funcp)execute_159, (funcp)execute_160, (funcp)execute_161, (funcp)execute_162, (funcp)execute_163, (funcp)execute_164, (funcp)execute_165, (funcp)execute_166, (funcp)execute_167, (funcp)execute_168, (funcp)execute_169, (funcp)execute_170, (funcp)execute_171, (funcp)execute_2043, (funcp)execute_2044, (funcp)execute_2045, (funcp)execute_2046, (funcp)execute_2047, (funcp)execute_2048, (funcp)execute_2049, (funcp)execute_2050, (funcp)execute_2051, (funcp)execute_2052, (funcp)execute_2053, (funcp)execute_2054, (funcp)execute_2055, (funcp)execute_2056, (funcp)execute_2057, (funcp)vlog_simple_process_execute_0_fast_no_reg_no_agg, (funcp)vlog_simple_process_execute_1_fast_no_reg_no_agg, (funcp)execute_2098, (funcp)execute_2103, (funcp)execute_2118, (funcp)execute_2120, (funcp)execute_2122, (funcp)execute_2134, (funcp)execute_2135, (funcp)execute_2136, (funcp)execute_2138, (funcp)execute_2139, (funcp)execute_2140, (funcp)execute_2141, (funcp)execute_2142, (funcp)execute_2143, (funcp)execute_2144, (funcp)execute_2145, (funcp)execute_2147, (funcp)execute_2148, (funcp)execute_2149, (funcp)execute_2150, (funcp)execute_2151, (funcp)execute_2152, (funcp)execute_2153, (funcp)execute_2154, (funcp)execute_2155, (funcp)execute_2156, (funcp)execute_2157, (funcp)execute_2162, (funcp)execute_2163, (funcp)execute_2164, (funcp)execute_2165, (funcp)execute_2166, (funcp)execute_2167, (funcp)execute_2168, (funcp)execute_2169, (funcp)execute_2170, (funcp)execute_2171, (funcp)execute_2172, (funcp)execute_2173, (funcp)execute_2174, (funcp)execute_2175, (funcp)execute_2176, (funcp)execute_2177, (funcp)execute_2178, (funcp)execute_2179, (funcp)execute_2180, (funcp)execute_2181, (funcp)execute_2182, (funcp)execute_2183, (funcp)execute_2184, (funcp)execute_174, (funcp)execute_2186, (funcp)execute_2187, (funcp)execute_2188, (funcp)execute_2189, (funcp)execute_2185, (funcp)execute_177, (funcp)execute_178, (funcp)execute_181, (funcp)execute_182, (funcp)execute_288, (funcp)execute_324, (funcp)execute_573, (funcp)execute_574, (funcp)execute_575, (funcp)execute_2330, (funcp)execute_2331, (funcp)execute_2332, (funcp)execute_2333, (funcp)execute_2342, (funcp)execute_2343, (funcp)execute_2344, (funcp)execute_2347, (funcp)execute_2348, (funcp)execute_2349, (funcp)execute_2350, (funcp)execute_656, (funcp)execute_657, (funcp)vlog_transfunc_eventcallback, (funcp)transaction_34, (funcp)transaction_35, (funcp)transaction_36, (funcp)transaction_38, (funcp)vhdl_transfunc_eventcallback, (funcp)transaction_40, (funcp)transaction_41, (funcp)transaction_42, (funcp)transaction_43, (funcp)transaction_44, (funcp)transaction_45, (funcp)transaction_46, (funcp)transaction_49, (funcp)transaction_50, (funcp)transaction_51, (funcp)transaction_52, (funcp)transaction_53, (funcp)transaction_54, (funcp)transaction_55, (funcp)transaction_56, (funcp)transaction_57, (funcp)transaction_58, (funcp)transaction_59, (funcp)transaction_60, (funcp)transaction_61, (funcp)transaction_62, (funcp)transaction_73, (funcp)transaction_183, (funcp)transaction_192, (funcp)transaction_193, (funcp)transaction_194, (funcp)transaction_195, (funcp)transaction_196, (funcp)transaction_197, (funcp)transaction_201, (funcp)transaction_202, (funcp)transaction_203, (funcp)transaction_204, (funcp)transaction_205, (funcp)transaction_206, (funcp)transaction_207, (funcp)transaction_208, (funcp)transaction_215, (funcp)transaction_232, (funcp)transaction_237, (funcp)transaction_265, (funcp)transaction_266, (funcp)transaction_267, (funcp)transaction_268, (funcp)transaction_269, (funcp)transaction_270, (funcp)transaction_271, (funcp)transaction_272, (funcp)transaction_273, (funcp)transaction_274, (funcp)transaction_275, (funcp)transaction_276, (funcp)transaction_277, (funcp)transaction_278, (funcp)transaction_279, (funcp)transaction_280, (funcp)transaction_281, (funcp)transaction_282, (funcp)transaction_283, (funcp)transaction_284, (funcp)transaction_285, (funcp)transaction_294, (funcp)transaction_295, (funcp)transaction_298, (funcp)transaction_302, (funcp)transaction_303, (funcp)transaction_306, (funcp)transaction_309, (funcp)transaction_311, (funcp)transaction_313, (funcp)transaction_315, (funcp)transaction_320, (funcp)transaction_323, (funcp)transaction_329, (funcp)transaction_334, (funcp)transaction_350, (funcp)transaction_357, (funcp)transaction_358, (funcp)transaction_359, (funcp)transaction_360, (funcp)transaction_366, (funcp)transaction_994, (funcp)transaction_1000, (funcp)transaction_1006, (funcp)transaction_1020, (funcp)transaction_1026, (funcp)transaction_1032, (funcp)transaction_1038, (funcp)transaction_1051, (funcp)transaction_1057, (funcp)transaction_1063, (funcp)transaction_1078, (funcp)transaction_1084, (funcp)transaction_1090, (funcp)transaction_1096, (funcp)transaction_1110, (funcp)transaction_1116, (funcp)transaction_1159, (funcp)transaction_1165, (funcp)transaction_1171, (funcp)transaction_1177, (funcp)transaction_1183, (funcp)transaction_1189, (funcp)transaction_1195, (funcp)transaction_1201, (funcp)transaction_1207, (funcp)transaction_1213, (funcp)transaction_1219, (funcp)transaction_1225, (funcp)transaction_1231, (funcp)transaction_1237, (funcp)transaction_1243, (funcp)transaction_1249, (funcp)transaction_1255, (funcp)transaction_1261, (funcp)transaction_1267, (funcp)transaction_1273, (funcp)transaction_1279, (funcp)transaction_1285, (funcp)transaction_1291, (funcp)transaction_1297, (funcp)transaction_1303, (funcp)transaction_1309, (funcp)transaction_1315, (funcp)transaction_1321, (funcp)transaction_1327, (funcp)transaction_1333, (funcp)transaction_1339, (funcp)transaction_1345, (funcp)transaction_1351, (funcp)transaction_1357, (funcp)transaction_1363, (funcp)transaction_1369, (funcp)transaction_1375, (funcp)transaction_1381, (funcp)transaction_1387, (funcp)transaction_1393, (funcp)transaction_1399, (funcp)transaction_1405, (funcp)transaction_1411, (funcp)transaction_1417, (funcp)transaction_1423, (funcp)transaction_1429, (funcp)transaction_1435, (funcp)transaction_1441, (funcp)transaction_1447, (funcp)transaction_1453, (funcp)transaction_1459, (funcp)transaction_1465, (funcp)transaction_1471, (funcp)transaction_1477, (funcp)transaction_1483, (funcp)transaction_1489, (funcp)transaction_1495, (funcp)transaction_1501, (funcp)transaction_1507, (funcp)transaction_1513, (funcp)transaction_1519, (funcp)transaction_1525, (funcp)transaction_1531, (funcp)transaction_1537, (funcp)transaction_1543, (funcp)transaction_1549, (funcp)transaction_1555, (funcp)transaction_1561, (funcp)transaction_1567, (funcp)transaction_1573, (funcp)transaction_1579, (funcp)transaction_1585, (funcp)transaction_1591, (funcp)transaction_1597, (funcp)transaction_1603, (funcp)transaction_1609, (funcp)transaction_1615, (funcp)transaction_1621, (funcp)transaction_1627, (funcp)transaction_1633, (funcp)transaction_1639, (funcp)transaction_1645, (funcp)transaction_1651, (funcp)transaction_1657, (funcp)transaction_1663, (funcp)transaction_1669, (funcp)transaction_1675, (funcp)transaction_1681, (funcp)transaction_1687, (funcp)transaction_1693, (funcp)transaction_1699, (funcp)transaction_1705, (funcp)transaction_1711, (funcp)transaction_1717, (funcp)transaction_1723, (funcp)transaction_1729, (funcp)transaction_1735, (funcp)transaction_1741, (funcp)transaction_1747, (funcp)transaction_1753, (funcp)transaction_1759, (funcp)transaction_1765, (funcp)transaction_1771, (funcp)transaction_1777, (funcp)transaction_1783, (funcp)transaction_1789, (funcp)transaction_1795, (funcp)transaction_1801, (funcp)transaction_1807, (funcp)transaction_1813, (funcp)transaction_1819, (funcp)transaction_1825, (funcp)transaction_1831, (funcp)transaction_1837, (funcp)transaction_1843, (funcp)transaction_1849, (funcp)transaction_1855, (funcp)transaction_1861, (funcp)transaction_1867, (funcp)transaction_1873, (funcp)transaction_1879, (funcp)transaction_1885, (funcp)transaction_1891, (funcp)transaction_1897, (funcp)transaction_1903, (funcp)transaction_1909, (funcp)transaction_1915, (funcp)transaction_1921, (funcp)transaction_1927, (funcp)transaction_1933, (funcp)transaction_1939, (funcp)transaction_1945, (funcp)transaction_1951, (funcp)transaction_1957, (funcp)transaction_1963, (funcp)transaction_1969, (funcp)transaction_1975, (funcp)transaction_1981, (funcp)transaction_1987, (funcp)transaction_1993, (funcp)transaction_1999, (funcp)transaction_2005, (funcp)transaction_2011, (funcp)transaction_2017, (funcp)transaction_2023, (funcp)transaction_2029, (funcp)transaction_2035, (funcp)transaction_2041, (funcp)transaction_2047, (funcp)transaction_2053, (funcp)transaction_2059, (funcp)transaction_2065, (funcp)transaction_2071, (funcp)transaction_2077, (funcp)transaction_2083, (funcp)transaction_2089, (funcp)transaction_2095, (funcp)transaction_2101, (funcp)transaction_2107, (funcp)transaction_2113, (funcp)transaction_2119, (funcp)transaction_2125, (funcp)transaction_2131, (funcp)transaction_2137, (funcp)transaction_2143, (funcp)transaction_2149, (funcp)transaction_2155, (funcp)transaction_2161, (funcp)transaction_2167, (funcp)transaction_2173, (funcp)transaction_2179, (funcp)transaction_2185, (funcp)transaction_2191, (funcp)transaction_2197, (funcp)transaction_2203, (funcp)transaction_2209, (funcp)transaction_2215, (funcp)transaction_2221, (funcp)transaction_2227, (funcp)transaction_2233, (funcp)transaction_2239, (funcp)transaction_2245, (funcp)transaction_2251, (funcp)transaction_2257, (funcp)transaction_2263, (funcp)transaction_2269, (funcp)transaction_2275, (funcp)transaction_2281, (funcp)transaction_2287, (funcp)transaction_2293, (funcp)transaction_2299, (funcp)transaction_2305, (funcp)transaction_2311, (funcp)transaction_2317, (funcp)transaction_2323, (funcp)transaction_2329, (funcp)transaction_2335, (funcp)transaction_2341, (funcp)transaction_2347, (funcp)transaction_2353, (funcp)transaction_2359, (funcp)transaction_2365, (funcp)transaction_2371, (funcp)transaction_2377, (funcp)transaction_2383, (funcp)transaction_2389, (funcp)transaction_2395, (funcp)transaction_2401, (funcp)transaction_2407, (funcp)transaction_2413, (funcp)transaction_2419, (funcp)transaction_2425, (funcp)transaction_2431, (funcp)transaction_2437, (funcp)transaction_2443, (funcp)transaction_2449, (funcp)transaction_2455, (funcp)transaction_2461, (funcp)transaction_2467, (funcp)transaction_2473, (funcp)transaction_2479, (funcp)transaction_2485, (funcp)transaction_2491, (funcp)transaction_2497, (funcp)transaction_2503, (funcp)transaction_2509, (funcp)transaction_2515, (funcp)transaction_2521, (funcp)transaction_2527, (funcp)transaction_2533, (funcp)transaction_2539, (funcp)transaction_2545, (funcp)transaction_2551, (funcp)transaction_2557, (funcp)transaction_2563, (funcp)transaction_2569, (funcp)transaction_2575, (funcp)transaction_2581, (funcp)transaction_2587, (funcp)transaction_2593, (funcp)transaction_2599, (funcp)transaction_2605, (funcp)transaction_2611, (funcp)transaction_2617, (funcp)transaction_2623, (funcp)transaction_2629, (funcp)transaction_2635, (funcp)transaction_2641, (funcp)transaction_2647, (funcp)transaction_2653, (funcp)transaction_2659, (funcp)transaction_2665, (funcp)transaction_2671, (funcp)transaction_2677, (funcp)transaction_2683, (funcp)transaction_2689, (funcp)transaction_2695, (funcp)transaction_2701, (funcp)transaction_2707, (funcp)transaction_2713, (funcp)transaction_2941, (funcp)transaction_2947, (funcp)transaction_2953, (funcp)transaction_2959, (funcp)transaction_2965, (funcp)transaction_2971, (funcp)transaction_2977, (funcp)transaction_2983, (funcp)transaction_2989, (funcp)transaction_2995, (funcp)transaction_3001, (funcp)transaction_3007, (funcp)transaction_3013, (funcp)transaction_3019, (funcp)transaction_3025, (funcp)transaction_3031, (funcp)transaction_3037, (funcp)transaction_3043, (funcp)transaction_3049, (funcp)transaction_3055, (funcp)transaction_3061, (funcp)transaction_3067, (funcp)transaction_3073, (funcp)transaction_3079, (funcp)transaction_3085, (funcp)transaction_3091, (funcp)transaction_3097, (funcp)transaction_3103, (funcp)transaction_3109, (funcp)transaction_3115, (funcp)transaction_3121, (funcp)transaction_3127, (funcp)transaction_3133, (funcp)transaction_3139, (funcp)transaction_3145, (funcp)transaction_3151};
+const int NumRelocateId= 581;
+
+void relocate(char *dp)
+{
+ iki_relocate(dp, "xsim.dir/tb_firUnit_behav/xsim.reloc", (void **)funcTab, 581);
+ iki_vhdl_file_variable_register(dp + 701048);
+ iki_vhdl_file_variable_register(dp + 701104);
+
+
+ /*Populate the transaction function pointer field in the whole net structure */
+}
+
+void sensitize(char *dp)
+{
+ iki_sensitize(dp, "xsim.dir/tb_firUnit_behav/xsim.reloc");
+}
+
+ // Initialize Verilog nets in mixed simulation, for the cases when the value at time 0 should be propagated from the mixed language Vhdl net
+
+void wrapper_func_0(char *dp)
+
+{
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 706376, dp + 710584, 0, 0, 0, 0, 1, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 706432, dp + 711536, 0, 0, 0, 0, 1, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 706488, dp + 711088, 0, 15, 0, 15, 16, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 707760, dp + 711312, 0, 0, 0, 0, 1, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 707816, dp + 710864, 0, 0, 0, 0, 1, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 707872, dp + 710752, 0, 0, 0, 0, 1, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 707928, dp + 710976, 0, 0, 0, 0, 1, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 707984, dp + 711424, 0, 0, 0, 0, 1, 1);
+
+ iki_vlog_schedule_transaction_signal_fast_vhdl_value_time_0(dp + 708040, dp + 711200, 0, 0, 0, 0, 1, 1);
+
+}
+
+void simulate(char *dp)
+{
+ iki_schedule_processes_at_time_zero(dp, "xsim.dir/tb_firUnit_behav/xsim.reloc");
+ wrapper_func_0(dp);
+
+ iki_execute_processes();
+
+ // Schedule resolution functions for the multiply driven Verilog nets that have strength
+ // Schedule transaction functions for the singly driven Verilog nets that have strength
+
+}
+#include "iki_bridge.h"
+void relocate(char *);
+
+void sensitize(char *);
+
+void simulate(char *);
+
+extern SYSTEMCLIB_IMP_DLLSPEC void local_register_implicit_channel(int, char*);
+extern SYSTEMCLIB_IMP_DLLSPEC int xsim_argc_copy ;
+extern SYSTEMCLIB_IMP_DLLSPEC char** xsim_argv_copy ;
+
+int main(int argc, char **argv)
+{
+ iki_heap_initialize("ms", "isimmm", 0, 2147483648) ;
+ iki_set_xsimdir_location_if_remapped(argc, argv) ;
+ iki_set_sv_type_file_path_name("xsim.dir/tb_firUnit_behav/xsim.svtype");
+ iki_set_crvs_dump_file_path_name("xsim.dir/tb_firUnit_behav/xsim.crvsdump");
+ void* design_handle = iki_create_design("xsim.dir/tb_firUnit_behav/xsim.mem", (void *)relocate, (void *)sensitize, (void *)simulate, (void*)0, 0, isimBridge_getWdbWriter(), 0, argc, argv);
+ iki_set_rc_trial_count(100);
+ (void) design_handle;
+ return iki_simulate_design();
+}
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/obj/xsim_1.lnx64.o b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/obj/xsim_1.lnx64.o
new file mode 100644
index 0000000000000000000000000000000000000000..a9f97708d37957c5b7332b318e1a8328f23eb48b
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/obj/xsim_1.lnx64.o differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsim.dbg b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsim.dbg
new file mode 100644
index 0000000000000000000000000000000000000000..297b9e992f1375e4e2d92ad2b3dd04198712feae
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsim.dbg differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsim.mem b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsim.mem
new file mode 100644
index 0000000000000000000000000000000000000000..27ce65fd36b319fa07e3dac72478c40d7c93cc55
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsim.mem differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsim.reloc b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsim.reloc
new file mode 100644
index 0000000000000000000000000000000000000000..fc47b423b3ee70d11db834f8c2a490b5d1c6d05a
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsim.reloc differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsim.rlx b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsim.rlx
new file mode 100644
index 0000000000000000000000000000000000000000..dc8949b784aba23d96670f3f04d0f0cef4bc8326
--- /dev/null
+++ b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsim.rlx
@@ -0,0 +1,12 @@
+
+{
+ crc : 1683845849965284633 ,
+ ccp_crc : 0 ,
+ cmdline : " --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl" ,
+ buildDate : "May 22 2024" ,
+ buildTime : "18:54:44" ,
+ linkCmd : "/usr/bin/gcc -Wa,-W -O -fPIC -m64 -Wl,--no-as-needed -Wl,--unresolved-symbols=ignore-all -o \"xsim.dir/tb_firUnit_behav/xsimk\" \"xsim.dir/tb_firUnit_behav/obj/xsim_0.lnx64.o\" \"xsim.dir/tb_firUnit_behav/obj/xsim_1.lnx64.o\" -L\"/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/lib/lnx64.o\" -lrdi_simulator_kernel -L/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/lib/lnx64.o/../../tps/lnx64/gcc-9.3.0/bin/../lib64 -Wl,--disable-new-dtags -Wl,-rpath=/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/lib/lnx64.o/../../tps/lnx64/gcc-9.3.0/bin/../lib64 -lrdi_simbridge_kernel" ,
+ aggregate_nets :
+ [
+ ]
+}
\ No newline at end of file
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsim.rtti b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsim.rtti
new file mode 100644
index 0000000000000000000000000000000000000000..de53811036a2f957538e2ef601a5cacbda6adb84
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsim.rtti differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsim.svtype b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsim.svtype
new file mode 100644
index 0000000000000000000000000000000000000000..57a1c98a5f6d4cad2df1f5c52fb8d6f99ce7db99
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsim.svtype differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsim.type b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsim.type
new file mode 100644
index 0000000000000000000000000000000000000000..4bb1da6cb0a15d69c89837f99883d3bb83711317
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsim.type differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsim.xdbg b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsim.xdbg
new file mode 100644
index 0000000000000000000000000000000000000000..832e56613973f956b8646686c3c128fba9f57e20
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsim.xdbg differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsimSettings.ini b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsimSettings.ini
new file mode 100644
index 0000000000000000000000000000000000000000..f3245613d0d2eebe4fb7c65c2a6cd13249bc61fa
--- /dev/null
+++ b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsimSettings.ini
@@ -0,0 +1,50 @@
+[General]
+ARRAY_DISPLAY_LIMIT=512
+RADIX=hex
+TIME_UNIT=ns
+TRACE_LIMIT=2147483647
+VHDL_ENTITY_SCOPE_FILTER=true
+VHDL_PACKAGE_SCOPE_FILTER=false
+VHDL_BLOCK_SCOPE_FILTER=true
+VHDL_PROCESS_SCOPE_FILTER=false
+VHDL_PROCEDURE_SCOPE_FILTER=false
+VERILOG_MODULE_SCOPE_FILTER=true
+VERILOG_PACKAGE_SCOPE_FILTER=false
+VERILOG_BLOCK_SCOPE_FILTER=false
+VERILOG_TASK_SCOPE_FILTER=false
+VERILOG_PROCESS_SCOPE_FILTER=false
+INPUT_OBJECT_FILTER=true
+OUTPUT_OBJECT_FILTER=true
+INOUT_OBJECT_FILTER=true
+INTERNAL_OBJECT_FILTER=true
+CONSTANT_OBJECT_FILTER=true
+VARIABLE_OBJECT_FILTER=true
+INPUT_PROTOINST_FILTER=true
+OUTPUT_PROTOINST_FILTER=true
+INOUT_PROTOINST_FILTER=true
+INTERNAL_PROTOINST_FILTER=true
+CONSTANT_PROTOINST_FILTER=true
+VARIABLE_PROTOINST_FILTER=true
+SCOPE_NAME_COLUMN_WIDTH=117
+SCOPE_DESIGN_UNIT_COLUMN_WIDTH=162
+SCOPE_BLOCK_TYPE_COLUMN_WIDTH=103
+OBJECT_NAME_COLUMN_WIDTH=188
+OBJECT_VALUE_COLUMN_WIDTH=49
+OBJECT_DATA_TYPE_COLUMN_WIDTH=75
+PROCESS_NAME_COLUMN_WIDTH=75
+PROCESS_TYPE_COLUMN_WIDTH=75
+FRAME_INDEX_COLUMN_WIDTH=75
+FRAME_NAME_COLUMN_WIDTH=75
+FRAME_FILE_NAME_COLUMN_WIDTH=75
+FRAME_LINE_NUM_COLUMN_WIDTH=75
+LOCAL_NAME_COLUMN_WIDTH=75
+LOCAL_VALUE_COLUMN_WIDTH=75
+LOCAL_DATA_TYPE_COLUMN_WIDTH=0
+PROTO_NAME_COLUMN_WIDTH=0
+PROTO_VALUE_COLUMN_WIDTH=0
+INPUT_LOCAL_FILTER=1
+OUTPUT_LOCAL_FILTER=1
+INOUT_LOCAL_FILTER=1
+INTERNAL_LOCAL_FILTER=1
+CONSTANT_LOCAL_FILTER=1
+VARIABLE_LOCAL_FILTER=1
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsimcrash.log b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsimcrash.log
new file mode 100644
index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsimk b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsimk
new file mode 100755
index 0000000000000000000000000000000000000000..601c500522af25ddcb1d2a63828bcfac88d7619f
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsimk differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsimkernel.log b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsimkernel.log
new file mode 100644
index 0000000000000000000000000000000000000000..209349b4dce5978752cbaf60a7a549324af9f8f0
--- /dev/null
+++ b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/tb_firUnit_behav/xsimkernel.log
@@ -0,0 +1,4 @@
+Running: xsim.dir/tb_firUnit_behav/xsimk -simmode gui -wdb tb_firUnit_behav.wdb -simrunnum 0 -socket 54637
+Design successfully loaded
+Design Loading Memory Usage: 22124 KB (Peak: 22132 KB)
+Design Loading CPU Usage: 20 ms
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/audio@proc.sdb b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/audio@proc.sdb
new file mode 100644
index 0000000000000000000000000000000000000000..03ca0253fa497c8c88cf813f62854d38f1825dad
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/audio@proc.sdb differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/audio_init.sdb b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/audio_init.sdb
new file mode 100644
index 0000000000000000000000000000000000000000..35ad51b2c35548a42be06da93012da89915016e5
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/audio_init.sdb differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/clk_wiz_0.sdb b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/clk_wiz_0.sdb
new file mode 100644
index 0000000000000000000000000000000000000000..7e248078866d3b7baaa1cf4185935e65225aac65
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/clk_wiz_0.sdb differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/clk_wiz_0_clk_wiz.sdb b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/clk_wiz_0_clk_wiz.sdb
new file mode 100644
index 0000000000000000000000000000000000000000..3fbea377dab0f258aaaf9397887d35d7ef094e8a
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/clk_wiz_0_clk_wiz.sdb differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/controlunit.vdb b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/controlunit.vdb
new file mode 100644
index 0000000000000000000000000000000000000000..2cd36717c37d471288591c5d76a402d9e27a149d
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/controlunit.vdb differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/debounce.sdb b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/debounce.sdb
new file mode 100644
index 0000000000000000000000000000000000000000..6f5da3ea88760a7e3daf4a9a79854d61a12e36c4
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/debounce.sdb differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/fir.vdb b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/fir.vdb
new file mode 100644
index 0000000000000000000000000000000000000000..f70299764687fde3929b0547ff54666925e10efe
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/fir.vdb differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/firunit.vdb b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/firunit.vdb
new file mode 100644
index 0000000000000000000000000000000000000000..7038570f515aa9f4c528854a26d6372e929efdc1
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/firunit.vdb differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/glbl.sdb b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/glbl.sdb
new file mode 100644
index 0000000000000000000000000000000000000000..5c77c8890b49515a021de87c3692f27565d3117b
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/glbl.sdb differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/i2s_ctl.vdb b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/i2s_ctl.vdb
new file mode 100644
index 0000000000000000000000000000000000000000..e762743ca8e65d3e98467ac8699557f79fb3535c
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/i2s_ctl.vdb differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/operative@unit.sdb b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/operative@unit.sdb
new file mode 100644
index 0000000000000000000000000000000000000000..59087255dc3e1f11dc5d40e81a77b069f72cd786
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/operative@unit.sdb differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/tb_firunit.vdb b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/tb_firunit.vdb
new file mode 100644
index 0000000000000000000000000000000000000000..7d960f0977c8810ab08941f81e0232f3ddd49a1f
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/tb_firunit.vdb differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/twictl.vdb b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/twictl.vdb
new file mode 100644
index 0000000000000000000000000000000000000000..874b5dc70d5e115200c25a5f926d639a4f88f3ec
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/twictl.vdb differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/twiutils.vdb b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/twiutils.vdb
new file mode 100644
index 0000000000000000000000000000000000000000..dece42f74ed16e79ef7ea3272d1cc21570949cb1
Binary files /dev/null and b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/twiutils.vdb differ
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/xil_defaultlib.rlx b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/xil_defaultlib.rlx
new file mode 100644
index 0000000000000000000000000000000000000000..f4d6768fb23e5413cf5cb73e6c42c3b047b644fd
--- /dev/null
+++ b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/xil_defaultlib.rlx
@@ -0,0 +1,17 @@
+0.7
+2020.2
+May 22 2024
+18:54:44
+/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim/glbl.v,1708598507,verilog,,,,glbl,,,,,,,,
+/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/TWICtl.vhd,1746792867,vhdl,,,,twictl;twiutils,,,,,,,,
+/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/audioProc.v,1746792867,verilog,,,,audioProc,,,,,,,,
+/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/audio_init.v,1746792867,verilog,,/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/debounce.v,,audio_init,,,,,,,,
+/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd,1746798166,vhdl,/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd,,,controlunit,,,,,,,,
+/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/debounce.v,1746792867,verilog,,/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v,,debounce,,,,,,,,
+/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/fir.vhd,1746792867,vhdl,,,,fir,,,,,,,,
+/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd,1746792867,vhdl,/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd,,,firunit,,,,,,,,
+/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/i2s_ctl.vhd,1746792867,vhdl,,,,i2s_ctl,,,,,,,,
+/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v,1746792867,verilog,/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd,/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/audioProc.v,,\operativeUnit\,,,,,,,,
+/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd,1746792867,vhdl,,,,tb_firunit,,,,,,,,
+/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/ip/clk_wiz_0/clk_wiz_0.v,1746792867,verilog,,/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/audio_init.v,,clk_wiz_0,,,,,,,,
+/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/ip/clk_wiz_0/clk_wiz_0_clk_wiz.v,1746792867,verilog,,/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/ip/clk_wiz_0/clk_wiz_0.v,,clk_wiz_0_clk_wiz,,,,,,,,
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.ini b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.ini
new file mode 100644
index 0000000000000000000000000000000000000000..65c1bae3d8499ab13e863c8b22ed50ca77e3133e
--- /dev/null
+++ b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.ini
@@ -0,0 +1,490 @@
+std=$RDI_DATADIR/xsim/vhdl/std
+ieee=$RDI_DATADIR/xsim/vhdl/ieee
+ieee_proposed=$RDI_DATADIR/xsim/vhdl/ieee_proposed
+vl=$RDI_DATADIR/xsim/vhdl/vl
+synopsys=$RDI_DATADIR/xsim/vhdl/synopsys
+uvm=$RDI_DATADIR/xsim/system_verilog/uvm
+secureip=$RDI_DATADIR/xsim/verilog/secureip
+unisim=$RDI_DATADIR/xsim/vhdl/unisim
+unimacro=$RDI_DATADIR/xsim/vhdl/unimacro
+unifast=$RDI_DATADIR/xsim/vhdl/unifast
+unisims_ver=$RDI_DATADIR/xsim/verilog/unisims_ver
+unimacro_ver=$RDI_DATADIR/xsim/verilog/unimacro_ver
+unifast_ver=$RDI_DATADIR/xsim/verilog/unifast_ver
+simprims_ver=$RDI_DATADIR/xsim/verilog/simprims_ver
+axi_epu_v1_0_4=$RDI_DATADIR/xsim/ip/axi_epu_v1_0_4
+xlconcat_v2_1_6=$RDI_DATADIR/xsim/ip/xlconcat_v2_1_6
+emb_fifo_gen_v1_0_5=$RDI_DATADIR/xsim/ip/emb_fifo_gen_v1_0_5
+mipi_csi2_tx_ctrl_v1_0_6=$RDI_DATADIR/xsim/ip/mipi_csi2_tx_ctrl_v1_0_6
+c_mux_bit_v12_0_9=$RDI_DATADIR/xsim/ip/c_mux_bit_v12_0_9
+smartconnect_v1_0=$RDI_DATADIR/xsim/ip/smartconnect_v1_0
+v_smpte_uhdsdi_tx_v1_0_4=$RDI_DATADIR/xsim/ip/v_smpte_uhdsdi_tx_v1_0_4
+cam_v3_0_0=$RDI_DATADIR/xsim/ip/cam_v3_0_0
+microblaze_v11_0_13=$RDI_DATADIR/xsim/ip/microblaze_v11_0_13
+axi_fifo_mm_s_v4_3_3=$RDI_DATADIR/xsim/ip/axi_fifo_mm_s_v4_3_3
+v_hdmi_rx1_v1_0_9=$RDI_DATADIR/xsim/ip/v_hdmi_rx1_v1_0_9
+video_frame_crc_v1_0_6=$RDI_DATADIR/xsim/ip/video_frame_crc_v1_0_6
+hdcp22_cipher_dp_v1_0_2=$RDI_DATADIR/xsim/ip/hdcp22_cipher_dp_v1_0_2
+generic_baseblocks_v2_1_2=$RDI_DATADIR/xsim/ip/generic_baseblocks_v2_1_2
+axis_clock_converter_v1_1_32=$RDI_DATADIR/xsim/ip/axis_clock_converter_v1_1_32
+psx_vip_v1_0_4=$RDI_DATADIR/xsim/ip/psx_vip_v1_0_4
+g975_efec_i4_v1_0_22=$RDI_DATADIR/xsim/ip/g975_efec_i4_v1_0_22
+axi_lite_ipif_v3_0_4=$RDI_DATADIR/xsim/ip/axi_lite_ipif_v3_0_4
+axis_dbg_stub_v1_0_1=$RDI_DATADIR/xsim/ip/axis_dbg_stub_v1_0_1
+ethernet_1_10_25g_v2_7_15=$RDI_DATADIR/xsim/ip/ethernet_1_10_25g_v2_7_15
+an_lt_v1_0_12=$RDI_DATADIR/xsim/ip/an_lt_v1_0_12
+hdmi_gt_controller_v1_0_13=$RDI_DATADIR/xsim/ip/hdmi_gt_controller_v1_0_13
+axi_cdma_v4_1_31=$RDI_DATADIR/xsim/ip/axi_cdma_v4_1_31
+xilinx_vip=$RDI_DATADIR/xsim/ip/xilinx_vip
+videoaxi4s_bridge_v1_0_7=$RDI_DATADIR/xsim/ip/videoaxi4s_bridge_v1_0_7
+mdm_riscv_v1_0_2=$RDI_DATADIR/xsim/ip/mdm_riscv_v1_0_2
+axi_uartlite_v2_0_35=$RDI_DATADIR/xsim/ip/axi_uartlite_v2_0_35
+axi_perf_mon_v5_0_33=$RDI_DATADIR/xsim/ip/axi_perf_mon_v5_0_33
+axi_master_burst_v2_0_9=$RDI_DATADIR/xsim/ip/axi_master_burst_v2_0_9
+aie_ps_v1_0=$RDI_DATADIR/xsim/ip/aie_ps_v1_0
+ibert_lib_v1_0_11=$RDI_DATADIR/xsim/ip/ibert_lib_v1_0_11
+axi_datamover_v5_1_33=$RDI_DATADIR/xsim/ip/axi_datamover_v5_1_33
+noc_nps4_v1_0_0=$RDI_DATADIR/xsim/ip/noc_nps4_v1_0_0
+xbip_dsp48_addsub_v3_0_9=$RDI_DATADIR/xsim/ip/xbip_dsp48_addsub_v3_0_9
+v_axi4s_vid_out_v4_0_18=$RDI_DATADIR/xsim/ip/v_axi4s_vid_out_v4_0_18
+axi_chip2chip_v5_0_22=$RDI_DATADIR/xsim/ip/axi_chip2chip_v5_0_22
+gtwizard_ultrascale_v1_7_18=$RDI_DATADIR/xsim/ip/gtwizard_ultrascale_v1_7_18
+axi_infrastructure_v1_1_0=$RDI_DATADIR/xsim/ip/axi_infrastructure_v1_1_0
+switch_core_top_v1_0_16=$RDI_DATADIR/xsim/ip/switch_core_top_v1_0_16
+vitis_net_p4_v2_1_0=$RDI_DATADIR/xsim/ip/vitis_net_p4_v2_1_0
+axi_sideband_util_v1_0_15=$RDI_DATADIR/xsim/ip/axi_sideband_util_v1_0_15
+axis_infrastructure_v1_1_1=$RDI_DATADIR/xsim/ip/axis_infrastructure_v1_1_1
+dist_mem_gen_v8_0_15=$RDI_DATADIR/xsim/ip/dist_mem_gen_v8_0_15
+shell_utils_addr_remap_v1_0_10=$RDI_DATADIR/xsim/ip/shell_utils_addr_remap_v1_0_10
+xbip_addsub_v3_0_9=$RDI_DATADIR/xsim/ip/xbip_addsub_v3_0_9
+dds_compiler_v6_0_25=$RDI_DATADIR/xsim/ip/dds_compiler_v6_0_25
+bscan_axi_v1_0_2=$RDI_DATADIR/xsim/ip/bscan_axi_v1_0_2
+fifo_generator_v13_2_10=$RDI_DATADIR/xsim/ip/fifo_generator_v13_2_10
+dprx_fec_8b10b_v1_0_3=$RDI_DATADIR/xsim/ip/dprx_fec_8b10b_v1_0_3
+pcie_axi4lite_tap_v1_0_2=$RDI_DATADIR/xsim/ip/pcie_axi4lite_tap_v1_0_2
+av_pat_gen_v2_0_2=$RDI_DATADIR/xsim/ip/av_pat_gen_v2_0_2
+polar_v1_1_4=$RDI_DATADIR/xsim/ip/polar_v1_1_4
+v_tpg_v8_2_5=$RDI_DATADIR/xsim/ip/v_tpg_v8_2_5
+tcc_encoder_3gpplte_v4_0_19=$RDI_DATADIR/xsim/ip/tcc_encoder_3gpplte_v4_0_19
+axis_accelerator_adapter_v2_1_18=$RDI_DATADIR/xsim/ip/axis_accelerator_adapter_v2_1_18
+mem_pl_v1_0_2=$RDI_DATADIR/xsim/ip/mem_pl_v1_0_2
+perf_axi_tg_v1_0_13=$RDI_DATADIR/xsim/ip/perf_axi_tg_v1_0_13
+trace_hub_v1_1_0=$RDI_DATADIR/xsim/ip/trace_hub_v1_1_0
+axi_pcie_v2_9_11=$RDI_DATADIR/xsim/ip/axi_pcie_v2_9_11
+axi_emc_v3_0_31=$RDI_DATADIR/xsim/ip/axi_emc_v3_0_31
+tsn_endpoint_ethernet_mac_block_v1_0_16=$RDI_DATADIR/xsim/ip/tsn_endpoint_ethernet_mac_block_v1_0_16
+soft_ecc_proxy_v1_1_1=$RDI_DATADIR/xsim/ip/soft_ecc_proxy_v1_1_1
+axi_apb_bridge_v3_0_20=$RDI_DATADIR/xsim/ip/axi_apb_bridge_v3_0_20
+axis_broadcaster_v1_1_30=$RDI_DATADIR/xsim/ip/axis_broadcaster_v1_1_30
+axis_dwidth_converter_sc_v1_1=$RDI_DATADIR/xsim/ip/axis_dwidth_converter_sc_v1_1
+vid_edid_v1_0_2=$RDI_DATADIR/xsim/ip/vid_edid_v1_0_2
+noc_nidb_v1_0_0=$RDI_DATADIR/xsim/ip/noc_nidb_v1_0_0
+v_vid_in_axi4s_v5_0_4=$RDI_DATADIR/xsim/ip/v_vid_in_axi4s_v5_0_4
+v_dual_splitter_v1_0_11=$RDI_DATADIR/xsim/ip/v_dual_splitter_v1_0_11
+axis_ila_txns_cntr_v1_0_0=$RDI_DATADIR/xsim/ip/axis_ila_txns_cntr_v1_0_0
+pl_fileio_v1_0_0=$RDI_DATADIR/xsim/ip/pl_fileio_v1_0_0
+msm_cpp=$RDI_DATADIR/xsim/ip/msm_cpp
+debug_tcp_server_v1=$RDI_DATADIR/xsim/ip/debug_tcp_server_v1
+v_frmbuf_wr_v2_5_2=$RDI_DATADIR/xsim/ip/v_frmbuf_wr_v2_5_2
+v_smpte_uhdsdi_rx_v1_0_3=$RDI_DATADIR/xsim/ip/v_smpte_uhdsdi_rx_v1_0_3
+mpegtsmux_v1_1_9=$RDI_DATADIR/xsim/ip/mpegtsmux_v1_1_9
+noc_nps_v1_0_1=$RDI_DATADIR/xsim/ip/noc_nps_v1_0_1
+v_multi_scaler_v1_2_6=$RDI_DATADIR/xsim/ip/v_multi_scaler_v1_2_6
+x5io_wizard_v1_0_4=$RDI_DATADIR/xsim/ip/x5io_wizard_v1_0_4
+axi_remapper_rx_v1_0_2=$RDI_DATADIR/xsim/ip/axi_remapper_rx_v1_0_2
+emu_perf_common_v1_0=$RDI_DATADIR/xsim/ip/emu_perf_common_v1_0
+sem_ultra_v3_1_26=$RDI_DATADIR/xsim/ip/sem_ultra_v3_1_26
+axi_utils_v2_0_9=$RDI_DATADIR/xsim/ip/axi_utils_v2_0_9
+v_tc_v6_2_8=$RDI_DATADIR/xsim/ip/v_tc_v6_2_8
+ieee802d3_clause74_fec_v1_0_18=$RDI_DATADIR/xsim/ip/ieee802d3_clause74_fec_v1_0_18
+jesd204c_v4_2_14=$RDI_DATADIR/xsim/ip/jesd204c_v4_2_14
+xtlm=$RDI_DATADIR/xsim/ip/xtlm
+hdmi_acr_ctrl_v1_0_3=$RDI_DATADIR/xsim/ip/hdmi_acr_ctrl_v1_0_3
+icap_arb_v1_0_2=$RDI_DATADIR/xsim/ip/icap_arb_v1_0_2
+nvme_tc_v3_0_6=$RDI_DATADIR/xsim/ip/nvme_tc_v3_0_6
+axi4svideo_bridge_v1_0_18=$RDI_DATADIR/xsim/ip/axi4svideo_bridge_v1_0_18
+jtag_axi=$RDI_DATADIR/xsim/ip/jtag_axi
+axi_intc_v4_1_19=$RDI_DATADIR/xsim/ip/axi_intc_v4_1_19
+v_demosaic_v1_1_11=$RDI_DATADIR/xsim/ip/v_demosaic_v1_1_11
+pcie_jtag_v1_0_1=$RDI_DATADIR/xsim/ip/pcie_jtag_v1_0_1
+xlslice_v1_0_4=$RDI_DATADIR/xsim/ip/xlslice_v1_0_4
+axi_vfifo_ctrl_v2_0_34=$RDI_DATADIR/xsim/ip/axi_vfifo_ctrl_v2_0_34
+gmii_to_rgmii_v4_1_14=$RDI_DATADIR/xsim/ip/gmii_to_rgmii_v4_1_14
+util_reduced_logic_v2_0_6=$RDI_DATADIR/xsim/ip/util_reduced_logic_v2_0_6
+nvmeha_v1_0_12=$RDI_DATADIR/xsim/ip/nvmeha_v1_0_12
+axi_c2c_v1_0_9=$RDI_DATADIR/xsim/ip/axi_c2c_v1_0_9
+ft_prach_v1_2_2=$RDI_DATADIR/xsim/ip/ft_prach_v1_2_2
+v_smpte_uhdsdi_v1_0_11=$RDI_DATADIR/xsim/ip/v_smpte_uhdsdi_v1_0_11
+axi_pmon_v1_0_1=$RDI_DATADIR/xsim/ip/axi_pmon_v1_0_1
+gtwizard_ultrascale_v1_6_16=$RDI_DATADIR/xsim/ip/gtwizard_ultrascale_v1_6_16
+gigantic_mux=$RDI_DATADIR/xsim/ip/gigantic_mux
+displayport_v7_0_24=$RDI_DATADIR/xsim/ip/displayport_v7_0_24
+msm_adapters=$RDI_DATADIR/xsim/ip/msm_adapters
+v_frmbuf_wr_v2_2_10=$RDI_DATADIR/xsim/ip/v_frmbuf_wr_v2_2_10
+fast_adapter_v1_0_8=$RDI_DATADIR/xsim/ip/fast_adapter_v1_0_8
+rst_vip_v1_0_6=$RDI_DATADIR/xsim/ip/rst_vip_v1_0_6
+v_hdmi_phy1_v1_0_12=$RDI_DATADIR/xsim/ip/v_hdmi_phy1_v1_0_12
+pcie_qdma_mailbox_v1_0_5=$RDI_DATADIR/xsim/ip/pcie_qdma_mailbox_v1_0_5
+pr_decoupler_v1_0_11=$RDI_DATADIR/xsim/ip/pr_decoupler_v1_0_11
+v_hdmi_tx1_v1_0_8=$RDI_DATADIR/xsim/ip/v_hdmi_tx1_v1_0_8
+processing_system7_v5_5_6=$RDI_DATADIR/xsim/ip/processing_system7_v5_5_6
+axis_cap_ctrl_v1_0_1=$RDI_DATADIR/xsim/ip/axis_cap_ctrl_v1_0_1
+common_rpc_v1=$RDI_DATADIR/xsim/ip/common_rpc_v1
+xtlm_ipc_v1_0=$RDI_DATADIR/xsim/ip/xtlm_ipc_v1_0
+v_tpg_v8_1_10=$RDI_DATADIR/xsim/ip/v_tpg_v8_1_10
+v_hcresampler_v1_1_11=$RDI_DATADIR/xsim/ip/v_hcresampler_v1_1_11
+axi_interface_monitor_v1_1_0=$RDI_DATADIR/xsim/ip/axi_interface_monitor_v1_1_0
+axi_intc_v4_1=$RDI_DATADIR/xsim/ip/axi_intc_v4_1
+mammoth_transcode_v1_0_2=$RDI_DATADIR/xsim/ip/mammoth_transcode_v1_0_2
+axi_timebase_wdt_v3_0_23=$RDI_DATADIR/xsim/ip/axi_timebase_wdt_v3_0_23
+floating_point_v7_0_23=$RDI_DATADIR/xsim/ip/floating_point_v7_0_23
+displayport_v9_0_9=$RDI_DATADIR/xsim/ip/displayport_v9_0_9
+noc_hbm_v1_0_0=$RDI_DATADIR/xsim/ip/noc_hbm_v1_0_0
+versal_cips_ps_vip_v1_0_9=$RDI_DATADIR/xsim/ip/versal_cips_ps_vip_v1_0_9
+amm_axi_bridge_v1_0_17=$RDI_DATADIR/xsim/ip/amm_axi_bridge_v1_0_17
+v_vid_gt_bridge_v2_0_5=$RDI_DATADIR/xsim/ip/v_vid_gt_bridge_v2_0_5
+v_gamma_lut_v1_1_11=$RDI_DATADIR/xsim/ip/v_gamma_lut_v1_1_11
+rld3_pl_v1_0_14=$RDI_DATADIR/xsim/ip/rld3_pl_v1_0_14
+l_ethernet_v3_3_10=$RDI_DATADIR/xsim/ip/l_ethernet_v3_3_10
+ernic_v4_0_3=$RDI_DATADIR/xsim/ip/ernic_v4_0_3
+fec_5g_common_v1_1_4=$RDI_DATADIR/xsim/ip/fec_5g_common_v1_1_4
+sim_qdma_sc_v1_0=$RDI_DATADIR/xsim/ip/sim_qdma_sc_v1_0
+dfx_bitstream_monitor_v1_0_5=$RDI_DATADIR/xsim/ip/dfx_bitstream_monitor_v1_0_5
+axi_mmu_v2_1_29=$RDI_DATADIR/xsim/ip/axi_mmu_v2_1_29
+v_sdi_rx_vid_bridge_v2_0_2=$RDI_DATADIR/xsim/ip/v_sdi_rx_vid_bridge_v2_0_2
+v_csc_v1_1_11=$RDI_DATADIR/xsim/ip/v_csc_v1_1_11
+usxgmii_v1_2_17=$RDI_DATADIR/xsim/ip/usxgmii_v1_2_17
+trace_s2mm_v2_0_1=$RDI_DATADIR/xsim/ip/trace_s2mm_v2_0_1
+ieee802d3_rs_fec_v2_0_22=$RDI_DATADIR/xsim/ip/ieee802d3_rs_fec_v2_0_22
+v_hdmi_tx_v3_0_4=$RDI_DATADIR/xsim/ip/v_hdmi_tx_v3_0_4
+ldpc_5gnr_v1_0_3=$RDI_DATADIR/xsim/ip/ldpc_5gnr_v1_0_3
+rama_v1_1_17_lib=$RDI_DATADIR/xsim/ip/rama_v1_1_17_lib
+rs_decoder_v9_0_22=$RDI_DATADIR/xsim/ip/rs_decoder_v9_0_22
+ieee802d3_400g_rs_fec_v3_0_2=$RDI_DATADIR/xsim/ip/ieee802d3_400g_rs_fec_v3_0_2
+xscl=$RDI_DATADIR/xsim/ip/xscl
+iomodule_v3_1_10=$RDI_DATADIR/xsim/ip/iomodule_v3_1_10
+axis_mem_v1_0_2=$RDI_DATADIR/xsim/ip/axis_mem_v1_0_2
+axi_tft_v2_0_28=$RDI_DATADIR/xsim/ip/axi_tft_v2_0_28
+fc32_rs_fec_v1_0_27=$RDI_DATADIR/xsim/ip/fc32_rs_fec_v1_0_27
+axi_remapper_tx_v1_0_2=$RDI_DATADIR/xsim/ip/axi_remapper_tx_v1_0_2
+dfx_axi_shutdown_manager_v1_0_3=$RDI_DATADIR/xsim/ip/dfx_axi_shutdown_manager_v1_0_3
+util_vector_logic_v2_0_4=$RDI_DATADIR/xsim/ip/util_vector_logic_v2_0_4
+axis_ila_intf_v1_0_2=$RDI_DATADIR/xsim/ip/axis_ila_intf_v1_0_2
+axi_amm_bridge_v1_0_21=$RDI_DATADIR/xsim/ip/axi_amm_bridge_v1_0_21
+xpm_cdc_gen_v1_0_4=$RDI_DATADIR/xsim/ip/xpm_cdc_gen_v1_0_4
+c_accum_v12_0_18=$RDI_DATADIR/xsim/ip/c_accum_v12_0_18
+cmac_v2_6_15=$RDI_DATADIR/xsim/ip/cmac_v2_6_15
+axi_firewall_v1_2_6=$RDI_DATADIR/xsim/ip/axi_firewall_v1_2_6
+dft_v4_2_8=$RDI_DATADIR/xsim/ip/dft_v4_2_8
+ernic_v3_1_5=$RDI_DATADIR/xsim/ip/ernic_v3_1_5
+xsdbs_v1_0_4=$RDI_DATADIR/xsim/ip/xsdbs_v1_0_4
+stm_v1_0=$RDI_DATADIR/xsim/ip/stm_v1_0
+axi_timer_v2_0_33=$RDI_DATADIR/xsim/ip/axi_timer_v2_0_33
+lmb_v10_v3_0_14=$RDI_DATADIR/xsim/ip/lmb_v10_v3_0_14
+v_deinterlacer_v5_1_4=$RDI_DATADIR/xsim/ip/v_deinterlacer_v5_1_4
+axis_data_fifo_v1_1_32=$RDI_DATADIR/xsim/ip/axis_data_fifo_v1_1_32
+hw_trace=$RDI_DATADIR/xsim/ip/hw_trace
+sim_xdma_sc_v1=$RDI_DATADIR/xsim/ip/sim_xdma_sc_v1
+axi_vip_v1_1_17=$RDI_DATADIR/xsim/ip/axi_vip_v1_1_17
+mipi_dphy_v4_3_11=$RDI_DATADIR/xsim/ip/mipi_dphy_v4_3_11
+ieee802d3_50g_rs_fec_v2_0_17=$RDI_DATADIR/xsim/ip/ieee802d3_50g_rs_fec_v2_0_17
+xdfe_equalizer_v1_0_9=$RDI_DATADIR/xsim/ip/xdfe_equalizer_v1_0_9
+flexo_100g_rs_fec_v1_0_28=$RDI_DATADIR/xsim/ip/flexo_100g_rs_fec_v1_0_28
+v_uhdsdi_audio_v2_0_8=$RDI_DATADIR/xsim/ip/v_uhdsdi_audio_v2_0_8
+v_tc_v6_1_14=$RDI_DATADIR/xsim/ip/v_tc_v6_1_14
+ddr4_pl_phy_v1_0_2=$RDI_DATADIR/xsim/ip/ddr4_pl_phy_v1_0_2
+sem_v4_1_15=$RDI_DATADIR/xsim/ip/sem_v4_1_15
+c_shift_ram_v12_0_17=$RDI_DATADIR/xsim/ip/c_shift_ram_v12_0_17
+lib_pkg_v1_0_4=$RDI_DATADIR/xsim/ip/lib_pkg_v1_0_4
+bs_switch_v1_0_4=$RDI_DATADIR/xsim/ip/bs_switch_v1_0_4
+shell_utils_msp432_bsl_crc_gen_v1_0_2=$RDI_DATADIR/xsim/ip/shell_utils_msp432_bsl_crc_gen_v1_0_2
+axis_dbg_sync_v1_0_1=$RDI_DATADIR/xsim/ip/axis_dbg_sync_v1_0_1
+high_speed_selectio_wiz_v3_6_9=$RDI_DATADIR/xsim/ip/high_speed_selectio_wiz_v3_6_9
+emc_common_v3_0_7=$RDI_DATADIR/xsim/ip/emc_common_v3_0_7
+fir_compiler_v7_2_22=$RDI_DATADIR/xsim/ip/fir_compiler_v7_2_22
+microblaze_mcs_v2_3_7=$RDI_DATADIR/xsim/ip/microblaze_mcs_v2_3_7
+oran_radio_if_v3_2_0=$RDI_DATADIR/xsim/ip/oran_radio_if_v3_2_0
+i2s_transmitter_v1_0_8=$RDI_DATADIR/xsim/ip/i2s_transmitter_v1_0_8
+floating_point_v7_1_18=$RDI_DATADIR/xsim/ip/floating_point_v7_1_18
+sim_trig_v1_0_12=$RDI_DATADIR/xsim/ip/sim_trig_v1_0_12
+hbm2e_pl_v1_0_1=$RDI_DATADIR/xsim/ip/hbm2e_pl_v1_0_1
+axis_protocol_checker_v2_0_15=$RDI_DATADIR/xsim/ip/axis_protocol_checker_v2_0_15
+vitis_deadlock_detector_v1_0_2=$RDI_DATADIR/xsim/ip/vitis_deadlock_detector_v1_0_2
+axi_msg_v1_0_11=$RDI_DATADIR/xsim/ip/axi_msg_v1_0_11
+c_compare_v12_0_9=$RDI_DATADIR/xsim/ip/c_compare_v12_0_9
+c_mux_bus_v12_0_9=$RDI_DATADIR/xsim/ip/c_mux_bus_v12_0_9
+xsdbm_v3_0_2=$RDI_DATADIR/xsim/ip/xsdbm_v3_0_2
+rld3_pl_phy_v1_0_2=$RDI_DATADIR/xsim/ip/rld3_pl_phy_v1_0_2
+mpram_v1_0_4=$RDI_DATADIR/xsim/ip/mpram_v1_0_4
+oddr_v1_0_4=$RDI_DATADIR/xsim/ip/oddr_v1_0_4
+bs_mux_v1_0_1=$RDI_DATADIR/xsim/ip/bs_mux_v1_0_1
+ptp_1588_timer_syncer_v2_0_6=$RDI_DATADIR/xsim/ip/ptp_1588_timer_syncer_v2_0_6
+dfx_controller_v1_0_7=$RDI_DATADIR/xsim/ip/dfx_controller_v1_0_7
+noc_ncrb_v1_0_0=$RDI_DATADIR/xsim/ip/noc_ncrb_v1_0_0
+rs_toolbox_v9_0_13=$RDI_DATADIR/xsim/ip/rs_toolbox_v9_0_13
+pc_cfr_v8_0_2=$RDI_DATADIR/xsim/ip/pc_cfr_v8_0_2
+multi_channel_25g_rs_fec_v1_0_26=$RDI_DATADIR/xsim/ip/multi_channel_25g_rs_fec_v1_0_26
+lmb_bram_if_cntlr_v4_0_24=$RDI_DATADIR/xsim/ip/lmb_bram_if_cntlr_v4_0_24
+hdcp_keymngmt_blk_v1_0_2=$RDI_DATADIR/xsim/ip/hdcp_keymngmt_blk_v1_0_2
+axi_lite_ipif_v3_0=$RDI_DATADIR/xsim/ip/axi_lite_ipif_v3_0
+compact_gt_v1_0_17=$RDI_DATADIR/xsim/ip/compact_gt_v1_0_17
+v_vcresampler_v1_1_11=$RDI_DATADIR/xsim/ip/v_vcresampler_v1_1_11
+mipi_dsi2_rx_ctrl_v1_0_0=$RDI_DATADIR/xsim/ip/mipi_dsi2_rx_ctrl_v1_0_0
+axi_quad_spi_v3_2_30=$RDI_DATADIR/xsim/ip/axi_quad_spi_v3_2_30
+div_gen_v5_1_22=$RDI_DATADIR/xsim/ip/div_gen_v5_1_22
+v_frmbuf_rd_v2_2_10=$RDI_DATADIR/xsim/ip/v_frmbuf_rd_v2_2_10
+can_v5_1_3=$RDI_DATADIR/xsim/ip/can_v5_1_3
+axi_pcie3_v3_0_30=$RDI_DATADIR/xsim/ip/axi_pcie3_v3_0_30
+emb_mem_gen_v1_0_9=$RDI_DATADIR/xsim/ip/emb_mem_gen_v1_0_9
+noc2_xbr2x4_v1_0_0=$RDI_DATADIR/xsim/ip/noc2_xbr2x4_v1_0_0
+xbip_counter_v3_0_9=$RDI_DATADIR/xsim/ip/xbip_counter_v3_0_9
+axi_jtag_v1_0_2=$RDI_DATADIR/xsim/ip/axi_jtag_v1_0_2
+tmr_manager_v1_0_12=$RDI_DATADIR/xsim/ip/tmr_manager_v1_0_12
+noc_nmu_sim_v1_0_0=$RDI_DATADIR/xsim/ip/noc_nmu_sim_v1_0_0
+mipi_csi2_rx_ctrl_v1_0_10=$RDI_DATADIR/xsim/ip/mipi_csi2_rx_ctrl_v1_0_10
+axi_bram_ctrl_v4_0_15=$RDI_DATADIR/xsim/ip/axi_bram_ctrl_v4_0_15
+axi_gpio_v2_0_33=$RDI_DATADIR/xsim/ip/axi_gpio_v2_0_33
+rs_encoder_v9_0_21=$RDI_DATADIR/xsim/ip/rs_encoder_v9_0_21
+rwd_tlmmodel_v1=$RDI_DATADIR/xsim/ip/rwd_tlmmodel_v1
+axi_bram_ctrl_v4_1_10=$RDI_DATADIR/xsim/ip/axi_bram_ctrl_v4_1_10
+uram_rd_back_v1_0_4=$RDI_DATADIR/xsim/ip/uram_rd_back_v1_0_4
+lib_fifo_v1_0_19=$RDI_DATADIR/xsim/ip/lib_fifo_v1_0_19
+canfd_v3_0_10=$RDI_DATADIR/xsim/ip/canfd_v3_0_10
+hdcp22_rng_v1_0_3=$RDI_DATADIR/xsim/ip/hdcp22_rng_v1_0_3
+xfft_v9_1_12=$RDI_DATADIR/xsim/ip/xfft_v9_1_12
+axi_memory_init_v1_0_12=$RDI_DATADIR/xsim/ip/axi_memory_init_v1_0_12
+common_cpp_v1_0=$RDI_DATADIR/xsim/ip/common_cpp_v1_0
+ai_pl_trig=$RDI_DATADIR/xsim/ip/ai_pl_trig
+c_reg_fd_v12_0_9=$RDI_DATADIR/xsim/ip/c_reg_fd_v12_0_9
+axi_mm2s_mapper_v1_1_30=$RDI_DATADIR/xsim/ip/axi_mm2s_mapper_v1_1_30
+ldpc_v2_0_15=$RDI_DATADIR/xsim/ip/ldpc_v2_0_15
+sim_cpu_v1_0=$RDI_DATADIR/xsim/ip/sim_cpu_v1_0
+axi_data_fifo_v2_1_30=$RDI_DATADIR/xsim/ip/axi_data_fifo_v2_1_30
+g709_fec_v2_4_10=$RDI_DATADIR/xsim/ip/g709_fec_v2_4_10
+axi_mcdma_v1_1_12=$RDI_DATADIR/xsim/ip/axi_mcdma_v1_1_12
+axi_lmb_bridge_v1_0_3=$RDI_DATADIR/xsim/ip/axi_lmb_bridge_v1_0_3
+lte_fft_v2_1_10=$RDI_DATADIR/xsim/ip/lte_fft_v2_1_10
+axi_interconnect_v1_7_23=$RDI_DATADIR/xsim/ip/axi_interconnect_v1_7_23
+axi_dwidth_converter_v2_1_31=$RDI_DATADIR/xsim/ip/axi_dwidth_converter_v2_1_31
+axi_usb2_device_v5_0_32=$RDI_DATADIR/xsim/ip/axi_usb2_device_v5_0_32
+axi_hwicap_v3_0_35=$RDI_DATADIR/xsim/ip/axi_hwicap_v3_0_35
+ldpc_5gnr_lite_v1_0_2=$RDI_DATADIR/xsim/ip/ldpc_5gnr_lite_v1_0_2
+fifo_generator_v13_1_5=$RDI_DATADIR/xsim/ip/fifo_generator_v13_1_5
+axi_protocol_checker_v2_0_17=$RDI_DATADIR/xsim/ip/axi_protocol_checker_v2_0_17
+c_counter_binary_v12_0_19=$RDI_DATADIR/xsim/ip/c_counter_binary_v12_0_19
+axis_ila_pp_v1_0_2=$RDI_DATADIR/xsim/ip/axis_ila_pp_v1_0_2
+mem_tg_v1_0_13=$RDI_DATADIR/xsim/ip/mem_tg_v1_0_13
+xbip_utils_v3_0_13=$RDI_DATADIR/xsim/ip/xbip_utils_v3_0_13
+aie_xtlm_v1_0_0=$RDI_DATADIR/xsim/ip/aie_xtlm_v1_0_0
+xtlm_ap_ctrl_v1_0=$RDI_DATADIR/xsim/ip/xtlm_ap_ctrl_v1_0
+v_vid_in_axi4s_v4_0_11=$RDI_DATADIR/xsim/ip/v_vid_in_axi4s_v4_0_11
+cmac_usplus_v3_1_17=$RDI_DATADIR/xsim/ip/cmac_usplus_v3_1_17
+xdfe_common_v1_0_3=$RDI_DATADIR/xsim/ip/xdfe_common_v1_0_3
+viterbi_v9_1_17=$RDI_DATADIR/xsim/ip/viterbi_v9_1_17
+xdfe_nr_prach_v2_0_3=$RDI_DATADIR/xsim/ip/xdfe_nr_prach_v2_0_3
+v_smpte_sdi_v3_0_11=$RDI_DATADIR/xsim/ip/v_smpte_sdi_v3_0_11
+mdm_v3_2=$RDI_DATADIR/xsim/ip/mdm_v3_2
+clk_vip_v1_0_4=$RDI_DATADIR/xsim/ip/clk_vip_v1_0_4
+mdm_v3_2_26=$RDI_DATADIR/xsim/ip/mdm_v3_2_26
+xtlm_trace_model_v1_0=$RDI_DATADIR/xsim/ip/xtlm_trace_model_v1_0
+xbip_dsp48_multadd_v3_0_9=$RDI_DATADIR/xsim/ip/xbip_dsp48_multadd_v3_0_9
+noc2_nsu_v1_0_1=$RDI_DATADIR/xsim/ip/noc2_nsu_v1_0_1
+timer_sync_1588_v1_2_5=$RDI_DATADIR/xsim/ip/timer_sync_1588_v1_2_5
+axis_ila_ct_v1_0_1=$RDI_DATADIR/xsim/ip/axis_ila_ct_v1_0_1
+dcmac_v2_4_0=$RDI_DATADIR/xsim/ip/dcmac_v2_4_0
+v_dp_axi4s_vid_out_v1_0_8=$RDI_DATADIR/xsim/ip/v_dp_axi4s_vid_out_v1_0_8
+xbip_dsp48_acc_v3_0_9=$RDI_DATADIR/xsim/ip/xbip_dsp48_acc_v3_0_9
+noc2_xbr4x2_v1_0_0=$RDI_DATADIR/xsim/ip/noc2_xbr4x2_v1_0_0
+sd_fec_v1_1_14=$RDI_DATADIR/xsim/ip/sd_fec_v1_1_14
+xbip_accum_v3_0_9=$RDI_DATADIR/xsim/ip/xbip_accum_v3_0_9
+displayport_v8_1_9=$RDI_DATADIR/xsim/ip/displayport_v8_1_9
+ilknf_v1_3_4=$RDI_DATADIR/xsim/ip/ilknf_v1_3_4
+v_letterbox_v1_1_11=$RDI_DATADIR/xsim/ip/v_letterbox_v1_1_11
+iomodule_v3_0=$RDI_DATADIR/xsim/ip/iomodule_v3_0
+dbg_intf=$RDI_DATADIR/xsim/ip/dbg_intf
+cpm5_v1_0_16=$RDI_DATADIR/xsim/ip/cpm5_v1_0_16
+ieee802d3_25g_rs_fec_v1_0_30=$RDI_DATADIR/xsim/ip/ieee802d3_25g_rs_fec_v1_0_30
+jesd204_v7_2_20=$RDI_DATADIR/xsim/ip/jesd204_v7_2_20
+clk_gen_sim_v1_0_4=$RDI_DATADIR/xsim/ip/clk_gen_sim_v1_0_4
+g709_rs_decoder_v2_2_14=$RDI_DATADIR/xsim/ip/g709_rs_decoder_v2_2_14
+cpri_v8_11_20=$RDI_DATADIR/xsim/ip/cpri_v8_11_20
+ieee802d3_200g_rs_fec_v2_0_11=$RDI_DATADIR/xsim/ip/ieee802d3_200g_rs_fec_v2_0_11
+v_warp_init_v1_1_4=$RDI_DATADIR/xsim/ip/v_warp_init_v1_1_4
+v_hscaler_v1_1_11=$RDI_DATADIR/xsim/ip/v_hscaler_v1_1_11
+spdif_v2_0_29=$RDI_DATADIR/xsim/ip/spdif_v2_0_29
+func_emu_util_v1_0=$RDI_DATADIR/xsim/ip/func_emu_util_v1_0
+axi_uart16550_v2_0_33=$RDI_DATADIR/xsim/ip/axi_uart16550_v2_0_33
+axi_clock_converter_v2_1_30=$RDI_DATADIR/xsim/ip/axi_clock_converter_v2_1_30
+dprx_v1_0_4=$RDI_DATADIR/xsim/ip/dprx_v1_0_4
+mrmac_v2_3_0=$RDI_DATADIR/xsim/ip/mrmac_v2_3_0
+cic_compiler_v4_0_19=$RDI_DATADIR/xsim/ip/cic_compiler_v4_0_19
+c_gate_bit_v12_0_9=$RDI_DATADIR/xsim/ip/c_gate_bit_v12_0_9
+noc_sc_v1_0_0_legacy=$RDI_DATADIR/xsim/ip/noc_sc_v1_0_0_legacy
+ten_gig_eth_pcs_pma_v6_0_27=$RDI_DATADIR/xsim/ip/ten_gig_eth_pcs_pma_v6_0_27
+xdfe_cc_filter_v1_1_4=$RDI_DATADIR/xsim/ip/xdfe_cc_filter_v1_1_4
+axi_crossbar_v2_1_32=$RDI_DATADIR/xsim/ip/axi_crossbar_v2_1_32
+axis_itct_v1_0_1=$RDI_DATADIR/xsim/ip/axis_itct_v1_0_1
+xbip_pipe_v3_0_9=$RDI_DATADIR/xsim/ip/xbip_pipe_v3_0_9
+tsn_temac_v1_0_11=$RDI_DATADIR/xsim/ip/tsn_temac_v1_0_11
+lib_srl_fifo_v1_0_4=$RDI_DATADIR/xsim/ip/lib_srl_fifo_v1_0_4
+ecc_v2_0_16=$RDI_DATADIR/xsim/ip/ecc_v2_0_16
+mutex_v2_1_13=$RDI_DATADIR/xsim/ip/mutex_v2_1_13
+lmb_bram_if_cntlr_v4_0=$RDI_DATADIR/xsim/ip/lmb_bram_if_cntlr_v4_0
+ahblite_axi_bridge_v3_0_26=$RDI_DATADIR/xsim/ip/ahblite_axi_bridge_v3_0_26
+tmr_inject_v1_0_6=$RDI_DATADIR/xsim/ip/tmr_inject_v1_0_6
+qdriv_pl_phy_v1_0_2=$RDI_DATADIR/xsim/ip/qdriv_pl_phy_v1_0_2
+tcc_decoder_3gppmm_v2_0_27=$RDI_DATADIR/xsim/ip/tcc_decoder_3gppmm_v2_0_27
+ai_noc=$RDI_DATADIR/xsim/ip/ai_noc
+util_idelay_ctrl_v1_0_4=$RDI_DATADIR/xsim/ip/util_idelay_ctrl_v1_0_4
+noc2_nps_v1_0_0=$RDI_DATADIR/xsim/ip/noc2_nps_v1_0_0
+etrnic_v1_1_8=$RDI_DATADIR/xsim/ip/etrnic_v1_1_8
+axi_ahblite_bridge_v3_0_28=$RDI_DATADIR/xsim/ip/axi_ahblite_bridge_v3_0_28
+ieee802d3_50g_rs_fec_v1_0_24=$RDI_DATADIR/xsim/ip/ieee802d3_50g_rs_fec_v1_0_24
+noc_hbm_nmu_sim_v1_0_0=$RDI_DATADIR/xsim/ip/noc_hbm_nmu_sim_v1_0_0
+noc_npp_rptr_v1_0_0=$RDI_DATADIR/xsim/ip/noc_npp_rptr_v1_0_0
+dfx_decoupler_v1_0_9=$RDI_DATADIR/xsim/ip/dfx_decoupler_v1_0_9
+dsp_macro_v1_0_6=$RDI_DATADIR/xsim/ip/dsp_macro_v1_0_6
+cpm5n_v1_0_8=$RDI_DATADIR/xsim/ip/cpm5n_v1_0_8
+axi_dma_v7_1_32=$RDI_DATADIR/xsim/ip/axi_dma_v7_1_32
+sim_ipc_multi_intf_v1_0=$RDI_DATADIR/xsim/ip/sim_ipc_multi_intf_v1_0
+hdcp_v1_0_5=$RDI_DATADIR/xsim/ip/hdcp_v1_0_5
+axi_epc_v2_0_34=$RDI_DATADIR/xsim/ip/axi_epc_v2_0_34
+tmr_comparator_v1_0_7=$RDI_DATADIR/xsim/ip/tmr_comparator_v1_0_7
+v_warp_filter_v1_1_4=$RDI_DATADIR/xsim/ip/v_warp_filter_v1_1_4
+ai_pl=$RDI_DATADIR/xsim/ip/ai_pl
+xdfe_nlf_v1_1_1=$RDI_DATADIR/xsim/ip/xdfe_nlf_v1_1_1
+v_scenechange_v1_1_6=$RDI_DATADIR/xsim/ip/v_scenechange_v1_1_6
+vfb_v1_0_25=$RDI_DATADIR/xsim/ip/vfb_v1_0_25
+axis_interconnect_v1_1_23=$RDI_DATADIR/xsim/ip/axis_interconnect_v1_1_23
+xlconstant_v1_1_9=$RDI_DATADIR/xsim/ip/xlconstant_v1_1_9
+adc_dac_if_phy_v1_0_0=$RDI_DATADIR/xsim/ip/adc_dac_if_phy_v1_0_0
+mult_gen_v12_0_21=$RDI_DATADIR/xsim/ip/mult_gen_v12_0_21
+i2s_receiver_v1_0_8=$RDI_DATADIR/xsim/ip/i2s_receiver_v1_0_8
+qdriv_pl_v1_0_13=$RDI_DATADIR/xsim/ip/qdriv_pl_v1_0_13
+xbip_dsp48_wrapper_v3_0_6=$RDI_DATADIR/xsim/ip/xbip_dsp48_wrapper_v3_0_6
+lut_buffer_v2_0_1=$RDI_DATADIR/xsim/ip/lut_buffer_v2_0_1
+vid_phy_controller_v2_2_18=$RDI_DATADIR/xsim/ip/vid_phy_controller_v2_2_18
+advanced_io_wizard_phy_v1_0_3=$RDI_DATADIR/xsim/ip/advanced_io_wizard_phy_v1_0_3
+uhdsdi_gt_v2_1_4=$RDI_DATADIR/xsim/ip/uhdsdi_gt_v2_1_4
+axi_dbg_hub=$RDI_DATADIR/xsim/ip/axi_dbg_hub
+anlt_subcore_ip_v1_0_2=$RDI_DATADIR/xsim/ip/anlt_subcore_ip_v1_0_2
+xxv_ethernet_v4_1_10=$RDI_DATADIR/xsim/ip/xxv_ethernet_v4_1_10
+cdcam_v1_1_0=$RDI_DATADIR/xsim/ip/cdcam_v1_1_0
+pci32_v5_0_13=$RDI_DATADIR/xsim/ip/pci32_v5_0_13
+v_mix_v5_2_9=$RDI_DATADIR/xsim/ip/v_mix_v5_2_9
+pci64_v5_0_12=$RDI_DATADIR/xsim/ip/pci64_v5_0_12
+in_system_ibert_v1_0_22=$RDI_DATADIR/xsim/ip/in_system_ibert_v1_0_22
+proc_sys_reset_v5_0_15=$RDI_DATADIR/xsim/ip/proc_sys_reset_v5_0_15
+axis_dwidth_converter_v1_1_30=$RDI_DATADIR/xsim/ip/axis_dwidth_converter_v1_1_30
+sim_ddr_v1_0=$RDI_DATADIR/xsim/ip/sim_ddr_v1_0
+sim_qdma_cpp_v1_0=$RDI_DATADIR/xsim/ip/sim_qdma_cpp_v1_0
+axi_traffic_gen_v3_0_17=$RDI_DATADIR/xsim/ip/axi_traffic_gen_v3_0_17
+v_hdmi_rx_v3_0_4=$RDI_DATADIR/xsim/ip/v_hdmi_rx_v3_0_4
+xdfe_resampler_v1_0_9=$RDI_DATADIR/xsim/ip/xdfe_resampler_v1_0_9
+zynq_ultra_ps_e_v3_3_12=$RDI_DATADIR/xsim/ip/zynq_ultra_ps_e_v3_3_12
+axi_i3c_v1_0_0=$RDI_DATADIR/xsim/ip/axi_i3c_v1_0_0
+g709_rs_encoder_v2_2_12=$RDI_DATADIR/xsim/ip/g709_rs_encoder_v2_2_12
+xpm=$RDI_DATADIR/xsim/ip/xpm
+dptx_v1_0_4=$RDI_DATADIR/xsim/ip/dptx_v1_0_4
+v_axi4s_remap_v1_1_10=$RDI_DATADIR/xsim/ip/v_axi4s_remap_v1_1_10
+tri_mode_ethernet_mac_v9_0_32=$RDI_DATADIR/xsim/ip/tri_mode_ethernet_mac_v9_0_32
+xbip_bram18k_v3_0_9=$RDI_DATADIR/xsim/ip/xbip_bram18k_v3_0_9
+shell_utils_build_info_v2_0_0=$RDI_DATADIR/xsim/ip/shell_utils_build_info_v2_0_0
+cordic_v6_0_22=$RDI_DATADIR/xsim/ip/cordic_v6_0_22
+sim_xdma_cpp_v1=$RDI_DATADIR/xsim/ip/sim_xdma_cpp_v1
+axi_hbicap_v1_0_7=$RDI_DATADIR/xsim/ip/axi_hbicap_v1_0_7
+zynq_ultra_ps_e_vip_v1_0_17=$RDI_DATADIR/xsim/ip/zynq_ultra_ps_e_vip_v1_0_17
+gtwizard_ultrascale_v1_5_4=$RDI_DATADIR/xsim/ip/gtwizard_ultrascale_v1_5_4
+remote_port_c_v4=$RDI_DATADIR/xsim/ip/remote_port_c_v4
+axi_vdma_v6_3_19=$RDI_DATADIR/xsim/ip/axi_vdma_v6_3_19
+x5io_wizard_phy_v1_0_1=$RDI_DATADIR/xsim/ip/x5io_wizard_phy_v1_0_1
+tcc_encoder_3gpp_v5_0_22=$RDI_DATADIR/xsim/ip/tcc_encoder_3gpp_v5_0_22
+axis_combiner_v1_1_29=$RDI_DATADIR/xsim/ip/axis_combiner_v1_1_29
+microblaze_v9_5_5=$RDI_DATADIR/xsim/ip/microblaze_v9_5_5
+advanced_io_wizard_v1_0_13=$RDI_DATADIR/xsim/ip/advanced_io_wizard_v1_0_13
+lib_cdc_v1_0_3=$RDI_DATADIR/xsim/ip/lib_cdc_v1_0_3
+axis_ila_adv_trig_v1_0_1=$RDI_DATADIR/xsim/ip/axis_ila_adv_trig_v1_0_1
+qdma_v5_0_9=$RDI_DATADIR/xsim/ip/qdma_v5_0_9
+ddr4_pl_v1_0_14=$RDI_DATADIR/xsim/ip/ddr4_pl_v1_0_14
+noc_mc_ddr5_phy_v1_0_1=$RDI_DATADIR/xsim/ip/noc_mc_ddr5_phy_v1_0_1
+xtlm_simple_interconnect_v1_0=$RDI_DATADIR/xsim/ip/xtlm_simple_interconnect_v1_0
+axi_sg_v4_1_18=$RDI_DATADIR/xsim/ip/axi_sg_v4_1_18
+xdfe_cc_mixer_v2_0_4=$RDI_DATADIR/xsim/ip/xdfe_cc_mixer_v2_0_4
+processing_system7_vip_v1_0_19=$RDI_DATADIR/xsim/ip/processing_system7_vip_v1_0_19
+mipi_dsi_tx_ctrl_v1_0_9=$RDI_DATADIR/xsim/ip/mipi_dsi_tx_ctrl_v1_0_9
+microblaze_riscv_v1_0_2=$RDI_DATADIR/xsim/ip/microblaze_riscv_v1_0_2
+cpm4_v1_0_16=$RDI_DATADIR/xsim/ip/cpm4_v1_0_16
+xbip_multadd_v3_0_20=$RDI_DATADIR/xsim/ip/xbip_multadd_v3_0_20
+axis_data_fifo_v2_0_13=$RDI_DATADIR/xsim/ip/axis_data_fifo_v2_0_13
+ltlib_v1_0_2=$RDI_DATADIR/xsim/ip/ltlib_v1_0_2
+axis_switch_sc_v1_1=$RDI_DATADIR/xsim/ip/axis_switch_sc_v1_1
+sim_clk_gen_v1_0_4=$RDI_DATADIR/xsim/ip/sim_clk_gen_v1_0_4
+xdfe_fft_v1_0_7=$RDI_DATADIR/xsim/ip/xdfe_fft_v1_0_7
+hsdp_trace_v2_0_2=$RDI_DATADIR/xsim/ip/hsdp_trace_v2_0_2
+blk_mem_gen_v8_4_8=$RDI_DATADIR/xsim/ip/blk_mem_gen_v8_4_8
+cam_blk_lib_v1_1_0=$RDI_DATADIR/xsim/ip/cam_blk_lib_v1_1_0
+tmr_voter_v1_0_6=$RDI_DATADIR/xsim/ip/tmr_voter_v1_0_6
+util_ff_v1_0_3=$RDI_DATADIR/xsim/ip/util_ff_v1_0_3
+interrupt_control_v3_1_5=$RDI_DATADIR/xsim/ip/interrupt_control_v3_1_5
+xdfe_ofdm_v2_1_0=$RDI_DATADIR/xsim/ip/xdfe_ofdm_v2_1_0
+audio_clock_recovery_unit_v1_0_4=$RDI_DATADIR/xsim/ip/audio_clock_recovery_unit_v1_0_4
+ten_gig_eth_mac_v15_1_12=$RDI_DATADIR/xsim/ip/ten_gig_eth_mac_v15_1_12
+axi_protocol_converter_v2_1_31=$RDI_DATADIR/xsim/ip/axi_protocol_converter_v2_1_31
+xbip_dsp48_mult_v3_0_9=$RDI_DATADIR/xsim/ip/xbip_dsp48_mult_v3_0_9
+tmr_sem_v1_0_26=$RDI_DATADIR/xsim/ip/tmr_sem_v1_0_26
+v_frmbuf_rd_v2_4_3=$RDI_DATADIR/xsim/ip/v_frmbuf_rd_v2_4_3
+cmpy_v6_0_24=$RDI_DATADIR/xsim/ip/cmpy_v6_0_24
+ta_dma_v1_0_15=$RDI_DATADIR/xsim/ip/ta_dma_v1_0_15
+v_tpg_v8_0_14=$RDI_DATADIR/xsim/ip/v_tpg_v8_0_14
+axi_tlm_ext_v1_0=$RDI_DATADIR/xsim/ip/axi_tlm_ext_v1_0
+axi_iic_v2_1_7=$RDI_DATADIR/xsim/ip/axi_iic_v2_1_7
+c_addsub_v12_0_18=$RDI_DATADIR/xsim/ip/c_addsub_v12_0_18
+audio_tpg_v1_0_2=$RDI_DATADIR/xsim/ip/audio_tpg_v1_0_2
+axi_tg_sc_v1_0=$RDI_DATADIR/xsim/ip/axi_tg_sc_v1_0
+v_vid_sdi_tx_bridge_v2_0_2=$RDI_DATADIR/xsim/ip/v_vid_sdi_tx_bridge_v2_0_2
+noc_nsu_sim_v1_0_0=$RDI_DATADIR/xsim/ip/noc_nsu_sim_v1_0_0
+axi_register_slice_v2_1_31=$RDI_DATADIR/xsim/ip/axi_register_slice_v2_1_31
+axis_switch_v1_1_31=$RDI_DATADIR/xsim/ip/axis_switch_v1_1_31
+axi_stream_monitor_v1_1_1=$RDI_DATADIR/xsim/ip/axi_stream_monitor_v1_1_1
+v_uhdsdi_vidgen_v1_0_3=$RDI_DATADIR/xsim/ip/v_uhdsdi_vidgen_v1_0_3
+bscan_jtag=$RDI_DATADIR/xsim/ip/bscan_jtag
+audio_formatter_v1_0_13=$RDI_DATADIR/xsim/ip/audio_formatter_v1_0_13
+axis_vio_v1_0_11=$RDI_DATADIR/xsim/ip/axis_vio_v1_0_11
+interlaken_v2_4_17=$RDI_DATADIR/xsim/ip/interlaken_v2_4_17
+axis_register_slice_v1_1_31=$RDI_DATADIR/xsim/ip/axis_register_slice_v1_1_31
+remote_port_sc_v4=$RDI_DATADIR/xsim/ip/remote_port_sc_v4
+hdcp22_cipher_v1_0_5=$RDI_DATADIR/xsim/ip/hdcp22_cipher_v1_0_5
+picxo_fracxo_v2_0_2=$RDI_DATADIR/xsim/ip/picxo_fracxo_v2_0_2
+xdma_v4_1_29=$RDI_DATADIR/xsim/ip/xdma_v4_1_29
+accelerator_monitor_v1_1_0=$RDI_DATADIR/xsim/ip/accelerator_monitor_v1_1_0
+noc_nps6_v1_0_0=$RDI_DATADIR/xsim/ip/noc_nps6_v1_0_0
+roe_framer_v3_0_8=$RDI_DATADIR/xsim/ip/roe_framer_v3_0_8
+g975_efec_i7_v2_0_23=$RDI_DATADIR/xsim/ip/g975_efec_i7_v2_0_23
+quadsgmii_v3_5_18=$RDI_DATADIR/xsim/ip/quadsgmii_v3_5_18
+axi_ethernet_buffer_v2_0_25=$RDI_DATADIR/xsim/ip/axi_ethernet_buffer_v2_0_25
+fit_timer_v2_0_12=$RDI_DATADIR/xsim/ip/fit_timer_v2_0_12
+bsip_v1_1_1=$RDI_DATADIR/xsim/ip/bsip_v1_1_1
+lmb_v10_v3_0=$RDI_DATADIR/xsim/ip/lmb_v10_v3_0
+mailbox_v2_1_17=$RDI_DATADIR/xsim/ip/mailbox_v2_1_17
+v_vscaler_v1_1_11=$RDI_DATADIR/xsim/ip/v_vscaler_v1_1_11
+fifo_generator_v13_0_7=$RDI_DATADIR/xsim/ip/fifo_generator_v13_0_7
+av_pat_gen_v1_0_2=$RDI_DATADIR/xsim/ip/av_pat_gen_v1_0_2
+v_frmbuf_rd_v2_5_2=$RDI_DATADIR/xsim/ip/v_frmbuf_rd_v2_5_2
+mipi_rx_phy_v1_0_0=$RDI_DATADIR/xsim/ip/mipi_rx_phy_v1_0_0
+gig_ethernet_pcs_pma_v16_2_18=$RDI_DATADIR/xsim/ip/gig_ethernet_pcs_pma_v16_2_18
+noc2_nmu_v1_0_1=$RDI_DATADIR/xsim/ip/noc2_nmu_v1_0_1
+ats_switch_v1_0_10=$RDI_DATADIR/xsim/ip/ats_switch_v1_0_10
+axi_ethernetlite_v3_0_30=$RDI_DATADIR/xsim/ip/axi_ethernetlite_v3_0_30
+axis_mu_v1_0_1=$RDI_DATADIR/xsim/ip/axis_mu_v1_0_1
+vby1hs_v1_0_5=$RDI_DATADIR/xsim/ip/vby1hs_v1_0_5
+noc_sc_v1_0_0=$RDI_DATADIR/xsim/ip/noc_sc_v1_0_0
+convolution_v9_0_20=$RDI_DATADIR/xsim/ip/convolution_v9_0_20
+axi4stream_vip_v1_1_17=$RDI_DATADIR/xsim/ip/axi4stream_vip_v1_1_17
+axis_subset_converter_v1_1_31=$RDI_DATADIR/xsim/ip/axis_subset_converter_v1_1_31
+srio_gen2_v4_1_19=$RDI_DATADIR/xsim/ip/srio_gen2_v4_1_19
+lib_bmg_v1_0_17=$RDI_DATADIR/xsim/ip/lib_bmg_v1_0_17
+system_cache_v5_0_11=$RDI_DATADIR/xsim/ip/system_cache_v5_0_11
+dp_videoaxi4s_bridge_v1_0_3=$RDI_DATADIR/xsim/ip/dp_videoaxi4s_bridge_v1_0_3
+sid_v8_0_21=$RDI_DATADIR/xsim/ip/sid_v8_0_21
+blk_mem_gen_v8_3_7=$RDI_DATADIR/xsim/ip/blk_mem_gen_v8_3_7
+noc2_sc_v1_0_0=$RDI_DATADIR/xsim/ip/noc2_sc_v1_0_0
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xsim.ini.bak b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.ini.bak
new file mode 100644
index 0000000000000000000000000000000000000000..65c1bae3d8499ab13e863c8b22ed50ca77e3133e
--- /dev/null
+++ b/proj/AudioProc.sim/sim_1/behav/xsim/xsim.ini.bak
@@ -0,0 +1,490 @@
+std=$RDI_DATADIR/xsim/vhdl/std
+ieee=$RDI_DATADIR/xsim/vhdl/ieee
+ieee_proposed=$RDI_DATADIR/xsim/vhdl/ieee_proposed
+vl=$RDI_DATADIR/xsim/vhdl/vl
+synopsys=$RDI_DATADIR/xsim/vhdl/synopsys
+uvm=$RDI_DATADIR/xsim/system_verilog/uvm
+secureip=$RDI_DATADIR/xsim/verilog/secureip
+unisim=$RDI_DATADIR/xsim/vhdl/unisim
+unimacro=$RDI_DATADIR/xsim/vhdl/unimacro
+unifast=$RDI_DATADIR/xsim/vhdl/unifast
+unisims_ver=$RDI_DATADIR/xsim/verilog/unisims_ver
+unimacro_ver=$RDI_DATADIR/xsim/verilog/unimacro_ver
+unifast_ver=$RDI_DATADIR/xsim/verilog/unifast_ver
+simprims_ver=$RDI_DATADIR/xsim/verilog/simprims_ver
+axi_epu_v1_0_4=$RDI_DATADIR/xsim/ip/axi_epu_v1_0_4
+xlconcat_v2_1_6=$RDI_DATADIR/xsim/ip/xlconcat_v2_1_6
+emb_fifo_gen_v1_0_5=$RDI_DATADIR/xsim/ip/emb_fifo_gen_v1_0_5
+mipi_csi2_tx_ctrl_v1_0_6=$RDI_DATADIR/xsim/ip/mipi_csi2_tx_ctrl_v1_0_6
+c_mux_bit_v12_0_9=$RDI_DATADIR/xsim/ip/c_mux_bit_v12_0_9
+smartconnect_v1_0=$RDI_DATADIR/xsim/ip/smartconnect_v1_0
+v_smpte_uhdsdi_tx_v1_0_4=$RDI_DATADIR/xsim/ip/v_smpte_uhdsdi_tx_v1_0_4
+cam_v3_0_0=$RDI_DATADIR/xsim/ip/cam_v3_0_0
+microblaze_v11_0_13=$RDI_DATADIR/xsim/ip/microblaze_v11_0_13
+axi_fifo_mm_s_v4_3_3=$RDI_DATADIR/xsim/ip/axi_fifo_mm_s_v4_3_3
+v_hdmi_rx1_v1_0_9=$RDI_DATADIR/xsim/ip/v_hdmi_rx1_v1_0_9
+video_frame_crc_v1_0_6=$RDI_DATADIR/xsim/ip/video_frame_crc_v1_0_6
+hdcp22_cipher_dp_v1_0_2=$RDI_DATADIR/xsim/ip/hdcp22_cipher_dp_v1_0_2
+generic_baseblocks_v2_1_2=$RDI_DATADIR/xsim/ip/generic_baseblocks_v2_1_2
+axis_clock_converter_v1_1_32=$RDI_DATADIR/xsim/ip/axis_clock_converter_v1_1_32
+psx_vip_v1_0_4=$RDI_DATADIR/xsim/ip/psx_vip_v1_0_4
+g975_efec_i4_v1_0_22=$RDI_DATADIR/xsim/ip/g975_efec_i4_v1_0_22
+axi_lite_ipif_v3_0_4=$RDI_DATADIR/xsim/ip/axi_lite_ipif_v3_0_4
+axis_dbg_stub_v1_0_1=$RDI_DATADIR/xsim/ip/axis_dbg_stub_v1_0_1
+ethernet_1_10_25g_v2_7_15=$RDI_DATADIR/xsim/ip/ethernet_1_10_25g_v2_7_15
+an_lt_v1_0_12=$RDI_DATADIR/xsim/ip/an_lt_v1_0_12
+hdmi_gt_controller_v1_0_13=$RDI_DATADIR/xsim/ip/hdmi_gt_controller_v1_0_13
+axi_cdma_v4_1_31=$RDI_DATADIR/xsim/ip/axi_cdma_v4_1_31
+xilinx_vip=$RDI_DATADIR/xsim/ip/xilinx_vip
+videoaxi4s_bridge_v1_0_7=$RDI_DATADIR/xsim/ip/videoaxi4s_bridge_v1_0_7
+mdm_riscv_v1_0_2=$RDI_DATADIR/xsim/ip/mdm_riscv_v1_0_2
+axi_uartlite_v2_0_35=$RDI_DATADIR/xsim/ip/axi_uartlite_v2_0_35
+axi_perf_mon_v5_0_33=$RDI_DATADIR/xsim/ip/axi_perf_mon_v5_0_33
+axi_master_burst_v2_0_9=$RDI_DATADIR/xsim/ip/axi_master_burst_v2_0_9
+aie_ps_v1_0=$RDI_DATADIR/xsim/ip/aie_ps_v1_0
+ibert_lib_v1_0_11=$RDI_DATADIR/xsim/ip/ibert_lib_v1_0_11
+axi_datamover_v5_1_33=$RDI_DATADIR/xsim/ip/axi_datamover_v5_1_33
+noc_nps4_v1_0_0=$RDI_DATADIR/xsim/ip/noc_nps4_v1_0_0
+xbip_dsp48_addsub_v3_0_9=$RDI_DATADIR/xsim/ip/xbip_dsp48_addsub_v3_0_9
+v_axi4s_vid_out_v4_0_18=$RDI_DATADIR/xsim/ip/v_axi4s_vid_out_v4_0_18
+axi_chip2chip_v5_0_22=$RDI_DATADIR/xsim/ip/axi_chip2chip_v5_0_22
+gtwizard_ultrascale_v1_7_18=$RDI_DATADIR/xsim/ip/gtwizard_ultrascale_v1_7_18
+axi_infrastructure_v1_1_0=$RDI_DATADIR/xsim/ip/axi_infrastructure_v1_1_0
+switch_core_top_v1_0_16=$RDI_DATADIR/xsim/ip/switch_core_top_v1_0_16
+vitis_net_p4_v2_1_0=$RDI_DATADIR/xsim/ip/vitis_net_p4_v2_1_0
+axi_sideband_util_v1_0_15=$RDI_DATADIR/xsim/ip/axi_sideband_util_v1_0_15
+axis_infrastructure_v1_1_1=$RDI_DATADIR/xsim/ip/axis_infrastructure_v1_1_1
+dist_mem_gen_v8_0_15=$RDI_DATADIR/xsim/ip/dist_mem_gen_v8_0_15
+shell_utils_addr_remap_v1_0_10=$RDI_DATADIR/xsim/ip/shell_utils_addr_remap_v1_0_10
+xbip_addsub_v3_0_9=$RDI_DATADIR/xsim/ip/xbip_addsub_v3_0_9
+dds_compiler_v6_0_25=$RDI_DATADIR/xsim/ip/dds_compiler_v6_0_25
+bscan_axi_v1_0_2=$RDI_DATADIR/xsim/ip/bscan_axi_v1_0_2
+fifo_generator_v13_2_10=$RDI_DATADIR/xsim/ip/fifo_generator_v13_2_10
+dprx_fec_8b10b_v1_0_3=$RDI_DATADIR/xsim/ip/dprx_fec_8b10b_v1_0_3
+pcie_axi4lite_tap_v1_0_2=$RDI_DATADIR/xsim/ip/pcie_axi4lite_tap_v1_0_2
+av_pat_gen_v2_0_2=$RDI_DATADIR/xsim/ip/av_pat_gen_v2_0_2
+polar_v1_1_4=$RDI_DATADIR/xsim/ip/polar_v1_1_4
+v_tpg_v8_2_5=$RDI_DATADIR/xsim/ip/v_tpg_v8_2_5
+tcc_encoder_3gpplte_v4_0_19=$RDI_DATADIR/xsim/ip/tcc_encoder_3gpplte_v4_0_19
+axis_accelerator_adapter_v2_1_18=$RDI_DATADIR/xsim/ip/axis_accelerator_adapter_v2_1_18
+mem_pl_v1_0_2=$RDI_DATADIR/xsim/ip/mem_pl_v1_0_2
+perf_axi_tg_v1_0_13=$RDI_DATADIR/xsim/ip/perf_axi_tg_v1_0_13
+trace_hub_v1_1_0=$RDI_DATADIR/xsim/ip/trace_hub_v1_1_0
+axi_pcie_v2_9_11=$RDI_DATADIR/xsim/ip/axi_pcie_v2_9_11
+axi_emc_v3_0_31=$RDI_DATADIR/xsim/ip/axi_emc_v3_0_31
+tsn_endpoint_ethernet_mac_block_v1_0_16=$RDI_DATADIR/xsim/ip/tsn_endpoint_ethernet_mac_block_v1_0_16
+soft_ecc_proxy_v1_1_1=$RDI_DATADIR/xsim/ip/soft_ecc_proxy_v1_1_1
+axi_apb_bridge_v3_0_20=$RDI_DATADIR/xsim/ip/axi_apb_bridge_v3_0_20
+axis_broadcaster_v1_1_30=$RDI_DATADIR/xsim/ip/axis_broadcaster_v1_1_30
+axis_dwidth_converter_sc_v1_1=$RDI_DATADIR/xsim/ip/axis_dwidth_converter_sc_v1_1
+vid_edid_v1_0_2=$RDI_DATADIR/xsim/ip/vid_edid_v1_0_2
+noc_nidb_v1_0_0=$RDI_DATADIR/xsim/ip/noc_nidb_v1_0_0
+v_vid_in_axi4s_v5_0_4=$RDI_DATADIR/xsim/ip/v_vid_in_axi4s_v5_0_4
+v_dual_splitter_v1_0_11=$RDI_DATADIR/xsim/ip/v_dual_splitter_v1_0_11
+axis_ila_txns_cntr_v1_0_0=$RDI_DATADIR/xsim/ip/axis_ila_txns_cntr_v1_0_0
+pl_fileio_v1_0_0=$RDI_DATADIR/xsim/ip/pl_fileio_v1_0_0
+msm_cpp=$RDI_DATADIR/xsim/ip/msm_cpp
+debug_tcp_server_v1=$RDI_DATADIR/xsim/ip/debug_tcp_server_v1
+v_frmbuf_wr_v2_5_2=$RDI_DATADIR/xsim/ip/v_frmbuf_wr_v2_5_2
+v_smpte_uhdsdi_rx_v1_0_3=$RDI_DATADIR/xsim/ip/v_smpte_uhdsdi_rx_v1_0_3
+mpegtsmux_v1_1_9=$RDI_DATADIR/xsim/ip/mpegtsmux_v1_1_9
+noc_nps_v1_0_1=$RDI_DATADIR/xsim/ip/noc_nps_v1_0_1
+v_multi_scaler_v1_2_6=$RDI_DATADIR/xsim/ip/v_multi_scaler_v1_2_6
+x5io_wizard_v1_0_4=$RDI_DATADIR/xsim/ip/x5io_wizard_v1_0_4
+axi_remapper_rx_v1_0_2=$RDI_DATADIR/xsim/ip/axi_remapper_rx_v1_0_2
+emu_perf_common_v1_0=$RDI_DATADIR/xsim/ip/emu_perf_common_v1_0
+sem_ultra_v3_1_26=$RDI_DATADIR/xsim/ip/sem_ultra_v3_1_26
+axi_utils_v2_0_9=$RDI_DATADIR/xsim/ip/axi_utils_v2_0_9
+v_tc_v6_2_8=$RDI_DATADIR/xsim/ip/v_tc_v6_2_8
+ieee802d3_clause74_fec_v1_0_18=$RDI_DATADIR/xsim/ip/ieee802d3_clause74_fec_v1_0_18
+jesd204c_v4_2_14=$RDI_DATADIR/xsim/ip/jesd204c_v4_2_14
+xtlm=$RDI_DATADIR/xsim/ip/xtlm
+hdmi_acr_ctrl_v1_0_3=$RDI_DATADIR/xsim/ip/hdmi_acr_ctrl_v1_0_3
+icap_arb_v1_0_2=$RDI_DATADIR/xsim/ip/icap_arb_v1_0_2
+nvme_tc_v3_0_6=$RDI_DATADIR/xsim/ip/nvme_tc_v3_0_6
+axi4svideo_bridge_v1_0_18=$RDI_DATADIR/xsim/ip/axi4svideo_bridge_v1_0_18
+jtag_axi=$RDI_DATADIR/xsim/ip/jtag_axi
+axi_intc_v4_1_19=$RDI_DATADIR/xsim/ip/axi_intc_v4_1_19
+v_demosaic_v1_1_11=$RDI_DATADIR/xsim/ip/v_demosaic_v1_1_11
+pcie_jtag_v1_0_1=$RDI_DATADIR/xsim/ip/pcie_jtag_v1_0_1
+xlslice_v1_0_4=$RDI_DATADIR/xsim/ip/xlslice_v1_0_4
+axi_vfifo_ctrl_v2_0_34=$RDI_DATADIR/xsim/ip/axi_vfifo_ctrl_v2_0_34
+gmii_to_rgmii_v4_1_14=$RDI_DATADIR/xsim/ip/gmii_to_rgmii_v4_1_14
+util_reduced_logic_v2_0_6=$RDI_DATADIR/xsim/ip/util_reduced_logic_v2_0_6
+nvmeha_v1_0_12=$RDI_DATADIR/xsim/ip/nvmeha_v1_0_12
+axi_c2c_v1_0_9=$RDI_DATADIR/xsim/ip/axi_c2c_v1_0_9
+ft_prach_v1_2_2=$RDI_DATADIR/xsim/ip/ft_prach_v1_2_2
+v_smpte_uhdsdi_v1_0_11=$RDI_DATADIR/xsim/ip/v_smpte_uhdsdi_v1_0_11
+axi_pmon_v1_0_1=$RDI_DATADIR/xsim/ip/axi_pmon_v1_0_1
+gtwizard_ultrascale_v1_6_16=$RDI_DATADIR/xsim/ip/gtwizard_ultrascale_v1_6_16
+gigantic_mux=$RDI_DATADIR/xsim/ip/gigantic_mux
+displayport_v7_0_24=$RDI_DATADIR/xsim/ip/displayport_v7_0_24
+msm_adapters=$RDI_DATADIR/xsim/ip/msm_adapters
+v_frmbuf_wr_v2_2_10=$RDI_DATADIR/xsim/ip/v_frmbuf_wr_v2_2_10
+fast_adapter_v1_0_8=$RDI_DATADIR/xsim/ip/fast_adapter_v1_0_8
+rst_vip_v1_0_6=$RDI_DATADIR/xsim/ip/rst_vip_v1_0_6
+v_hdmi_phy1_v1_0_12=$RDI_DATADIR/xsim/ip/v_hdmi_phy1_v1_0_12
+pcie_qdma_mailbox_v1_0_5=$RDI_DATADIR/xsim/ip/pcie_qdma_mailbox_v1_0_5
+pr_decoupler_v1_0_11=$RDI_DATADIR/xsim/ip/pr_decoupler_v1_0_11
+v_hdmi_tx1_v1_0_8=$RDI_DATADIR/xsim/ip/v_hdmi_tx1_v1_0_8
+processing_system7_v5_5_6=$RDI_DATADIR/xsim/ip/processing_system7_v5_5_6
+axis_cap_ctrl_v1_0_1=$RDI_DATADIR/xsim/ip/axis_cap_ctrl_v1_0_1
+common_rpc_v1=$RDI_DATADIR/xsim/ip/common_rpc_v1
+xtlm_ipc_v1_0=$RDI_DATADIR/xsim/ip/xtlm_ipc_v1_0
+v_tpg_v8_1_10=$RDI_DATADIR/xsim/ip/v_tpg_v8_1_10
+v_hcresampler_v1_1_11=$RDI_DATADIR/xsim/ip/v_hcresampler_v1_1_11
+axi_interface_monitor_v1_1_0=$RDI_DATADIR/xsim/ip/axi_interface_monitor_v1_1_0
+axi_intc_v4_1=$RDI_DATADIR/xsim/ip/axi_intc_v4_1
+mammoth_transcode_v1_0_2=$RDI_DATADIR/xsim/ip/mammoth_transcode_v1_0_2
+axi_timebase_wdt_v3_0_23=$RDI_DATADIR/xsim/ip/axi_timebase_wdt_v3_0_23
+floating_point_v7_0_23=$RDI_DATADIR/xsim/ip/floating_point_v7_0_23
+displayport_v9_0_9=$RDI_DATADIR/xsim/ip/displayport_v9_0_9
+noc_hbm_v1_0_0=$RDI_DATADIR/xsim/ip/noc_hbm_v1_0_0
+versal_cips_ps_vip_v1_0_9=$RDI_DATADIR/xsim/ip/versal_cips_ps_vip_v1_0_9
+amm_axi_bridge_v1_0_17=$RDI_DATADIR/xsim/ip/amm_axi_bridge_v1_0_17
+v_vid_gt_bridge_v2_0_5=$RDI_DATADIR/xsim/ip/v_vid_gt_bridge_v2_0_5
+v_gamma_lut_v1_1_11=$RDI_DATADIR/xsim/ip/v_gamma_lut_v1_1_11
+rld3_pl_v1_0_14=$RDI_DATADIR/xsim/ip/rld3_pl_v1_0_14
+l_ethernet_v3_3_10=$RDI_DATADIR/xsim/ip/l_ethernet_v3_3_10
+ernic_v4_0_3=$RDI_DATADIR/xsim/ip/ernic_v4_0_3
+fec_5g_common_v1_1_4=$RDI_DATADIR/xsim/ip/fec_5g_common_v1_1_4
+sim_qdma_sc_v1_0=$RDI_DATADIR/xsim/ip/sim_qdma_sc_v1_0
+dfx_bitstream_monitor_v1_0_5=$RDI_DATADIR/xsim/ip/dfx_bitstream_monitor_v1_0_5
+axi_mmu_v2_1_29=$RDI_DATADIR/xsim/ip/axi_mmu_v2_1_29
+v_sdi_rx_vid_bridge_v2_0_2=$RDI_DATADIR/xsim/ip/v_sdi_rx_vid_bridge_v2_0_2
+v_csc_v1_1_11=$RDI_DATADIR/xsim/ip/v_csc_v1_1_11
+usxgmii_v1_2_17=$RDI_DATADIR/xsim/ip/usxgmii_v1_2_17
+trace_s2mm_v2_0_1=$RDI_DATADIR/xsim/ip/trace_s2mm_v2_0_1
+ieee802d3_rs_fec_v2_0_22=$RDI_DATADIR/xsim/ip/ieee802d3_rs_fec_v2_0_22
+v_hdmi_tx_v3_0_4=$RDI_DATADIR/xsim/ip/v_hdmi_tx_v3_0_4
+ldpc_5gnr_v1_0_3=$RDI_DATADIR/xsim/ip/ldpc_5gnr_v1_0_3
+rama_v1_1_17_lib=$RDI_DATADIR/xsim/ip/rama_v1_1_17_lib
+rs_decoder_v9_0_22=$RDI_DATADIR/xsim/ip/rs_decoder_v9_0_22
+ieee802d3_400g_rs_fec_v3_0_2=$RDI_DATADIR/xsim/ip/ieee802d3_400g_rs_fec_v3_0_2
+xscl=$RDI_DATADIR/xsim/ip/xscl
+iomodule_v3_1_10=$RDI_DATADIR/xsim/ip/iomodule_v3_1_10
+axis_mem_v1_0_2=$RDI_DATADIR/xsim/ip/axis_mem_v1_0_2
+axi_tft_v2_0_28=$RDI_DATADIR/xsim/ip/axi_tft_v2_0_28
+fc32_rs_fec_v1_0_27=$RDI_DATADIR/xsim/ip/fc32_rs_fec_v1_0_27
+axi_remapper_tx_v1_0_2=$RDI_DATADIR/xsim/ip/axi_remapper_tx_v1_0_2
+dfx_axi_shutdown_manager_v1_0_3=$RDI_DATADIR/xsim/ip/dfx_axi_shutdown_manager_v1_0_3
+util_vector_logic_v2_0_4=$RDI_DATADIR/xsim/ip/util_vector_logic_v2_0_4
+axis_ila_intf_v1_0_2=$RDI_DATADIR/xsim/ip/axis_ila_intf_v1_0_2
+axi_amm_bridge_v1_0_21=$RDI_DATADIR/xsim/ip/axi_amm_bridge_v1_0_21
+xpm_cdc_gen_v1_0_4=$RDI_DATADIR/xsim/ip/xpm_cdc_gen_v1_0_4
+c_accum_v12_0_18=$RDI_DATADIR/xsim/ip/c_accum_v12_0_18
+cmac_v2_6_15=$RDI_DATADIR/xsim/ip/cmac_v2_6_15
+axi_firewall_v1_2_6=$RDI_DATADIR/xsim/ip/axi_firewall_v1_2_6
+dft_v4_2_8=$RDI_DATADIR/xsim/ip/dft_v4_2_8
+ernic_v3_1_5=$RDI_DATADIR/xsim/ip/ernic_v3_1_5
+xsdbs_v1_0_4=$RDI_DATADIR/xsim/ip/xsdbs_v1_0_4
+stm_v1_0=$RDI_DATADIR/xsim/ip/stm_v1_0
+axi_timer_v2_0_33=$RDI_DATADIR/xsim/ip/axi_timer_v2_0_33
+lmb_v10_v3_0_14=$RDI_DATADIR/xsim/ip/lmb_v10_v3_0_14
+v_deinterlacer_v5_1_4=$RDI_DATADIR/xsim/ip/v_deinterlacer_v5_1_4
+axis_data_fifo_v1_1_32=$RDI_DATADIR/xsim/ip/axis_data_fifo_v1_1_32
+hw_trace=$RDI_DATADIR/xsim/ip/hw_trace
+sim_xdma_sc_v1=$RDI_DATADIR/xsim/ip/sim_xdma_sc_v1
+axi_vip_v1_1_17=$RDI_DATADIR/xsim/ip/axi_vip_v1_1_17
+mipi_dphy_v4_3_11=$RDI_DATADIR/xsim/ip/mipi_dphy_v4_3_11
+ieee802d3_50g_rs_fec_v2_0_17=$RDI_DATADIR/xsim/ip/ieee802d3_50g_rs_fec_v2_0_17
+xdfe_equalizer_v1_0_9=$RDI_DATADIR/xsim/ip/xdfe_equalizer_v1_0_9
+flexo_100g_rs_fec_v1_0_28=$RDI_DATADIR/xsim/ip/flexo_100g_rs_fec_v1_0_28
+v_uhdsdi_audio_v2_0_8=$RDI_DATADIR/xsim/ip/v_uhdsdi_audio_v2_0_8
+v_tc_v6_1_14=$RDI_DATADIR/xsim/ip/v_tc_v6_1_14
+ddr4_pl_phy_v1_0_2=$RDI_DATADIR/xsim/ip/ddr4_pl_phy_v1_0_2
+sem_v4_1_15=$RDI_DATADIR/xsim/ip/sem_v4_1_15
+c_shift_ram_v12_0_17=$RDI_DATADIR/xsim/ip/c_shift_ram_v12_0_17
+lib_pkg_v1_0_4=$RDI_DATADIR/xsim/ip/lib_pkg_v1_0_4
+bs_switch_v1_0_4=$RDI_DATADIR/xsim/ip/bs_switch_v1_0_4
+shell_utils_msp432_bsl_crc_gen_v1_0_2=$RDI_DATADIR/xsim/ip/shell_utils_msp432_bsl_crc_gen_v1_0_2
+axis_dbg_sync_v1_0_1=$RDI_DATADIR/xsim/ip/axis_dbg_sync_v1_0_1
+high_speed_selectio_wiz_v3_6_9=$RDI_DATADIR/xsim/ip/high_speed_selectio_wiz_v3_6_9
+emc_common_v3_0_7=$RDI_DATADIR/xsim/ip/emc_common_v3_0_7
+fir_compiler_v7_2_22=$RDI_DATADIR/xsim/ip/fir_compiler_v7_2_22
+microblaze_mcs_v2_3_7=$RDI_DATADIR/xsim/ip/microblaze_mcs_v2_3_7
+oran_radio_if_v3_2_0=$RDI_DATADIR/xsim/ip/oran_radio_if_v3_2_0
+i2s_transmitter_v1_0_8=$RDI_DATADIR/xsim/ip/i2s_transmitter_v1_0_8
+floating_point_v7_1_18=$RDI_DATADIR/xsim/ip/floating_point_v7_1_18
+sim_trig_v1_0_12=$RDI_DATADIR/xsim/ip/sim_trig_v1_0_12
+hbm2e_pl_v1_0_1=$RDI_DATADIR/xsim/ip/hbm2e_pl_v1_0_1
+axis_protocol_checker_v2_0_15=$RDI_DATADIR/xsim/ip/axis_protocol_checker_v2_0_15
+vitis_deadlock_detector_v1_0_2=$RDI_DATADIR/xsim/ip/vitis_deadlock_detector_v1_0_2
+axi_msg_v1_0_11=$RDI_DATADIR/xsim/ip/axi_msg_v1_0_11
+c_compare_v12_0_9=$RDI_DATADIR/xsim/ip/c_compare_v12_0_9
+c_mux_bus_v12_0_9=$RDI_DATADIR/xsim/ip/c_mux_bus_v12_0_9
+xsdbm_v3_0_2=$RDI_DATADIR/xsim/ip/xsdbm_v3_0_2
+rld3_pl_phy_v1_0_2=$RDI_DATADIR/xsim/ip/rld3_pl_phy_v1_0_2
+mpram_v1_0_4=$RDI_DATADIR/xsim/ip/mpram_v1_0_4
+oddr_v1_0_4=$RDI_DATADIR/xsim/ip/oddr_v1_0_4
+bs_mux_v1_0_1=$RDI_DATADIR/xsim/ip/bs_mux_v1_0_1
+ptp_1588_timer_syncer_v2_0_6=$RDI_DATADIR/xsim/ip/ptp_1588_timer_syncer_v2_0_6
+dfx_controller_v1_0_7=$RDI_DATADIR/xsim/ip/dfx_controller_v1_0_7
+noc_ncrb_v1_0_0=$RDI_DATADIR/xsim/ip/noc_ncrb_v1_0_0
+rs_toolbox_v9_0_13=$RDI_DATADIR/xsim/ip/rs_toolbox_v9_0_13
+pc_cfr_v8_0_2=$RDI_DATADIR/xsim/ip/pc_cfr_v8_0_2
+multi_channel_25g_rs_fec_v1_0_26=$RDI_DATADIR/xsim/ip/multi_channel_25g_rs_fec_v1_0_26
+lmb_bram_if_cntlr_v4_0_24=$RDI_DATADIR/xsim/ip/lmb_bram_if_cntlr_v4_0_24
+hdcp_keymngmt_blk_v1_0_2=$RDI_DATADIR/xsim/ip/hdcp_keymngmt_blk_v1_0_2
+axi_lite_ipif_v3_0=$RDI_DATADIR/xsim/ip/axi_lite_ipif_v3_0
+compact_gt_v1_0_17=$RDI_DATADIR/xsim/ip/compact_gt_v1_0_17
+v_vcresampler_v1_1_11=$RDI_DATADIR/xsim/ip/v_vcresampler_v1_1_11
+mipi_dsi2_rx_ctrl_v1_0_0=$RDI_DATADIR/xsim/ip/mipi_dsi2_rx_ctrl_v1_0_0
+axi_quad_spi_v3_2_30=$RDI_DATADIR/xsim/ip/axi_quad_spi_v3_2_30
+div_gen_v5_1_22=$RDI_DATADIR/xsim/ip/div_gen_v5_1_22
+v_frmbuf_rd_v2_2_10=$RDI_DATADIR/xsim/ip/v_frmbuf_rd_v2_2_10
+can_v5_1_3=$RDI_DATADIR/xsim/ip/can_v5_1_3
+axi_pcie3_v3_0_30=$RDI_DATADIR/xsim/ip/axi_pcie3_v3_0_30
+emb_mem_gen_v1_0_9=$RDI_DATADIR/xsim/ip/emb_mem_gen_v1_0_9
+noc2_xbr2x4_v1_0_0=$RDI_DATADIR/xsim/ip/noc2_xbr2x4_v1_0_0
+xbip_counter_v3_0_9=$RDI_DATADIR/xsim/ip/xbip_counter_v3_0_9
+axi_jtag_v1_0_2=$RDI_DATADIR/xsim/ip/axi_jtag_v1_0_2
+tmr_manager_v1_0_12=$RDI_DATADIR/xsim/ip/tmr_manager_v1_0_12
+noc_nmu_sim_v1_0_0=$RDI_DATADIR/xsim/ip/noc_nmu_sim_v1_0_0
+mipi_csi2_rx_ctrl_v1_0_10=$RDI_DATADIR/xsim/ip/mipi_csi2_rx_ctrl_v1_0_10
+axi_bram_ctrl_v4_0_15=$RDI_DATADIR/xsim/ip/axi_bram_ctrl_v4_0_15
+axi_gpio_v2_0_33=$RDI_DATADIR/xsim/ip/axi_gpio_v2_0_33
+rs_encoder_v9_0_21=$RDI_DATADIR/xsim/ip/rs_encoder_v9_0_21
+rwd_tlmmodel_v1=$RDI_DATADIR/xsim/ip/rwd_tlmmodel_v1
+axi_bram_ctrl_v4_1_10=$RDI_DATADIR/xsim/ip/axi_bram_ctrl_v4_1_10
+uram_rd_back_v1_0_4=$RDI_DATADIR/xsim/ip/uram_rd_back_v1_0_4
+lib_fifo_v1_0_19=$RDI_DATADIR/xsim/ip/lib_fifo_v1_0_19
+canfd_v3_0_10=$RDI_DATADIR/xsim/ip/canfd_v3_0_10
+hdcp22_rng_v1_0_3=$RDI_DATADIR/xsim/ip/hdcp22_rng_v1_0_3
+xfft_v9_1_12=$RDI_DATADIR/xsim/ip/xfft_v9_1_12
+axi_memory_init_v1_0_12=$RDI_DATADIR/xsim/ip/axi_memory_init_v1_0_12
+common_cpp_v1_0=$RDI_DATADIR/xsim/ip/common_cpp_v1_0
+ai_pl_trig=$RDI_DATADIR/xsim/ip/ai_pl_trig
+c_reg_fd_v12_0_9=$RDI_DATADIR/xsim/ip/c_reg_fd_v12_0_9
+axi_mm2s_mapper_v1_1_30=$RDI_DATADIR/xsim/ip/axi_mm2s_mapper_v1_1_30
+ldpc_v2_0_15=$RDI_DATADIR/xsim/ip/ldpc_v2_0_15
+sim_cpu_v1_0=$RDI_DATADIR/xsim/ip/sim_cpu_v1_0
+axi_data_fifo_v2_1_30=$RDI_DATADIR/xsim/ip/axi_data_fifo_v2_1_30
+g709_fec_v2_4_10=$RDI_DATADIR/xsim/ip/g709_fec_v2_4_10
+axi_mcdma_v1_1_12=$RDI_DATADIR/xsim/ip/axi_mcdma_v1_1_12
+axi_lmb_bridge_v1_0_3=$RDI_DATADIR/xsim/ip/axi_lmb_bridge_v1_0_3
+lte_fft_v2_1_10=$RDI_DATADIR/xsim/ip/lte_fft_v2_1_10
+axi_interconnect_v1_7_23=$RDI_DATADIR/xsim/ip/axi_interconnect_v1_7_23
+axi_dwidth_converter_v2_1_31=$RDI_DATADIR/xsim/ip/axi_dwidth_converter_v2_1_31
+axi_usb2_device_v5_0_32=$RDI_DATADIR/xsim/ip/axi_usb2_device_v5_0_32
+axi_hwicap_v3_0_35=$RDI_DATADIR/xsim/ip/axi_hwicap_v3_0_35
+ldpc_5gnr_lite_v1_0_2=$RDI_DATADIR/xsim/ip/ldpc_5gnr_lite_v1_0_2
+fifo_generator_v13_1_5=$RDI_DATADIR/xsim/ip/fifo_generator_v13_1_5
+axi_protocol_checker_v2_0_17=$RDI_DATADIR/xsim/ip/axi_protocol_checker_v2_0_17
+c_counter_binary_v12_0_19=$RDI_DATADIR/xsim/ip/c_counter_binary_v12_0_19
+axis_ila_pp_v1_0_2=$RDI_DATADIR/xsim/ip/axis_ila_pp_v1_0_2
+mem_tg_v1_0_13=$RDI_DATADIR/xsim/ip/mem_tg_v1_0_13
+xbip_utils_v3_0_13=$RDI_DATADIR/xsim/ip/xbip_utils_v3_0_13
+aie_xtlm_v1_0_0=$RDI_DATADIR/xsim/ip/aie_xtlm_v1_0_0
+xtlm_ap_ctrl_v1_0=$RDI_DATADIR/xsim/ip/xtlm_ap_ctrl_v1_0
+v_vid_in_axi4s_v4_0_11=$RDI_DATADIR/xsim/ip/v_vid_in_axi4s_v4_0_11
+cmac_usplus_v3_1_17=$RDI_DATADIR/xsim/ip/cmac_usplus_v3_1_17
+xdfe_common_v1_0_3=$RDI_DATADIR/xsim/ip/xdfe_common_v1_0_3
+viterbi_v9_1_17=$RDI_DATADIR/xsim/ip/viterbi_v9_1_17
+xdfe_nr_prach_v2_0_3=$RDI_DATADIR/xsim/ip/xdfe_nr_prach_v2_0_3
+v_smpte_sdi_v3_0_11=$RDI_DATADIR/xsim/ip/v_smpte_sdi_v3_0_11
+mdm_v3_2=$RDI_DATADIR/xsim/ip/mdm_v3_2
+clk_vip_v1_0_4=$RDI_DATADIR/xsim/ip/clk_vip_v1_0_4
+mdm_v3_2_26=$RDI_DATADIR/xsim/ip/mdm_v3_2_26
+xtlm_trace_model_v1_0=$RDI_DATADIR/xsim/ip/xtlm_trace_model_v1_0
+xbip_dsp48_multadd_v3_0_9=$RDI_DATADIR/xsim/ip/xbip_dsp48_multadd_v3_0_9
+noc2_nsu_v1_0_1=$RDI_DATADIR/xsim/ip/noc2_nsu_v1_0_1
+timer_sync_1588_v1_2_5=$RDI_DATADIR/xsim/ip/timer_sync_1588_v1_2_5
+axis_ila_ct_v1_0_1=$RDI_DATADIR/xsim/ip/axis_ila_ct_v1_0_1
+dcmac_v2_4_0=$RDI_DATADIR/xsim/ip/dcmac_v2_4_0
+v_dp_axi4s_vid_out_v1_0_8=$RDI_DATADIR/xsim/ip/v_dp_axi4s_vid_out_v1_0_8
+xbip_dsp48_acc_v3_0_9=$RDI_DATADIR/xsim/ip/xbip_dsp48_acc_v3_0_9
+noc2_xbr4x2_v1_0_0=$RDI_DATADIR/xsim/ip/noc2_xbr4x2_v1_0_0
+sd_fec_v1_1_14=$RDI_DATADIR/xsim/ip/sd_fec_v1_1_14
+xbip_accum_v3_0_9=$RDI_DATADIR/xsim/ip/xbip_accum_v3_0_9
+displayport_v8_1_9=$RDI_DATADIR/xsim/ip/displayport_v8_1_9
+ilknf_v1_3_4=$RDI_DATADIR/xsim/ip/ilknf_v1_3_4
+v_letterbox_v1_1_11=$RDI_DATADIR/xsim/ip/v_letterbox_v1_1_11
+iomodule_v3_0=$RDI_DATADIR/xsim/ip/iomodule_v3_0
+dbg_intf=$RDI_DATADIR/xsim/ip/dbg_intf
+cpm5_v1_0_16=$RDI_DATADIR/xsim/ip/cpm5_v1_0_16
+ieee802d3_25g_rs_fec_v1_0_30=$RDI_DATADIR/xsim/ip/ieee802d3_25g_rs_fec_v1_0_30
+jesd204_v7_2_20=$RDI_DATADIR/xsim/ip/jesd204_v7_2_20
+clk_gen_sim_v1_0_4=$RDI_DATADIR/xsim/ip/clk_gen_sim_v1_0_4
+g709_rs_decoder_v2_2_14=$RDI_DATADIR/xsim/ip/g709_rs_decoder_v2_2_14
+cpri_v8_11_20=$RDI_DATADIR/xsim/ip/cpri_v8_11_20
+ieee802d3_200g_rs_fec_v2_0_11=$RDI_DATADIR/xsim/ip/ieee802d3_200g_rs_fec_v2_0_11
+v_warp_init_v1_1_4=$RDI_DATADIR/xsim/ip/v_warp_init_v1_1_4
+v_hscaler_v1_1_11=$RDI_DATADIR/xsim/ip/v_hscaler_v1_1_11
+spdif_v2_0_29=$RDI_DATADIR/xsim/ip/spdif_v2_0_29
+func_emu_util_v1_0=$RDI_DATADIR/xsim/ip/func_emu_util_v1_0
+axi_uart16550_v2_0_33=$RDI_DATADIR/xsim/ip/axi_uart16550_v2_0_33
+axi_clock_converter_v2_1_30=$RDI_DATADIR/xsim/ip/axi_clock_converter_v2_1_30
+dprx_v1_0_4=$RDI_DATADIR/xsim/ip/dprx_v1_0_4
+mrmac_v2_3_0=$RDI_DATADIR/xsim/ip/mrmac_v2_3_0
+cic_compiler_v4_0_19=$RDI_DATADIR/xsim/ip/cic_compiler_v4_0_19
+c_gate_bit_v12_0_9=$RDI_DATADIR/xsim/ip/c_gate_bit_v12_0_9
+noc_sc_v1_0_0_legacy=$RDI_DATADIR/xsim/ip/noc_sc_v1_0_0_legacy
+ten_gig_eth_pcs_pma_v6_0_27=$RDI_DATADIR/xsim/ip/ten_gig_eth_pcs_pma_v6_0_27
+xdfe_cc_filter_v1_1_4=$RDI_DATADIR/xsim/ip/xdfe_cc_filter_v1_1_4
+axi_crossbar_v2_1_32=$RDI_DATADIR/xsim/ip/axi_crossbar_v2_1_32
+axis_itct_v1_0_1=$RDI_DATADIR/xsim/ip/axis_itct_v1_0_1
+xbip_pipe_v3_0_9=$RDI_DATADIR/xsim/ip/xbip_pipe_v3_0_9
+tsn_temac_v1_0_11=$RDI_DATADIR/xsim/ip/tsn_temac_v1_0_11
+lib_srl_fifo_v1_0_4=$RDI_DATADIR/xsim/ip/lib_srl_fifo_v1_0_4
+ecc_v2_0_16=$RDI_DATADIR/xsim/ip/ecc_v2_0_16
+mutex_v2_1_13=$RDI_DATADIR/xsim/ip/mutex_v2_1_13
+lmb_bram_if_cntlr_v4_0=$RDI_DATADIR/xsim/ip/lmb_bram_if_cntlr_v4_0
+ahblite_axi_bridge_v3_0_26=$RDI_DATADIR/xsim/ip/ahblite_axi_bridge_v3_0_26
+tmr_inject_v1_0_6=$RDI_DATADIR/xsim/ip/tmr_inject_v1_0_6
+qdriv_pl_phy_v1_0_2=$RDI_DATADIR/xsim/ip/qdriv_pl_phy_v1_0_2
+tcc_decoder_3gppmm_v2_0_27=$RDI_DATADIR/xsim/ip/tcc_decoder_3gppmm_v2_0_27
+ai_noc=$RDI_DATADIR/xsim/ip/ai_noc
+util_idelay_ctrl_v1_0_4=$RDI_DATADIR/xsim/ip/util_idelay_ctrl_v1_0_4
+noc2_nps_v1_0_0=$RDI_DATADIR/xsim/ip/noc2_nps_v1_0_0
+etrnic_v1_1_8=$RDI_DATADIR/xsim/ip/etrnic_v1_1_8
+axi_ahblite_bridge_v3_0_28=$RDI_DATADIR/xsim/ip/axi_ahblite_bridge_v3_0_28
+ieee802d3_50g_rs_fec_v1_0_24=$RDI_DATADIR/xsim/ip/ieee802d3_50g_rs_fec_v1_0_24
+noc_hbm_nmu_sim_v1_0_0=$RDI_DATADIR/xsim/ip/noc_hbm_nmu_sim_v1_0_0
+noc_npp_rptr_v1_0_0=$RDI_DATADIR/xsim/ip/noc_npp_rptr_v1_0_0
+dfx_decoupler_v1_0_9=$RDI_DATADIR/xsim/ip/dfx_decoupler_v1_0_9
+dsp_macro_v1_0_6=$RDI_DATADIR/xsim/ip/dsp_macro_v1_0_6
+cpm5n_v1_0_8=$RDI_DATADIR/xsim/ip/cpm5n_v1_0_8
+axi_dma_v7_1_32=$RDI_DATADIR/xsim/ip/axi_dma_v7_1_32
+sim_ipc_multi_intf_v1_0=$RDI_DATADIR/xsim/ip/sim_ipc_multi_intf_v1_0
+hdcp_v1_0_5=$RDI_DATADIR/xsim/ip/hdcp_v1_0_5
+axi_epc_v2_0_34=$RDI_DATADIR/xsim/ip/axi_epc_v2_0_34
+tmr_comparator_v1_0_7=$RDI_DATADIR/xsim/ip/tmr_comparator_v1_0_7
+v_warp_filter_v1_1_4=$RDI_DATADIR/xsim/ip/v_warp_filter_v1_1_4
+ai_pl=$RDI_DATADIR/xsim/ip/ai_pl
+xdfe_nlf_v1_1_1=$RDI_DATADIR/xsim/ip/xdfe_nlf_v1_1_1
+v_scenechange_v1_1_6=$RDI_DATADIR/xsim/ip/v_scenechange_v1_1_6
+vfb_v1_0_25=$RDI_DATADIR/xsim/ip/vfb_v1_0_25
+axis_interconnect_v1_1_23=$RDI_DATADIR/xsim/ip/axis_interconnect_v1_1_23
+xlconstant_v1_1_9=$RDI_DATADIR/xsim/ip/xlconstant_v1_1_9
+adc_dac_if_phy_v1_0_0=$RDI_DATADIR/xsim/ip/adc_dac_if_phy_v1_0_0
+mult_gen_v12_0_21=$RDI_DATADIR/xsim/ip/mult_gen_v12_0_21
+i2s_receiver_v1_0_8=$RDI_DATADIR/xsim/ip/i2s_receiver_v1_0_8
+qdriv_pl_v1_0_13=$RDI_DATADIR/xsim/ip/qdriv_pl_v1_0_13
+xbip_dsp48_wrapper_v3_0_6=$RDI_DATADIR/xsim/ip/xbip_dsp48_wrapper_v3_0_6
+lut_buffer_v2_0_1=$RDI_DATADIR/xsim/ip/lut_buffer_v2_0_1
+vid_phy_controller_v2_2_18=$RDI_DATADIR/xsim/ip/vid_phy_controller_v2_2_18
+advanced_io_wizard_phy_v1_0_3=$RDI_DATADIR/xsim/ip/advanced_io_wizard_phy_v1_0_3
+uhdsdi_gt_v2_1_4=$RDI_DATADIR/xsim/ip/uhdsdi_gt_v2_1_4
+axi_dbg_hub=$RDI_DATADIR/xsim/ip/axi_dbg_hub
+anlt_subcore_ip_v1_0_2=$RDI_DATADIR/xsim/ip/anlt_subcore_ip_v1_0_2
+xxv_ethernet_v4_1_10=$RDI_DATADIR/xsim/ip/xxv_ethernet_v4_1_10
+cdcam_v1_1_0=$RDI_DATADIR/xsim/ip/cdcam_v1_1_0
+pci32_v5_0_13=$RDI_DATADIR/xsim/ip/pci32_v5_0_13
+v_mix_v5_2_9=$RDI_DATADIR/xsim/ip/v_mix_v5_2_9
+pci64_v5_0_12=$RDI_DATADIR/xsim/ip/pci64_v5_0_12
+in_system_ibert_v1_0_22=$RDI_DATADIR/xsim/ip/in_system_ibert_v1_0_22
+proc_sys_reset_v5_0_15=$RDI_DATADIR/xsim/ip/proc_sys_reset_v5_0_15
+axis_dwidth_converter_v1_1_30=$RDI_DATADIR/xsim/ip/axis_dwidth_converter_v1_1_30
+sim_ddr_v1_0=$RDI_DATADIR/xsim/ip/sim_ddr_v1_0
+sim_qdma_cpp_v1_0=$RDI_DATADIR/xsim/ip/sim_qdma_cpp_v1_0
+axi_traffic_gen_v3_0_17=$RDI_DATADIR/xsim/ip/axi_traffic_gen_v3_0_17
+v_hdmi_rx_v3_0_4=$RDI_DATADIR/xsim/ip/v_hdmi_rx_v3_0_4
+xdfe_resampler_v1_0_9=$RDI_DATADIR/xsim/ip/xdfe_resampler_v1_0_9
+zynq_ultra_ps_e_v3_3_12=$RDI_DATADIR/xsim/ip/zynq_ultra_ps_e_v3_3_12
+axi_i3c_v1_0_0=$RDI_DATADIR/xsim/ip/axi_i3c_v1_0_0
+g709_rs_encoder_v2_2_12=$RDI_DATADIR/xsim/ip/g709_rs_encoder_v2_2_12
+xpm=$RDI_DATADIR/xsim/ip/xpm
+dptx_v1_0_4=$RDI_DATADIR/xsim/ip/dptx_v1_0_4
+v_axi4s_remap_v1_1_10=$RDI_DATADIR/xsim/ip/v_axi4s_remap_v1_1_10
+tri_mode_ethernet_mac_v9_0_32=$RDI_DATADIR/xsim/ip/tri_mode_ethernet_mac_v9_0_32
+xbip_bram18k_v3_0_9=$RDI_DATADIR/xsim/ip/xbip_bram18k_v3_0_9
+shell_utils_build_info_v2_0_0=$RDI_DATADIR/xsim/ip/shell_utils_build_info_v2_0_0
+cordic_v6_0_22=$RDI_DATADIR/xsim/ip/cordic_v6_0_22
+sim_xdma_cpp_v1=$RDI_DATADIR/xsim/ip/sim_xdma_cpp_v1
+axi_hbicap_v1_0_7=$RDI_DATADIR/xsim/ip/axi_hbicap_v1_0_7
+zynq_ultra_ps_e_vip_v1_0_17=$RDI_DATADIR/xsim/ip/zynq_ultra_ps_e_vip_v1_0_17
+gtwizard_ultrascale_v1_5_4=$RDI_DATADIR/xsim/ip/gtwizard_ultrascale_v1_5_4
+remote_port_c_v4=$RDI_DATADIR/xsim/ip/remote_port_c_v4
+axi_vdma_v6_3_19=$RDI_DATADIR/xsim/ip/axi_vdma_v6_3_19
+x5io_wizard_phy_v1_0_1=$RDI_DATADIR/xsim/ip/x5io_wizard_phy_v1_0_1
+tcc_encoder_3gpp_v5_0_22=$RDI_DATADIR/xsim/ip/tcc_encoder_3gpp_v5_0_22
+axis_combiner_v1_1_29=$RDI_DATADIR/xsim/ip/axis_combiner_v1_1_29
+microblaze_v9_5_5=$RDI_DATADIR/xsim/ip/microblaze_v9_5_5
+advanced_io_wizard_v1_0_13=$RDI_DATADIR/xsim/ip/advanced_io_wizard_v1_0_13
+lib_cdc_v1_0_3=$RDI_DATADIR/xsim/ip/lib_cdc_v1_0_3
+axis_ila_adv_trig_v1_0_1=$RDI_DATADIR/xsim/ip/axis_ila_adv_trig_v1_0_1
+qdma_v5_0_9=$RDI_DATADIR/xsim/ip/qdma_v5_0_9
+ddr4_pl_v1_0_14=$RDI_DATADIR/xsim/ip/ddr4_pl_v1_0_14
+noc_mc_ddr5_phy_v1_0_1=$RDI_DATADIR/xsim/ip/noc_mc_ddr5_phy_v1_0_1
+xtlm_simple_interconnect_v1_0=$RDI_DATADIR/xsim/ip/xtlm_simple_interconnect_v1_0
+axi_sg_v4_1_18=$RDI_DATADIR/xsim/ip/axi_sg_v4_1_18
+xdfe_cc_mixer_v2_0_4=$RDI_DATADIR/xsim/ip/xdfe_cc_mixer_v2_0_4
+processing_system7_vip_v1_0_19=$RDI_DATADIR/xsim/ip/processing_system7_vip_v1_0_19
+mipi_dsi_tx_ctrl_v1_0_9=$RDI_DATADIR/xsim/ip/mipi_dsi_tx_ctrl_v1_0_9
+microblaze_riscv_v1_0_2=$RDI_DATADIR/xsim/ip/microblaze_riscv_v1_0_2
+cpm4_v1_0_16=$RDI_DATADIR/xsim/ip/cpm4_v1_0_16
+xbip_multadd_v3_0_20=$RDI_DATADIR/xsim/ip/xbip_multadd_v3_0_20
+axis_data_fifo_v2_0_13=$RDI_DATADIR/xsim/ip/axis_data_fifo_v2_0_13
+ltlib_v1_0_2=$RDI_DATADIR/xsim/ip/ltlib_v1_0_2
+axis_switch_sc_v1_1=$RDI_DATADIR/xsim/ip/axis_switch_sc_v1_1
+sim_clk_gen_v1_0_4=$RDI_DATADIR/xsim/ip/sim_clk_gen_v1_0_4
+xdfe_fft_v1_0_7=$RDI_DATADIR/xsim/ip/xdfe_fft_v1_0_7
+hsdp_trace_v2_0_2=$RDI_DATADIR/xsim/ip/hsdp_trace_v2_0_2
+blk_mem_gen_v8_4_8=$RDI_DATADIR/xsim/ip/blk_mem_gen_v8_4_8
+cam_blk_lib_v1_1_0=$RDI_DATADIR/xsim/ip/cam_blk_lib_v1_1_0
+tmr_voter_v1_0_6=$RDI_DATADIR/xsim/ip/tmr_voter_v1_0_6
+util_ff_v1_0_3=$RDI_DATADIR/xsim/ip/util_ff_v1_0_3
+interrupt_control_v3_1_5=$RDI_DATADIR/xsim/ip/interrupt_control_v3_1_5
+xdfe_ofdm_v2_1_0=$RDI_DATADIR/xsim/ip/xdfe_ofdm_v2_1_0
+audio_clock_recovery_unit_v1_0_4=$RDI_DATADIR/xsim/ip/audio_clock_recovery_unit_v1_0_4
+ten_gig_eth_mac_v15_1_12=$RDI_DATADIR/xsim/ip/ten_gig_eth_mac_v15_1_12
+axi_protocol_converter_v2_1_31=$RDI_DATADIR/xsim/ip/axi_protocol_converter_v2_1_31
+xbip_dsp48_mult_v3_0_9=$RDI_DATADIR/xsim/ip/xbip_dsp48_mult_v3_0_9
+tmr_sem_v1_0_26=$RDI_DATADIR/xsim/ip/tmr_sem_v1_0_26
+v_frmbuf_rd_v2_4_3=$RDI_DATADIR/xsim/ip/v_frmbuf_rd_v2_4_3
+cmpy_v6_0_24=$RDI_DATADIR/xsim/ip/cmpy_v6_0_24
+ta_dma_v1_0_15=$RDI_DATADIR/xsim/ip/ta_dma_v1_0_15
+v_tpg_v8_0_14=$RDI_DATADIR/xsim/ip/v_tpg_v8_0_14
+axi_tlm_ext_v1_0=$RDI_DATADIR/xsim/ip/axi_tlm_ext_v1_0
+axi_iic_v2_1_7=$RDI_DATADIR/xsim/ip/axi_iic_v2_1_7
+c_addsub_v12_0_18=$RDI_DATADIR/xsim/ip/c_addsub_v12_0_18
+audio_tpg_v1_0_2=$RDI_DATADIR/xsim/ip/audio_tpg_v1_0_2
+axi_tg_sc_v1_0=$RDI_DATADIR/xsim/ip/axi_tg_sc_v1_0
+v_vid_sdi_tx_bridge_v2_0_2=$RDI_DATADIR/xsim/ip/v_vid_sdi_tx_bridge_v2_0_2
+noc_nsu_sim_v1_0_0=$RDI_DATADIR/xsim/ip/noc_nsu_sim_v1_0_0
+axi_register_slice_v2_1_31=$RDI_DATADIR/xsim/ip/axi_register_slice_v2_1_31
+axis_switch_v1_1_31=$RDI_DATADIR/xsim/ip/axis_switch_v1_1_31
+axi_stream_monitor_v1_1_1=$RDI_DATADIR/xsim/ip/axi_stream_monitor_v1_1_1
+v_uhdsdi_vidgen_v1_0_3=$RDI_DATADIR/xsim/ip/v_uhdsdi_vidgen_v1_0_3
+bscan_jtag=$RDI_DATADIR/xsim/ip/bscan_jtag
+audio_formatter_v1_0_13=$RDI_DATADIR/xsim/ip/audio_formatter_v1_0_13
+axis_vio_v1_0_11=$RDI_DATADIR/xsim/ip/axis_vio_v1_0_11
+interlaken_v2_4_17=$RDI_DATADIR/xsim/ip/interlaken_v2_4_17
+axis_register_slice_v1_1_31=$RDI_DATADIR/xsim/ip/axis_register_slice_v1_1_31
+remote_port_sc_v4=$RDI_DATADIR/xsim/ip/remote_port_sc_v4
+hdcp22_cipher_v1_0_5=$RDI_DATADIR/xsim/ip/hdcp22_cipher_v1_0_5
+picxo_fracxo_v2_0_2=$RDI_DATADIR/xsim/ip/picxo_fracxo_v2_0_2
+xdma_v4_1_29=$RDI_DATADIR/xsim/ip/xdma_v4_1_29
+accelerator_monitor_v1_1_0=$RDI_DATADIR/xsim/ip/accelerator_monitor_v1_1_0
+noc_nps6_v1_0_0=$RDI_DATADIR/xsim/ip/noc_nps6_v1_0_0
+roe_framer_v3_0_8=$RDI_DATADIR/xsim/ip/roe_framer_v3_0_8
+g975_efec_i7_v2_0_23=$RDI_DATADIR/xsim/ip/g975_efec_i7_v2_0_23
+quadsgmii_v3_5_18=$RDI_DATADIR/xsim/ip/quadsgmii_v3_5_18
+axi_ethernet_buffer_v2_0_25=$RDI_DATADIR/xsim/ip/axi_ethernet_buffer_v2_0_25
+fit_timer_v2_0_12=$RDI_DATADIR/xsim/ip/fit_timer_v2_0_12
+bsip_v1_1_1=$RDI_DATADIR/xsim/ip/bsip_v1_1_1
+lmb_v10_v3_0=$RDI_DATADIR/xsim/ip/lmb_v10_v3_0
+mailbox_v2_1_17=$RDI_DATADIR/xsim/ip/mailbox_v2_1_17
+v_vscaler_v1_1_11=$RDI_DATADIR/xsim/ip/v_vscaler_v1_1_11
+fifo_generator_v13_0_7=$RDI_DATADIR/xsim/ip/fifo_generator_v13_0_7
+av_pat_gen_v1_0_2=$RDI_DATADIR/xsim/ip/av_pat_gen_v1_0_2
+v_frmbuf_rd_v2_5_2=$RDI_DATADIR/xsim/ip/v_frmbuf_rd_v2_5_2
+mipi_rx_phy_v1_0_0=$RDI_DATADIR/xsim/ip/mipi_rx_phy_v1_0_0
+gig_ethernet_pcs_pma_v16_2_18=$RDI_DATADIR/xsim/ip/gig_ethernet_pcs_pma_v16_2_18
+noc2_nmu_v1_0_1=$RDI_DATADIR/xsim/ip/noc2_nmu_v1_0_1
+ats_switch_v1_0_10=$RDI_DATADIR/xsim/ip/ats_switch_v1_0_10
+axi_ethernetlite_v3_0_30=$RDI_DATADIR/xsim/ip/axi_ethernetlite_v3_0_30
+axis_mu_v1_0_1=$RDI_DATADIR/xsim/ip/axis_mu_v1_0_1
+vby1hs_v1_0_5=$RDI_DATADIR/xsim/ip/vby1hs_v1_0_5
+noc_sc_v1_0_0=$RDI_DATADIR/xsim/ip/noc_sc_v1_0_0
+convolution_v9_0_20=$RDI_DATADIR/xsim/ip/convolution_v9_0_20
+axi4stream_vip_v1_1_17=$RDI_DATADIR/xsim/ip/axi4stream_vip_v1_1_17
+axis_subset_converter_v1_1_31=$RDI_DATADIR/xsim/ip/axis_subset_converter_v1_1_31
+srio_gen2_v4_1_19=$RDI_DATADIR/xsim/ip/srio_gen2_v4_1_19
+lib_bmg_v1_0_17=$RDI_DATADIR/xsim/ip/lib_bmg_v1_0_17
+system_cache_v5_0_11=$RDI_DATADIR/xsim/ip/system_cache_v5_0_11
+dp_videoaxi4s_bridge_v1_0_3=$RDI_DATADIR/xsim/ip/dp_videoaxi4s_bridge_v1_0_3
+sid_v8_0_21=$RDI_DATADIR/xsim/ip/sid_v8_0_21
+blk_mem_gen_v8_3_7=$RDI_DATADIR/xsim/ip/blk_mem_gen_v8_3_7
+noc2_sc_v1_0_0=$RDI_DATADIR/xsim/ip/noc2_sc_v1_0_0
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xvhdl.log b/proj/AudioProc.sim/sim_1/behav/xsim/xvhdl.log
new file mode 100644
index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xvhdl.pb b/proj/AudioProc.sim/sim_1/behav/xsim/xvhdl.pb
new file mode 100644
index 0000000000000000000000000000000000000000..b155e40f06a230303a04d2a77f07560e35c5dc93
--- /dev/null
+++ b/proj/AudioProc.sim/sim_1/behav/xsim/xvhdl.pb
@@ -0,0 +1,4 @@
+
+
+
+End Record
\ No newline at end of file
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xvlog.log b/proj/AudioProc.sim/sim_1/behav/xsim/xvlog.log
new file mode 100644
index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391
diff --git a/proj/AudioProc.sim/sim_1/behav/xsim/xvlog.pb b/proj/AudioProc.sim/sim_1/behav/xsim/xvlog.pb
new file mode 100644
index 0000000000000000000000000000000000000000..b155e40f06a230303a04d2a77f07560e35c5dc93
--- /dev/null
+++ b/proj/AudioProc.sim/sim_1/behav/xsim/xvlog.pb
@@ -0,0 +1,4 @@
+
+
+
+End Record
\ No newline at end of file
diff --git a/proj/AudioProc.xpr b/proj/AudioProc.xpr
new file mode 100644
index 0000000000000000000000000000000000000000..94253f18da14030d4da9da3dca5cc62e9a5e96d1
--- /dev/null
+++ b/proj/AudioProc.xpr
@@ -0,0 +1,312 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!-- Product Version: Vivado v2024.1 (64-bit) -->
+<!-- -->
+<!-- Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. -->
+<!-- Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved. -->
+
+<Project Product="Vivado" Version="7" Minor="67" Path="/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.xpr">
+ <DefaultLaunch Dir="$PRUNDIR"/>
+ <Configuration>
+ <Option Name="Id" Val="6a4df1729ae9441aa6cd704f48182cc7"/>
+ <Option Name="Part" Val="xc7a200tsbg484-1"/>
+ <Option Name="CompiledLibDir" Val="$PCACHEDIR/compile_simlib"/>
+ <Option Name="CompiledLibDirXSim" Val=""/>
+ <Option Name="CompiledLibDirModelSim" Val="$PCACHEDIR/compile_simlib/modelsim"/>
+ <Option Name="CompiledLibDirQuesta" Val="$PCACHEDIR/compile_simlib/questa"/>
+ <Option Name="CompiledLibDirXcelium" Val="$PCACHEDIR/compile_simlib/xcelium"/>
+ <Option Name="CompiledLibDirVCS" Val="$PCACHEDIR/compile_simlib/vcs"/>
+ <Option Name="CompiledLibDirRiviera" Val="$PCACHEDIR/compile_simlib/riviera"/>
+ <Option Name="CompiledLibDirActivehdl" Val="$PCACHEDIR/compile_simlib/activehdl"/>
+ <Option Name="SimulatorInstallDirModelSim" Val=""/>
+ <Option Name="SimulatorInstallDirQuesta" Val=""/>
+ <Option Name="SimulatorInstallDirXcelium" Val=""/>
+ <Option Name="SimulatorInstallDirVCS" Val=""/>
+ <Option Name="SimulatorInstallDirRiviera" Val=""/>
+ <Option Name="SimulatorInstallDirActiveHdl" Val=""/>
+ <Option Name="SimulatorGccInstallDirModelSim" Val=""/>
+ <Option Name="SimulatorGccInstallDirQuesta" Val=""/>
+ <Option Name="SimulatorGccInstallDirXcelium" Val=""/>
+ <Option Name="SimulatorGccInstallDirVCS" Val=""/>
+ <Option Name="SimulatorGccInstallDirRiviera" Val=""/>
+ <Option Name="SimulatorGccInstallDirActiveHdl" Val=""/>
+ <Option Name="SimulatorVersionXsim" Val="2024.1"/>
+ <Option Name="SimulatorVersionModelSim" Val="2023.2"/>
+ <Option Name="SimulatorVersionQuesta" Val="2023.2"/>
+ <Option Name="SimulatorVersionXcelium" Val="23.03.002"/>
+ <Option Name="SimulatorVersionVCS" Val="U-2023.03-1"/>
+ <Option Name="SimulatorVersionRiviera" Val="2023.04"/>
+ <Option Name="SimulatorVersionActiveHdl" Val="14.1"/>
+ <Option Name="SimulatorGccVersionXsim" Val="9.3.0"/>
+ <Option Name="SimulatorGccVersionModelSim" Val="7.4.0"/>
+ <Option Name="SimulatorGccVersionQuesta" Val="7.4.0"/>
+ <Option Name="SimulatorGccVersionXcelium" Val="9.3.0"/>
+ <Option Name="SimulatorGccVersionVCS" Val="9.2.0"/>
+ <Option Name="SimulatorGccVersionRiviera" Val="9.3.0"/>
+ <Option Name="SimulatorGccVersionActiveHdl" Val="9.3.0"/>
+ <Option Name="TargetLanguage" Val="VHDL"/>
+ <Option Name="BoardPart" Val=""/>
+ <Option Name="ActiveSimSet" Val="sim_1"/>
+ <Option Name="DefaultLib" Val="xil_defaultlib"/>
+ <Option Name="ProjectType" Val="Default"/>
+ <Option Name="IPRepoPath" Val="$PPRDIR/../repo"/>
+ <Option Name="IPOutputRepo" Val="$PCACHEDIR/ip"/>
+ <Option Name="IPDefaultOutputPath" Val="$PGENDIR/sources_1"/>
+ <Option Name="IPCachePermission" Val="read"/>
+ <Option Name="IPCachePermission" Val="write"/>
+ <Option Name="EnableCoreContainer" Val="FALSE"/>
+ <Option Name="EnableResourceEstimation" Val="FALSE"/>
+ <Option Name="SimCompileState" Val="TRUE"/>
+ <Option Name="CreateRefXciForCoreContainers" Val="FALSE"/>
+ <Option Name="IPUserFilesDir" Val="$PIPUSERFILESDIR"/>
+ <Option Name="IPStaticSourceDir" Val="$PIPUSERFILESDIR/ipstatic"/>
+ <Option Name="EnableBDX" Val="FALSE"/>
+ <Option Name="WTXSimLaunchSim" Val="19"/>
+ <Option Name="WTModelSimLaunchSim" Val="0"/>
+ <Option Name="WTQuestaLaunchSim" Val="0"/>
+ <Option Name="WTIesLaunchSim" Val="0"/>
+ <Option Name="WTVcsLaunchSim" Val="0"/>
+ <Option Name="WTRivieraLaunchSim" Val="0"/>
+ <Option Name="WTActivehdlLaunchSim" Val="0"/>
+ <Option Name="WTXSimExportSim" Val="0"/>
+ <Option Name="WTModelSimExportSim" Val="0"/>
+ <Option Name="WTQuestaExportSim" Val="0"/>
+ <Option Name="WTIesExportSim" Val="0"/>
+ <Option Name="WTVcsExportSim" Val="0"/>
+ <Option Name="WTRivieraExportSim" Val="0"/>
+ <Option Name="WTActivehdlExportSim" Val="0"/>
+ <Option Name="GenerateIPUpgradeLog" Val="TRUE"/>
+ <Option Name="XSimRadix" Val="hex"/>
+ <Option Name="XSimTimeUnit" Val="ns"/>
+ <Option Name="XSimArrayDisplayLimit" Val="1024"/>
+ <Option Name="XSimTraceLimit" Val="65536"/>
+ <Option Name="SimTypes" Val="rtl"/>
+ <Option Name="SimTypes" Val="bfm"/>
+ <Option Name="SimTypes" Val="tlm"/>
+ <Option Name="SimTypes" Val="tlm_dpi"/>
+ <Option Name="MEMEnableMemoryMapGeneration" Val="TRUE"/>
+ <Option Name="DcpsUptoDate" Val="TRUE"/>
+ <Option Name="ClassicSocBoot" Val="FALSE"/>
+ <Option Name="LocalIPRepoLeafDirName" Val="ip_repo"/>
+ </Configuration>
+ <FileSets Version="1" Minor="32">
+ <FileSet Name="sources_1" Type="DesignSrcs" RelSrcDir="$PSRCDIR/sources_1" RelGenDir="$PGENDIR/sources_1">
+ <Filter Type="Srcs"/>
+ <File Path="$PPRDIR/../src/hdl/operativeUnit.v">
+ <FileInfo>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="implementation"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/controlUnit.vhd">
+ <FileInfo>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/firUnit.vhd">
+ <FileInfo>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/tb_firUnit.vhd">
+ <FileInfo>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/ip/clk_wiz_0/clk_wiz_0.xci">
+ <FileInfo>
+ <Attr Name="AutoDisabled" Val="1"/>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="implementation"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/audio_init.v">
+ <FileInfo>
+ <Attr Name="AutoDisabled" Val="1"/>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="implementation"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/debounce.v">
+ <FileInfo>
+ <Attr Name="AutoDisabled" Val="1"/>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="implementation"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/TWICtl.vhd">
+ <FileInfo>
+ <Attr Name="AutoDisabled" Val="1"/>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/fir.vhd">
+ <FileInfo>
+ <Attr Name="AutoDisabled" Val="1"/>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/i2s_ctl.vhd">
+ <FileInfo>
+ <Attr Name="AutoDisabled" Val="1"/>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/audioProc.v">
+ <FileInfo>
+ <Attr Name="AutoDisabled" Val="1"/>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="implementation"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <File Path="$PPRDIR/../src/hdl/operativeUnit.vhd">
+ <FileInfo>
+ <Attr Name="UserDisabled" Val="1"/>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="simulation"/>
+ </FileInfo>
+ </File>
+ <Config>
+ <Option Name="DesignMode" Val="RTL"/>
+ <Option Name="TopModule" Val="tb_firUnit"/>
+ </Config>
+ </FileSet>
+ <FileSet Name="constrs_1" Type="Constrs" RelSrcDir="$PSRCDIR/constrs_1" RelGenDir="$PGENDIR/constrs_1">
+ <Filter Type="Constrs"/>
+ <File Path="$PPRDIR/../src/constraints/NexysVideo_Master.xdc">
+ <FileInfo>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="implementation"/>
+ </FileInfo>
+ </File>
+ <Config>
+ <Option Name="ConstrsType" Val="XDC"/>
+ </Config>
+ </FileSet>
+ <FileSet Name="sim_1" Type="SimulationSrcs" RelSrcDir="$PSRCDIR/sim_1" RelGenDir="$PGENDIR/sim_1">
+ <Config>
+ <Option Name="DesignMode" Val="RTL"/>
+ <Option Name="TopModule" Val="tb_firUnit"/>
+ <Option Name="TopLib" Val="xil_defaultlib"/>
+ <Option Name="TransportPathDelay" Val="0"/>
+ <Option Name="TransportIntDelay" Val="0"/>
+ <Option Name="SelectedSimModel" Val="rtl"/>
+ <Option Name="PamDesignTestbench" Val=""/>
+ <Option Name="PamDutBypassFile" Val="xil_dut_bypass"/>
+ <Option Name="PamSignalDriverFile" Val="xil_bypass_driver"/>
+ <Option Name="PamPseudoTop" Val="pseudo_tb"/>
+ <Option Name="SrcSet" Val="sources_1"/>
+ </Config>
+ </FileSet>
+ <FileSet Name="utils_1" Type="Utils" RelSrcDir="$PSRCDIR/utils_1" RelGenDir="$PGENDIR/utils_1">
+ <Filter Type="Utils"/>
+ <Config>
+ <Option Name="TopAutoSet" Val="TRUE"/>
+ </Config>
+ </FileSet>
+ </FileSets>
+ <Simulators>
+ <Simulator Name="XSim">
+ <Option Name="Description" Val="Vivado Simulator"/>
+ <Option Name="CompiledLib" Val="0"/>
+ </Simulator>
+ <Simulator Name="ModelSim">
+ <Option Name="Description" Val="ModelSim Simulator"/>
+ </Simulator>
+ <Simulator Name="Questa">
+ <Option Name="Description" Val="Questa Advanced Simulator"/>
+ </Simulator>
+ <Simulator Name="Xcelium">
+ <Option Name="Description" Val="Xcelium Parallel Simulator"/>
+ </Simulator>
+ <Simulator Name="VCS">
+ <Option Name="Description" Val="Verilog Compiler Simulator (VCS)"/>
+ </Simulator>
+ <Simulator Name="Riviera">
+ <Option Name="Description" Val="Riviera-PRO Simulator"/>
+ </Simulator>
+ </Simulators>
+ <Runs Version="1" Minor="22">
+ <Run Id="synth_1" Type="Ft3:Synth" SrcSet="sources_1" Part="xc7a200tsbg484-1" ConstrsSet="constrs_1" Description="Higher performance designs, resource sharing is turned off, the global fanout guide is set to a lower number, FSM extraction forced to one-hot, LUT combining is disabled, equivalent registers are preserved, SRL are inferred with a larger threshold" AutoIncrementalCheckpoint="true" WriteIncrSynthDcp="false" State="current" Dir="$PRUNDIR/synth_1" IncludeInArchive="true" IsChild="false" AutoIncrementalDir="$PSRCDIR/utils_1/imports/synth_1" AutoRQSDir="$PSRCDIR/utils_1/imports/synth_1" ParallelReportGen="true">
+ <Strategy Version="1" Minor="2">
+ <StratHandle Name="Flow_PerfOptimized_High" Flow="Vivado Synthesis 2014">
+ <Desc>Higher performance designs, resource sharing is turned off, the global fanout guide is set to a lower number, FSM extraction forced to one-hot, LUT combining is disabled, equivalent registers are preserved, SRL are inferred with a larger threshold</Desc>
+ </StratHandle>
+ <Step Id="synth_design">
+ <Option Id="FsmExtraction">1</Option>
+ <Option Id="KeepEquivalentRegisters">1</Option>
+ <Option Id="NoCombineLuts">1</Option>
+ <Option Id="RepFanoutThreshold">400</Option>
+ <Option Id="ResourceSharing">2</Option>
+ <Option Id="ShregMinSize">5</Option>
+ </Step>
+ </Strategy>
+ <GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
+ <ReportStrategy Name="Vivado Synthesis Default Reports" Flow="Vivado Synthesis 2017"/>
+ <Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
+ <RQSFiles/>
+ </Run>
+ <Run Id="impl_1" Type="Ft2:EntireDesign" Part="xc7a200tsbg484-1" ConstrsSet="constrs_1" Description="Vivado Implementation Defaults" AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" State="current" Dir="$PRUNDIR/impl_1" SynthRun="synth_1" IncludeInArchive="true" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/impl_1" LaunchOptions="-jobs 6 " AutoRQSDir="$PSRCDIR/utils_1/imports/impl_1" ParallelReportGen="true">
+ <Strategy Version="1" Minor="2">
+ <StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2014">
+ <Desc>Vivado Implementation Defaults</Desc>
+ </StratHandle>
+ <Step Id="init_design"/>
+ <Step Id="opt_design"/>
+ <Step Id="power_opt_design"/>
+ <Step Id="place_design"/>
+ <Step Id="post_place_power_opt_design"/>
+ <Step Id="phys_opt_design"/>
+ <Step Id="route_design"/>
+ <Step Id="post_route_phys_opt_design"/>
+ <Step Id="write_bitstream">
+ <Option Id="BinFile">1</Option>
+ </Step>
+ </Strategy>
+ <GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
+ <ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2017"/>
+ <Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
+ <RQSFiles/>
+ </Run>
+ </Runs>
+ <Board/>
+ <DashboardSummary Version="1" Minor="0">
+ <Dashboards>
+ <Dashboard Name="default_dashboard">
+ <Gadgets>
+ <Gadget Name="drc_1" Type="drc" Version="1" Row="2" Column="0">
+ <GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_route_report_drc_0 "/>
+ </Gadget>
+ <Gadget Name="methodology_1" Type="methodology" Version="1" Row="2" Column="1">
+ <GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_route_report_methodology_0 "/>
+ </Gadget>
+ <Gadget Name="power_1" Type="power" Version="1" Row="1" Column="0">
+ <GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_route_report_power_0 "/>
+ </Gadget>
+ <Gadget Name="timing_1" Type="timing" Version="1" Row="0" Column="1">
+ <GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_route_report_timing_summary_0 "/>
+ </Gadget>
+ <Gadget Name="utilization_1" Type="utilization" Version="1" Row="0" Column="0">
+ <GadgetParam Name="REPORTS" Type="string_list" Value="synth_1#synth_1_synth_report_utilization_0 "/>
+ <GadgetParam Name="RUN.STEP" Type="string" Value="synth_design"/>
+ <GadgetParam Name="RUN.TYPE" Type="string" Value="synthesis"/>
+ </Gadget>
+ <Gadget Name="utilization_2" Type="utilization" Version="1" Row="1" Column="1">
+ <GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_place_report_utilization_0 "/>
+ </Gadget>
+ </Gadgets>
+ </Dashboard>
+ <CurrentDashboard>default_dashboard</CurrentDashboard>
+ </Dashboards>
+ </DashboardSummary>
+</Project>
diff --git a/src/hdl/controlUnit.vhd b/src/hdl/controlUnit.vhd
index 21da15f3e1bdfbfa00939c8508c01ee8a1caca2f..a9fd56ab224819c9ceb773289395ff80dc47fdca 100644
--- a/src/hdl/controlUnit.vhd
+++ b/src/hdl/controlUnit.vhd
@@ -38,7 +38,7 @@ entity controlUnit is
O_initSum : out std_logic; -- Control signal to initialize the MAC register
O_loadSum : out std_logic; -- Control signal to load the MAC register;
O_loadOutput : out std_logic; -- Control signal to load Y register
- O_FilteredSampleValid : out std_logic -- Data valid signal for filtered sample
+ O_FilteredSampleValid : out std_logic -- Data valid signal for filtered sample
);
end entity controlUnit;
@@ -54,37 +54,55 @@ begin
-- Process to describe the state register
-- Current state is provide at the output of the register
-- and is updated with the next state at each rising edge of clock
- process (_BLANK_) is
+ process (I_reset, I_clock) is
begin
if I_reset = '1' then -- asynchronous reset (active high)
- SR_currentState <= _BLANK_
+ SR_currentState <= WAIT_SAMPLE;
elsif rising_edge(I_clock) then -- rising clock edge
- _BLANK_
+ SR_currentState <= SR_nextState;
end if;
end process;
-- Combinatorial process computing the next state which depends on
-- the current state and on the inputs
- process (_BLANK_) is
+ process (SR_currentState, I_inputSampleValid, I_processingDone) is
begin
case SR_currentState is
when WAIT_SAMPLE =>
- _BLANK_
-
+ if(I_inputSampleValid = '1') then
+ SR_nextState <= STORE;
+ end if;
+
+ when STORE =>
+ SR_nextState <= PROCESSING_LOOP;
+
+ when PROCESSING_LOOP =>
+ if(I_processingDone = '1') then
+ SR_nextState <= OUTPUT;
+ end if;
+
+ when OUTPUT =>
+ SR_nextState <= WAIT_END_SAMPLE;
+
+ when WAIT_END_SAMPLE =>
+ if(I_inputSampleValid = '0') then
+ SR_nextState <= WAIT_SAMPLE;
+ end if;
+
when others => null;
end case;
end process;
-- Rules to compute the outputs depending on the current state
-- (and on the inputs, if you want a Mealy machine).
- O_loadShift <= '1' when _BLANK_ else '0';
- O_initAddress <= '1' when _BLANK_ else '0';
- O_incrAddress <= '1' when _BLANK_ else '0';
- O_initSum <= '1' when _BLANK_ else '0';
- O_loadSum <= '1' when _BLANK_ else '0';
- O_loadOutput <= '1' when _BLANK_ else '0';
- O_FilteredSampleValid <= '1' when _BLANK_ else '0';
+ O_loadShift <= '1' when SR_currentState = STORE else '0';
+ O_initAddress <= '1' when SR_currentState = STORE else '0';
+ O_incrAddress <= '1' when SR_currentState = PROCESSING_LOOP else '0';
+ O_initSum <= '1' when SR_currentState = STORE else '0';
+ O_loadSum <= '1' when SR_currentState = PROCESSING_LOOP else '0';
+ O_loadOutput <= '1' when SR_currentState = OUTPUT else '0';
+ O_FilteredSampleValid <= '1' when SR_currentState = OUTPUT else '0';
diff --git a/src/hdl/operativeUnit.vhd b/src/hdl/operativeUnit.vhd
index fe12a2e40d899e53218df9bccbf9aab36f8170bd..4b88965e893e45be66942629e59fa7dfc50055b9 100644
--- a/src/hdl/operativeUnit.vhd
+++ b/src/hdl/operativeUnit.vhd
@@ -114,11 +114,12 @@ begin
);
-- Process to describe the shift register storing the input samples
- shift : process (_BLANK_) is
+ shift : process (I_reset, I_loadShift) is
begin -- process shift
if I_reset = '1' then -- asynchronous reset (active high)
SR_shiftRegister <= (others => (others => '0'));
- elsif _BLANK_
+ elsif (I_loadShift = '1') then
+ SR_shiftRegister
end if;
end process shift;
diff --git a/vivado.jou b/vivado.jou
new file mode 100644
index 0000000000000000000000000000000000000000..0cee59400718d05a9bd27b53bcc909c0d8b26f69
--- /dev/null
+++ b/vivado.jou
@@ -0,0 +1,92 @@
+#-----------------------------------------------------------
+# Vivado v2024.1 (64-bit)
+# SW Build 5076996 on Wed May 22 18:36:09 MDT 2024
+# IP Build 5075265 on Wed May 22 21:45:21 MDT 2024
+# SharedData Build 5076995 on Wed May 22 18:29:18 MDT 2024
+# Start of session at: Fri May 9 14:18:35 2025
+# Process ID: 88932
+# Current directory: /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant
+# Command line: vivado
+# Log file: /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/vivado.log
+# Journal file: /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/vivado.jou
+# Running On :fl-tp-br-515
+# Platform :Ubuntu
+# Operating System :Ubuntu 24.04.2 LTS
+# Processor Detail :Intel(R) Core(TM) i5-10500 CPU @ 3.10GHz
+# CPU Frequency :4328.680 MHz
+# CPU Physical cores:6
+# CPU Logical cores :12
+# Host memory :16533 MB
+# Swap memory :4294 MB
+# Total Virtual :20828 MB
+# Available Virtual :18297 MB
+#-----------------------------------------------------------
+start_gui
+cd tp-filtre-etudiant-$USER/proj
+ls
+cd proj
+ls
+source ./create_project.tcl
+update_compile_order -fileset sources_1
+update_compile_order -fileset sources_1
+set_property is_enabled false [get_files /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.vhd]
+update_compile_order -fileset sources_1
+# Disabling source management mode. This is to allow the top design properties to be set without GUI intervention.
+set_property source_mgmt_mode None [current_project]
+set_property top firUnit [current_fileset]
+# Re-enabling previously disabled source management mode.
+set_property source_mgmt_mode All [current_project]
+update_compile_order -fileset sources_1
+# Disabling source management mode. This is to allow the top design properties to be set without GUI intervention.
+set_property source_mgmt_mode None [current_project]
+set_property top tb_firUnit [current_fileset]
+# Re-enabling previously disabled source management mode.
+set_property source_mgmt_mode All [current_project]
+update_compile_order -fileset sources_1
+launch_simulation
+source audioProc.tcl
+relaunch_sim
+close_sim
+launch_simulation
+source audioProc.tcl
+# Disabling source management mode. This is to allow the top design properties to be set without GUI intervention.
+set_property source_mgmt_mode None [current_project]
+set_property top tb_firUnit [get_filesets sim_1]
+set_property top_lib xil_defaultlib [get_filesets sim_1]
+# Re-enabling previously disabled source management mode.
+set_property source_mgmt_mode All [current_project]
+launch_simulation
+source tb_firUnit.tcl
+relaunch_sim
+close_sim
+close_sim
+launch_simulation
+source tb_firUnit.tcl
+relaunch_sim
+relaunch_sim
+relaunch_sim
+close_sim
+launch_simulation
+source tb_firUnit.tcl
+add_bp {/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd} 96
+remove_bps -file {/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd} -line 96
+relaunch_sim
+run all
+restart
+relaunch_sim
+run 10 ns
+run 10 ns
+run 10 ns
+run 10 ns
+run 10 ns
+run 10 ns
+run 10 ns
+run 10 ns
+run 10 ns
+run 10 ns
+run 10 ns
+run 10 ns
+run 10 us
+run 10 us
+launch_runs impl_1 -to_step write_bitstream -jobs 6
+wait_on_run impl_1
diff --git a/vivado.log b/vivado.log
new file mode 100644
index 0000000000000000000000000000000000000000..506c20f06f408b551116b73959b511fa5b691efb
--- /dev/null
+++ b/vivado.log
@@ -0,0 +1,1056 @@
+#-----------------------------------------------------------
+# Vivado v2024.1 (64-bit)
+# SW Build 5076996 on Wed May 22 18:36:09 MDT 2024
+# IP Build 5075265 on Wed May 22 21:45:21 MDT 2024
+# SharedData Build 5076995 on Wed May 22 18:29:18 MDT 2024
+# Start of session at: Fri May 9 14:18:35 2025
+# Process ID: 88932
+# Current directory: /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant
+# Command line: vivado
+# Log file: /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/vivado.log
+# Journal file: /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/vivado.jou
+# Running On :fl-tp-br-515
+# Platform :Ubuntu
+# Operating System :Ubuntu 24.04.2 LTS
+# Processor Detail :Intel(R) Core(TM) i5-10500 CPU @ 3.10GHz
+# CPU Frequency :4328.680 MHz
+# CPU Physical cores:6
+# CPU Logical cores :12
+# Host memory :16533 MB
+# Swap memory :4294 MB
+# Total Virtual :20828 MB
+# Available Virtual :18297 MB
+#-----------------------------------------------------------
+start_gui
+cd tp-filtre-etudiant-$USER/proj
+can't read "USER": no such variable
+ls
+WARNING: [Common 17-259] Unknown Tcl command 'ls' sending command to the OS shell for execution. It is recommended to use 'exec' to send the command to the OS shell.
+docs
+proj
+README.md
+src
+vivado.jou
+vivado.log
+vivado_pid88932.str
+WARNING: [Board 49-26] cannot add Board Part xilinx.com:vek280_es:part0:1.0 available at /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vek280/es/rev_a/1.0/board.xml as part xcve2802-vsvh1760-2lp-e-s-es1 specified in board_part file is either invalid or not available
+WARNING: [Board 49-26] cannot add Board Part xilinx.com:vek280_es:part0:1.1 available at /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vek280/es/rev_a/1.1/board.xml as part xcve2802-vsvh1760-2lp-e-s-es1 specified in board_part file is either invalid or not available
+WARNING: [Board 49-26] cannot add Board Part xilinx.com:vek280_es_revb:part0:1.0 available at /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vek280/es/rev_b/1.0/board.xml as part xcve2802-vsvh1760-2mp-e-s-es1 specified in board_part file is either invalid or not available
+WARNING: [Board 49-26] cannot add Board Part xilinx.com:vek280_es_revb:part0:1.1 available at /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vek280/es/rev_b/1.1/board.xml as part xcve2802-vsvh1760-2mp-e-s-es1 specified in board_part file is either invalid or not available
+WARNING: [Board 49-26] cannot add Board Part xilinx.com:vhk158_es:part0:1.0 available at /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vhk158/es/1.0/board.xml as part xcvh1582-vsva3697-2mp-e-s-es1 specified in board_part file is either invalid or not available
+WARNING: [Board 49-26] cannot add Board Part xilinx.com:vhk158_es:part0:1.1 available at /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vhk158/es/1.1/board.xml as part xcvh1582-vsva3697-2mp-e-s-es1 specified in board_part file is either invalid or not available
+WARNING: [Board 49-26] cannot add Board Part xilinx.com:zcu208ld:part0:2.0 available at /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/data/xhub/boards/XilinxBoardStore/boards/Xilinx/zcu208ld/production/2.0/board.xml as part xczu58dr-fsvg1517-2-i specified in board_part file is either invalid or not available
+WARNING: [Board 49-26] cannot add Board Part xilinx.com:zcu216ld:part0:2.0 available at /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/data/xhub/boards/XilinxBoardStore/boards/Xilinx/zcu216ld/production/2.0/board.xml as part xczu59dr-ffvf1760-2-i specified in board_part file is either invalid or not available
+WARNING: [Board 49-26] cannot add Board Part xilinx.com:zcu670ld:part0:1.0 available at /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/data/xhub/boards/XilinxBoardStore/boards/Xilinx/zcu670ld/1.0/board.xml as part xczu57dr-fsve1156-2-i specified in board_part file is either invalid or not available
+cd proj
+ls
+WARNING: [Common 17-259] Unknown Tcl command 'ls' sending command to the OS shell for execution. It is recommended to use 'exec' to send the command to the OS shell.
+cleanup.cmd
+cleanup.sh
+create_project.tcl
+source ./create_project.tcl
+# if {[info exists ::create_path]} {
+# set dest_dir $::create_path
+# } else {
+# set dest_dir [pwd]
+# }
+# puts "INFO: Creating new project in $dest_dir"
+INFO: Creating new project in /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj
+# set proj_name "AudioProc"
+# set origin_dir ".."
+# set orig_proj_dir "[file normalize "$origin_dir/proj"]"
+# set src_dir $origin_dir/src
+# set repo_dir $origin_dir/repo
+# set part_num "xc7a200tsbg484-1"
+# create_project $proj_name $dest_dir
+INFO: [IP_Flow 19-234] Refreshing IP repositories
+INFO: [IP_Flow 19-1704] No user IP repositories specified
+INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/data/ip'.
+create_project: Time (s): cpu = 00:00:08 ; elapsed = 00:00:08 . Memory (MB): peak = 8148.336 ; gain = 197.250 ; free physical = 6602 ; free virtual = 16113
+# set proj_dir [get_property directory [current_project]]
+# set obj [get_projects $proj_name]
+# set_property "default_lib" "xil_defaultlib" $obj
+# set_property "part" "$part_num" $obj
+# set_property "simulator_language" "Mixed" $obj
+# set_property "target_language" "VHDL" $obj
+# if {[string equal [get_filesets -quiet sources_1] ""]} {
+# create_fileset -srcset sources_1
+# }
+# if {[string equal [get_filesets -quiet constrs_1] ""]} {
+# create_fileset -constrset constrs_1
+# }
+# set obj [get_filesets sources_1]
+# set_property "ip_repo_paths" "[file normalize $repo_dir]" $obj
+# add_files -quiet $src_dir/hdl
+# add_files -quiet [glob -nocomplain ../src/ip/*/*.xci]
+# add_files -fileset constrs_1 -quiet $src_dir/constraints
+# if {[string equal [get_runs -quiet synth_1] ""]} {
+# create_run -name synth_1 -part $part_num -flow {Vivado Synthesis 2014} -strategy "Flow_PerfOptimized_High" -constrset constrs_1
+# } else {
+# set_property strategy "Flow_PerfOptimized_High" [get_runs synth_1]
+# set_property flow "Vivado Synthesis 2014" [get_runs synth_1]
+# }
+# set obj [get_runs synth_1]
+# set_property "part" "$part_num" $obj
+# set_property "steps.synth_design.args.fanout_limit" "400" $obj
+# set_property "steps.synth_design.args.fsm_extraction" "one_hot" $obj
+# set_property "steps.synth_design.args.keep_equivalent_registers" "1" $obj
+# set_property "steps.synth_design.args.resource_sharing" "off" $obj
+# set_property "steps.synth_design.args.no_lc" "1" $obj
+# set_property "steps.synth_design.args.shreg_min_size" "5" $obj
+# current_run -synthesis [get_runs synth_1]
+# if {[string equal [get_runs -quiet impl_1] ""]} {
+# create_run -name impl_1 -part $part_num -flow {Vivado Implementation 2014} -strategy "Vivado Implementation Defaults" -constrset constrs_1 -parent_run synth_1
+# } else {
+# set_property strategy "Vivado Implementation Defaults" [get_runs impl_1]
+# set_property flow "Vivado Implementation 2014" [get_runs impl_1]
+# }
+# set obj [get_runs impl_1]
+# set_property "part" "$part_num" $obj
+# set_property "steps.write_bitstream.args.bin_file" "1" $obj
+# current_run -implementation [get_runs impl_1]
+impl_1
+update_compile_order -fileset sources_1
+update_compile_order -fileset sources_1
+set_property is_enabled false [get_files /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.vhd]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+update_compile_order -fileset sources_1
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+set_property top firUnit [current_fileset]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+update_compile_order -fileset sources_1
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+set_property top tb_firUnit [current_fileset]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:]
+update_compile_order -fileset sources_1
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+launch_simulation
+Command: launch_simulation
+INFO: [Vivado 12-12493] Simulation top is 'audioProc'
+INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [SIM-utils-51] Simulation object is 'sim_1'
+INFO: [SIM-utils-72] Using boost library from '/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/tps/boost_1_72_0'
+INFO: [USF-XSim-7] Finding pre-compiled libraries...
+INFO: [USF-XSim-11] File '/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/data/xsim/xsim.ini' copied to run dir:'/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [SIM-utils-54] Inspecting design source files for 'audioProc' in fileset 'sim_1'...
+INFO: [USF-XSim-97] Finding global include files...
+INFO: [USF-XSim-98] Fetching design files from 'sim_1'...
+INFO: [USF-XSim-2] XSim::Compile design
+INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+xvlog --incr --relax -prj audioProc_vlog.prj
+INFO: [VRFC 10-2263] Analyzing Verilog file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/ip/clk_wiz_0/clk_wiz_0_clk_wiz.v" into library xil_defaultlib
+INFO: [VRFC 10-311] analyzing module clk_wiz_0_clk_wiz
+INFO: [VRFC 10-2263] Analyzing Verilog file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/ip/clk_wiz_0/clk_wiz_0.v" into library xil_defaultlib
+INFO: [VRFC 10-311] analyzing module clk_wiz_0
+INFO: [VRFC 10-2263] Analyzing Verilog file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/audio_init.v" into library xil_defaultlib
+INFO: [VRFC 10-311] analyzing module audio_init
+INFO: [VRFC 10-2263] Analyzing Verilog file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/debounce.v" into library xil_defaultlib
+INFO: [VRFC 10-311] analyzing module debounce
+INFO: [VRFC 10-2263] Analyzing Verilog file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v" into library xil_defaultlib
+INFO: [VRFC 10-311] analyzing module operativeUnit
+INFO: [VRFC 10-2263] Analyzing Verilog file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/audioProc.v" into library xil_defaultlib
+INFO: [VRFC 10-311] analyzing module audioProc
+INFO: [VRFC 10-2263] Analyzing Verilog file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim/glbl.v" into library xil_defaultlib
+INFO: [VRFC 10-311] analyzing module glbl
+xvhdl --incr --relax -prj audioProc_vhdl.prj
+INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/TWICtl.vhd" into library xil_defaultlib
+INFO: [VRFC 10-3107] analyzing entity 'TWICtl'
+INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd" into library xil_defaultlib
+INFO: [VRFC 10-3107] analyzing entity 'controlUnit'
+INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd" into library xil_defaultlib
+INFO: [VRFC 10-3107] analyzing entity 'firUnit'
+INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/fir.vhd" into library xil_defaultlib
+INFO: [VRFC 10-3107] analyzing entity 'fir'
+INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/i2s_ctl.vhd" into library xil_defaultlib
+INFO: [VRFC 10-3107] analyzing entity 'i2s_ctl'
+Waiting for jobs to finish...
+No pending jobs, compilation finished.
+execute_script: Time (s): cpu = 00:00:03 ; elapsed = 00:00:12 . Memory (MB): peak = 8459.359 ; gain = 0.000 ; free physical = 5850 ; free virtual = 15540
+INFO: [USF-XSim-69] 'compile' step finished in '12' seconds
+INFO: [USF-XSim-3] XSim::Elaborate design
+INFO: [USF-XSim-61] Executing 'ELABORATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot audioProc_behav xil_defaultlib.audioProc xil_defaultlib.glbl -log elaborate.log
+Vivado Simulator v2024.1
+Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
+Running: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/bin/unwrapped/lnx64.o/xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot audioProc_behav xil_defaultlib.audioProc xil_defaultlib.glbl -log elaborate.log
+Using 8 slave threads.
+Starting static elaboration
+Pass Through NonSizing Optimizer
+WARNING: [VRFC 10-9380] size mismatch in mixed-language port association of VHDL port 'en_tx_i' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/audioProc.v:138]
+WARNING: [VRFC 10-3091] actual bit length 36 differs from formal bit length 48 for port 'P' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:422]
+WARNING: [VRFC 10-3091] actual bit length 3 differs from formal bit length 4 for port 'CO' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:1478]
+WARNING: [VRFC 10-5021] port 'reset' is not connected on this instance [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/audioProc.v:87]
+WARNING: [VRFC 10-5021] port 'dbg_output_0' is not connected on this instance [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/audioProc.v:199]
+WARNING: [VRFC 10-5021] port 'dbg_output_0' is not connected on this instance [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/audioProc.v:208]
+Completed static elaboration
+Starting simulation data flow analysis
+Completed simulation data flow analysis
+Time Resolution for simulation is 1ps
+Compiling package std.standard
+Compiling package std.textio
+Compiling package ieee.std_logic_1164
+Compiling package ieee.std_logic_arith
+Compiling package ieee.std_logic_unsigned
+Compiling package ieee.math_real
+Compiling package ieee.numeric_std
+Compiling module unisims_ver.IBUF
+Compiling module unisims_ver.MMCME2_ADV(CLKFBOUT_MULT_F=6.0,C...
+Compiling module unisims_ver.BUFG
+Compiling module xil_defaultlib.clk_wiz_0_clk_wiz
+Compiling module xil_defaultlib.clk_wiz_0
+Compiling architecture behavioral of entity xil_defaultlib.TWICtl [twictl_default]
+Compiling module xil_defaultlib.audio_init
+Compiling module xil_defaultlib.debounce
+Compiling architecture behavioral of entity xil_defaultlib.i2s_ctl [i2s_ctl_default]
+Compiling architecture archi_operativeunit of entity xil_defaultlib.controlUnit [controlunit_default]
+Compiling module unisims_ver.GND
+Compiling module unisims_ver.OBUF
+Compiling module unisims_ver.x_lut3_mux8
+Compiling module unisims_ver.LUT3
+Compiling module unisims_ver.DSP48E1(ACASCREG=0,ALUMODEREG=0,...
+Compiling module unisims_ver.x_lut2_mux4
+Compiling module unisims_ver.LUT2
+Compiling module unisims_ver.LUT4
+Compiling module unisims_ver.LUT6
+Compiling module unisims_ver.MUXF8
+Compiling module unisims_ver.MUXF7
+Compiling module unisims_ver.FDCE_default
+Compiling module unisims_ver.CARRY4
+Compiling module unisims_ver.LUT5(INIT=32'b0110101010101010)
+Compiling module unisims_ver.VCC
+Compiling module xil_defaultlib.operativeUnit
+Compiling architecture archi_firunit of entity xil_defaultlib.firUnit [firunit_default]
+Compiling architecture myarch of entity xil_defaultlib.fir [\fir(ntaps=16)\]
+Compiling module xil_defaultlib.audioProc
+Compiling module xil_defaultlib.glbl
+Built simulation snapshot audioProc_behav
+execute_script: Time (s): cpu = 00:00:08 ; elapsed = 00:00:13 . Memory (MB): peak = 8459.359 ; gain = 0.000 ; free physical = 5732 ; free virtual = 15477
+INFO: [USF-XSim-69] 'elaborate' step finished in '12' seconds
+INFO: [USF-XSim-4] XSim::Simulate design
+INFO: [USF-XSim-61] Executing 'SIMULATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [USF-XSim-98] *** Running xsim
+ with args "audioProc_behav -key {Behavioral:sim_1:Functional:audioProc} -tclbatch {audioProc.tcl} -log {simulate.log}"
+INFO: [USF-XSim-8] Loading simulator feature
+Time resolution is 1 ps
+source audioProc.tcl
+# set curr_wave [current_wave_config]
+# if { [string length $curr_wave] == 0 } {
+# if { [llength [get_objects]] > 0} {
+# add_wave /
+# set_property needs_save false [current_wave_config]
+# } else {
+# send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console."
+# }
+# }
+# run 1000ns
+INFO: [USF-XSim-96] XSim completed. Design snapshot 'audioProc_behav' loaded.
+INFO: [USF-XSim-97] XSim simulation ran for 1000ns
+launch_simulation: Time (s): cpu = 00:00:21 ; elapsed = 00:00:36 . Memory (MB): peak = 8549.523 ; gain = 99.164 ; free physical = 5741 ; free virtual = 15522
+relaunch_sim
+Command: launch_simulation -step compile -simset sim_1 -mode behavioral
+INFO: [Vivado 12-12493] Simulation top is 'audioProc'
+INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [SIM-utils-51] Simulation object is 'sim_1'
+INFO: [SIM-utils-72] Using boost library from '/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/tps/boost_1_72_0'
+INFO: [USF-XSim-7] Finding pre-compiled libraries...
+INFO: [USF-XSim-11] File '/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/data/xsim/xsim.ini' copied to run dir:'/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [SIM-utils-54] Inspecting design source files for 'audioProc' in fileset 'sim_1'...
+INFO: [USF-XSim-97] Finding global include files...
+INFO: [USF-XSim-98] Fetching design files from 'sim_1'...
+INFO: [USF-XSim-2] XSim::Compile design
+INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+xvlog --incr --relax -prj audioProc_vlog.prj
+xvhdl --incr --relax -prj audioProc_vhdl.prj
+Waiting for jobs to finish...
+No pending jobs, compilation finished.
+INFO: [USF-XSim-69] 'compile' step finished in '3' seconds
+Command: launch_simulation -step elaborate -simset sim_1 -mode behavioral
+INFO: [Vivado 12-12493] Simulation top is 'audioProc'
+INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [SIM-utils-51] Simulation object is 'sim_1'
+INFO: [USF-XSim-3] XSim::Elaborate design
+INFO: [USF-XSim-61] Executing 'ELABORATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot audioProc_behav xil_defaultlib.audioProc xil_defaultlib.glbl -log elaborate.log
+Vivado Simulator v2024.1
+Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
+Running: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/bin/unwrapped/lnx64.o/xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot audioProc_behav xil_defaultlib.audioProc xil_defaultlib.glbl -log elaborate.log
+Using 8 slave threads.
+Starting static elaboration
+Pass Through NonSizing Optimizer
+WARNING: [VRFC 10-9380] size mismatch in mixed-language port association of VHDL port 'en_tx_i' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/audioProc.v:138]
+WARNING: [VRFC 10-3091] actual bit length 36 differs from formal bit length 48 for port 'P' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:422]
+WARNING: [VRFC 10-3091] actual bit length 3 differs from formal bit length 4 for port 'CO' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:1478]
+WARNING: [VRFC 10-5021] port 'reset' is not connected on this instance [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/audioProc.v:87]
+WARNING: [VRFC 10-5021] port 'dbg_output_0' is not connected on this instance [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/audioProc.v:199]
+WARNING: [VRFC 10-5021] port 'dbg_output_0' is not connected on this instance [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/audioProc.v:208]
+Completed static elaboration
+INFO: [XSIM 43-4323] No Change in HDL. Linking previously generated obj files to create kernel
+INFO: [USF-XSim-69] 'elaborate' step finished in '2' seconds
+Time resolution is 1 ps
+relaunch_sim: Time (s): cpu = 00:00:06 ; elapsed = 00:00:07 . Memory (MB): peak = 8549.523 ; gain = 0.000 ; free physical = 5660 ; free virtual = 15430
+close_sim
+INFO: [Simtcl 6-16] Simulation closed
+launch_simulation
+Command: launch_simulation
+INFO: [Vivado 12-12493] Simulation top is 'audioProc'
+INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [SIM-utils-51] Simulation object is 'sim_1'
+INFO: [SIM-utils-72] Using boost library from '/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/tps/boost_1_72_0'
+INFO: [USF-XSim-7] Finding pre-compiled libraries...
+INFO: [USF-XSim-11] File '/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/data/xsim/xsim.ini' copied to run dir:'/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [SIM-utils-54] Inspecting design source files for 'audioProc' in fileset 'sim_1'...
+INFO: [USF-XSim-97] Finding global include files...
+INFO: [USF-XSim-98] Fetching design files from 'sim_1'...
+INFO: [USF-XSim-2] XSim::Compile design
+INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+xvlog --incr --relax -prj audioProc_vlog.prj
+xvhdl --incr --relax -prj audioProc_vhdl.prj
+Waiting for jobs to finish...
+No pending jobs, compilation finished.
+INFO: [USF-XSim-69] 'compile' step finished in '2' seconds
+INFO: [USF-XSim-3] XSim::Elaborate design
+INFO: [USF-XSim-61] Executing 'ELABORATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot audioProc_behav xil_defaultlib.audioProc xil_defaultlib.glbl -log elaborate.log
+Vivado Simulator v2024.1
+Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
+Running: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/bin/unwrapped/lnx64.o/xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot audioProc_behav xil_defaultlib.audioProc xil_defaultlib.glbl -log elaborate.log
+Using 8 slave threads.
+Starting static elaboration
+Pass Through NonSizing Optimizer
+WARNING: [VRFC 10-9380] size mismatch in mixed-language port association of VHDL port 'en_tx_i' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/audioProc.v:138]
+WARNING: [VRFC 10-3091] actual bit length 36 differs from formal bit length 48 for port 'P' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:422]
+WARNING: [VRFC 10-3091] actual bit length 3 differs from formal bit length 4 for port 'CO' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:1478]
+WARNING: [VRFC 10-5021] port 'reset' is not connected on this instance [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/audioProc.v:87]
+WARNING: [VRFC 10-5021] port 'dbg_output_0' is not connected on this instance [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/audioProc.v:199]
+WARNING: [VRFC 10-5021] port 'dbg_output_0' is not connected on this instance [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/audioProc.v:208]
+Completed static elaboration
+INFO: [XSIM 43-4323] No Change in HDL. Linking previously generated obj files to create kernel
+INFO: [USF-XSim-69] 'elaborate' step finished in '2' seconds
+INFO: [USF-XSim-4] XSim::Simulate design
+INFO: [USF-XSim-61] Executing 'SIMULATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [USF-XSim-98] *** Running xsim
+ with args "audioProc_behav -key {Behavioral:sim_1:Functional:audioProc} -tclbatch {audioProc.tcl} -log {simulate.log}"
+INFO: [USF-XSim-8] Loading simulator feature
+Time resolution is 1 ps
+source audioProc.tcl
+# set curr_wave [current_wave_config]
+# if { [string length $curr_wave] == 0 } {
+# if { [llength [get_objects]] > 0} {
+# add_wave /
+# set_property needs_save false [current_wave_config]
+# } else {
+# send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console."
+# }
+# }
+# run 1000ns
+INFO: [USF-XSim-96] XSim completed. Design snapshot 'audioProc_behav' loaded.
+INFO: [USF-XSim-97] XSim simulation ran for 1000ns
+launch_simulation: Time (s): cpu = 00:00:07 ; elapsed = 00:00:08 . Memory (MB): peak = 8556.098 ; gain = 6.574 ; free physical = 5679 ; free virtual = 15450
+set_property top tb_firUnit [get_filesets sim_1]
+set_property top_lib xil_defaultlib [get_filesets sim_1]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:]
+launch_simulation
+Command: launch_simulation
+INFO: [Vivado 12-12493] Simulation top is 'tb_firUnit'
+INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [SIM-utils-51] Simulation object is 'sim_1'
+INFO: [SIM-utils-72] Using boost library from '/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/tps/boost_1_72_0'
+INFO: [USF-XSim-7] Finding pre-compiled libraries...
+INFO: [USF-XSim-11] File '/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/data/xsim/xsim.ini' copied to run dir:'/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [SIM-utils-54] Inspecting design source files for 'tb_firUnit' in fileset 'sim_1'...
+INFO: [USF-XSim-97] Finding global include files...
+INFO: [USF-XSim-98] Fetching design files from 'sim_1'...
+INFO: [USF-XSim-2] XSim::Compile design
+INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+xvlog --incr --relax -prj tb_firUnit_vlog.prj
+xvhdl --incr --relax -prj tb_firUnit_vhdl.prj
+INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd" into library xil_defaultlib
+INFO: [VRFC 10-3107] analyzing entity 'tb_firUnit'
+Waiting for jobs to finish...
+No pending jobs, compilation finished.
+INFO: [USF-XSim-69] 'compile' step finished in '3' seconds
+INFO: [USF-XSim-3] XSim::Elaborate design
+INFO: [USF-XSim-61] Executing 'ELABORATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log
+Vivado Simulator v2024.1
+Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
+Running: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/bin/unwrapped/lnx64.o/xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log
+Using 8 slave threads.
+Starting static elaboration
+Pass Through NonSizing Optimizer
+WARNING: [VRFC 10-3091] actual bit length 36 differs from formal bit length 48 for port 'P' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:422]
+WARNING: [VRFC 10-3091] actual bit length 3 differs from formal bit length 4 for port 'CO' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:1478]
+Completed static elaboration
+Starting simulation data flow analysis
+Completed simulation data flow analysis
+Time Resolution for simulation is 1ps
+Compiling package std.standard
+Compiling package std.textio
+Compiling package ieee.std_logic_1164
+Compiling package ieee.numeric_std
+Compiling package vl.vl_types
+Compiling module xil_defaultlib.glbl
+Compiling architecture archi_operativeunit of entity xil_defaultlib.controlUnit [controlunit_default]
+Compiling module unisims_ver.GND
+Compiling module unisims_ver.BUFG
+Compiling module unisims_ver.IBUF
+Compiling module unisims_ver.OBUF
+Compiling module unisims_ver.x_lut3_mux8
+Compiling module unisims_ver.LUT3
+Compiling module unisims_ver.DSP48E1(ACASCREG=0,ALUMODEREG=0,...
+Compiling module unisims_ver.x_lut2_mux4
+Compiling module unisims_ver.LUT2
+Compiling module unisims_ver.LUT4
+Compiling module unisims_ver.LUT6
+Compiling module unisims_ver.MUXF8
+Compiling module unisims_ver.MUXF7
+Compiling module unisims_ver.FDCE_default
+Compiling module unisims_ver.CARRY4
+Compiling module unisims_ver.LUT5(INIT=32'b0110101010101010)
+Compiling module unisims_ver.VCC
+Compiling module xil_defaultlib.operativeUnit
+Compiling architecture archi_firunit of entity xil_defaultlib.firUnit [firunit_default]
+Compiling architecture archi_tb_firunit of entity xil_defaultlib.tb_firunit
+Built simulation snapshot tb_firUnit_behav
+INFO: [USF-XSim-69] 'elaborate' step finished in '4' seconds
+INFO: [USF-XSim-4] XSim::Simulate design
+INFO: [USF-XSim-61] Executing 'SIMULATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [USF-XSim-98] *** Running xsim
+ with args "tb_firUnit_behav -key {Behavioral:sim_1:Functional:tb_firUnit} -tclbatch {tb_firUnit.tcl} -log {simulate.log}"
+INFO: [USF-XSim-8] Loading simulator feature
+Time resolution is 1 ps
+source tb_firUnit.tcl
+# set curr_wave [current_wave_config]
+# if { [string length $curr_wave] == 0 } {
+# if { [llength [get_objects]] > 0} {
+# add_wave /
+# set_property needs_save false [current_wave_config]
+# } else {
+# send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console."
+# }
+# }
+# run 1000ns
+INFO: [USF-XSim-96] XSim completed. Design snapshot 'tb_firUnit_behav' loaded.
+INFO: [USF-XSim-97] XSim simulation ran for 1000ns
+launch_simulation: Time (s): cpu = 00:00:09 ; elapsed = 00:00:09 . Memory (MB): peak = 8615.930 ; gain = 45.684 ; free physical = 5636 ; free virtual = 15426
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+relaunch_sim
+Command: launch_simulation -step compile -simset sim_1 -mode behavioral
+INFO: [Vivado 12-12493] Simulation top is 'tb_firUnit'
+INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [SIM-utils-51] Simulation object is 'sim_1'
+INFO: [USF-XSim-2] XSim::Compile design
+INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+xvlog --incr --relax -prj tb_firUnit_vlog.prj
+xvhdl --incr --relax -prj tb_firUnit_vhdl.prj
+INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd" into library xil_defaultlib
+INFO: [VRFC 10-3107] analyzing entity 'controlUnit'
+INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd" into library xil_defaultlib
+INFO: [VRFC 10-3107] analyzing entity 'firUnit'
+INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd" into library xil_defaultlib
+INFO: [VRFC 10-3107] analyzing entity 'tb_firUnit'
+Waiting for jobs to finish...
+No pending jobs, compilation finished.
+INFO: [USF-XSim-69] 'compile' step finished in '3' seconds
+Command: launch_simulation -step elaborate -simset sim_1 -mode behavioral
+INFO: [Vivado 12-12493] Simulation top is 'tb_firUnit'
+INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [SIM-utils-51] Simulation object is 'sim_1'
+INFO: [USF-XSim-3] XSim::Elaborate design
+INFO: [USF-XSim-61] Executing 'ELABORATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log
+Vivado Simulator v2024.1
+Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
+Running: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/bin/unwrapped/lnx64.o/xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log
+Using 8 slave threads.
+Starting static elaboration
+Pass Through NonSizing Optimizer
+WARNING: [VRFC 10-3091] actual bit length 36 differs from formal bit length 48 for port 'P' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:422]
+WARNING: [VRFC 10-3091] actual bit length 3 differs from formal bit length 4 for port 'CO' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:1478]
+Completed static elaboration
+Starting simulation data flow analysis
+Completed simulation data flow analysis
+Time Resolution for simulation is 1ps
+Compiling package std.standard
+Compiling package std.textio
+Compiling package ieee.std_logic_1164
+Compiling package ieee.numeric_std
+Compiling package vl.vl_types
+Compiling module xil_defaultlib.glbl
+Compiling architecture archi_operativeunit of entity xil_defaultlib.controlUnit [controlunit_default]
+Compiling module unisims_ver.GND
+Compiling module unisims_ver.BUFG
+Compiling module unisims_ver.IBUF
+Compiling module unisims_ver.OBUF
+Compiling module unisims_ver.x_lut3_mux8
+Compiling module unisims_ver.LUT3
+Compiling module unisims_ver.DSP48E1(ACASCREG=0,ALUMODEREG=0,...
+Compiling module unisims_ver.x_lut2_mux4
+Compiling module unisims_ver.LUT2
+Compiling module unisims_ver.LUT4
+Compiling module unisims_ver.LUT6
+Compiling module unisims_ver.MUXF8
+Compiling module unisims_ver.MUXF7
+Compiling module unisims_ver.FDCE_default
+Compiling module unisims_ver.CARRY4
+Compiling module unisims_ver.LUT5(INIT=32'b0110101010101010)
+Compiling module unisims_ver.VCC
+Compiling module xil_defaultlib.operativeUnit
+Compiling architecture archi_firunit of entity xil_defaultlib.firUnit [firunit_default]
+Compiling architecture archi_tb_firunit of entity xil_defaultlib.tb_firunit
+Built simulation snapshot tb_firUnit_behav
+INFO: [USF-XSim-69] 'elaborate' step finished in '5' seconds
+Time resolution is 1 ps
+relaunch_sim: Time (s): cpu = 00:00:07 ; elapsed = 00:00:09 . Memory (MB): peak = 8636.066 ; gain = 0.000 ; free physical = 5502 ; free virtual = 15300
+close_sim
+INFO: [Simtcl 6-16] Simulation closed
+close_sim
+INFO: [Simtcl 6-16] Simulation closed
+launch_simulation
+Command: launch_simulation
+INFO: [Vivado 12-12493] Simulation top is 'tb_firUnit'
+INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [SIM-utils-51] Simulation object is 'sim_1'
+INFO: [SIM-utils-72] Using boost library from '/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/tps/boost_1_72_0'
+INFO: [USF-XSim-7] Finding pre-compiled libraries...
+INFO: [USF-XSim-11] File '/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/data/xsim/xsim.ini' copied to run dir:'/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [SIM-utils-54] Inspecting design source files for 'tb_firUnit' in fileset 'sim_1'...
+INFO: [USF-XSim-97] Finding global include files...
+INFO: [USF-XSim-98] Fetching design files from 'sim_1'...
+INFO: [USF-XSim-2] XSim::Compile design
+INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+xvlog --incr --relax -prj tb_firUnit_vlog.prj
+xvhdl --incr --relax -prj tb_firUnit_vhdl.prj
+Waiting for jobs to finish...
+No pending jobs, compilation finished.
+INFO: [USF-XSim-69] 'compile' step finished in '2' seconds
+INFO: [USF-XSim-3] XSim::Elaborate design
+INFO: [USF-XSim-61] Executing 'ELABORATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log
+Vivado Simulator v2024.1
+Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
+Running: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/bin/unwrapped/lnx64.o/xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log
+Using 8 slave threads.
+Starting static elaboration
+Pass Through NonSizing Optimizer
+WARNING: [VRFC 10-3091] actual bit length 36 differs from formal bit length 48 for port 'P' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:422]
+WARNING: [VRFC 10-3091] actual bit length 3 differs from formal bit length 4 for port 'CO' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:1478]
+Completed static elaboration
+INFO: [XSIM 43-4323] No Change in HDL. Linking previously generated obj files to create kernel
+INFO: [USF-XSim-69] 'elaborate' step finished in '2' seconds
+INFO: [USF-XSim-4] XSim::Simulate design
+INFO: [USF-XSim-61] Executing 'SIMULATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [USF-XSim-98] *** Running xsim
+ with args "tb_firUnit_behav -key {Behavioral:sim_1:Functional:tb_firUnit} -tclbatch {tb_firUnit.tcl} -log {simulate.log}"
+INFO: [USF-XSim-8] Loading simulator feature
+Time resolution is 1 ps
+source tb_firUnit.tcl
+# set curr_wave [current_wave_config]
+# if { [string length $curr_wave] == 0 } {
+# if { [llength [get_objects]] > 0} {
+# add_wave /
+# set_property needs_save false [current_wave_config]
+# } else {
+# send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console."
+# }
+# }
+# run 1000ns
+INFO: [USF-XSim-96] XSim completed. Design snapshot 'tb_firUnit_behav' loaded.
+INFO: [USF-XSim-97] XSim simulation ran for 1000ns
+launch_simulation: Time (s): cpu = 00:00:05 ; elapsed = 00:00:06 . Memory (MB): peak = 8636.066 ; gain = 0.000 ; free physical = 5547 ; free virtual = 15350
+relaunch_sim
+Command: launch_simulation -step compile -simset sim_1 -mode behavioral
+INFO: [Vivado 12-12493] Simulation top is 'tb_firUnit'
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd:]
+INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [SIM-utils-51] Simulation object is 'sim_1'
+INFO: [USF-XSim-2] XSim::Compile design
+INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+xvlog --incr --relax -prj tb_firUnit_vlog.prj
+xvhdl --incr --relax -prj tb_firUnit_vhdl.prj
+INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd" into library xil_defaultlib
+INFO: [VRFC 10-3107] analyzing entity 'controlUnit'
+INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd" into library xil_defaultlib
+INFO: [VRFC 10-3107] analyzing entity 'firUnit'
+INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd" into library xil_defaultlib
+INFO: [VRFC 10-3107] analyzing entity 'tb_firUnit'
+Waiting for jobs to finish...
+No pending jobs, compilation finished.
+INFO: [USF-XSim-69] 'compile' step finished in '3' seconds
+Command: launch_simulation -step elaborate -simset sim_1 -mode behavioral
+INFO: [Vivado 12-12493] Simulation top is 'tb_firUnit'
+INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [SIM-utils-51] Simulation object is 'sim_1'
+INFO: [USF-XSim-3] XSim::Elaborate design
+INFO: [USF-XSim-61] Executing 'ELABORATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log
+Vivado Simulator v2024.1
+Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
+Running: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/bin/unwrapped/lnx64.o/xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log
+Using 8 slave threads.
+Starting static elaboration
+Pass Through NonSizing Optimizer
+WARNING: [VRFC 10-3091] actual bit length 36 differs from formal bit length 48 for port 'P' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:422]
+WARNING: [VRFC 10-3091] actual bit length 3 differs from formal bit length 4 for port 'CO' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:1478]
+Completed static elaboration
+Starting simulation data flow analysis
+Completed simulation data flow analysis
+Time Resolution for simulation is 1ps
+Compiling package std.standard
+Compiling package std.textio
+Compiling package ieee.std_logic_1164
+Compiling package ieee.numeric_std
+Compiling package vl.vl_types
+Compiling module xil_defaultlib.glbl
+Compiling architecture archi_operativeunit of entity xil_defaultlib.controlUnit [controlunit_default]
+Compiling module unisims_ver.GND
+Compiling module unisims_ver.BUFG
+Compiling module unisims_ver.IBUF
+Compiling module unisims_ver.OBUF
+Compiling module unisims_ver.x_lut3_mux8
+Compiling module unisims_ver.LUT3
+Compiling module unisims_ver.DSP48E1(ACASCREG=0,ALUMODEREG=0,...
+Compiling module unisims_ver.x_lut2_mux4
+Compiling module unisims_ver.LUT2
+Compiling module unisims_ver.LUT4
+Compiling module unisims_ver.LUT6
+Compiling module unisims_ver.MUXF8
+Compiling module unisims_ver.MUXF7
+Compiling module unisims_ver.FDCE_default
+Compiling module unisims_ver.CARRY4
+Compiling module unisims_ver.LUT5(INIT=32'b0110101010101010)
+Compiling module unisims_ver.VCC
+Compiling module xil_defaultlib.operativeUnit
+Compiling architecture archi_firunit of entity xil_defaultlib.firUnit [firunit_default]
+Compiling architecture archi_tb_firunit of entity xil_defaultlib.tb_firunit
+Built simulation snapshot tb_firUnit_behav
+INFO: [USF-XSim-69] 'elaborate' step finished in '5' seconds
+launch_simulation: Time (s): cpu = 00:00:05 ; elapsed = 00:00:06 . Memory (MB): peak = 8636.066 ; gain = 0.000 ; free physical = 5602 ; free virtual = 15329
+Time resolution is 1 ps
+relaunch_sim: Time (s): cpu = 00:00:11 ; elapsed = 00:00:12 . Memory (MB): peak = 8636.066 ; gain = 0.000 ; free physical = 5618 ; free virtual = 15351
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd:]
+relaunch_sim
+Command: launch_simulation -step compile -simset sim_1 -mode behavioral
+INFO: [Vivado 12-12493] Simulation top is 'tb_firUnit'
+INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [SIM-utils-51] Simulation object is 'sim_1'
+INFO: [USF-XSim-2] XSim::Compile design
+INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+xvlog --incr --relax -prj tb_firUnit_vlog.prj
+xvhdl --incr --relax -prj tb_firUnit_vhdl.prj
+INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd" into library xil_defaultlib
+INFO: [VRFC 10-3107] analyzing entity 'controlUnit'
+INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd" into library xil_defaultlib
+INFO: [VRFC 10-3107] analyzing entity 'firUnit'
+INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd" into library xil_defaultlib
+INFO: [VRFC 10-3107] analyzing entity 'tb_firUnit'
+Waiting for jobs to finish...
+No pending jobs, compilation finished.
+INFO: [USF-XSim-69] 'compile' step finished in '3' seconds
+Command: launch_simulation -step elaborate -simset sim_1 -mode behavioral
+INFO: [Vivado 12-12493] Simulation top is 'tb_firUnit'
+INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [SIM-utils-51] Simulation object is 'sim_1'
+INFO: [USF-XSim-3] XSim::Elaborate design
+INFO: [USF-XSim-61] Executing 'ELABORATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log
+Vivado Simulator v2024.1
+Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
+Running: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/bin/unwrapped/lnx64.o/xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log
+Using 8 slave threads.
+Starting static elaboration
+Pass Through NonSizing Optimizer
+WARNING: [VRFC 10-3091] actual bit length 36 differs from formal bit length 48 for port 'P' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:422]
+WARNING: [VRFC 10-3091] actual bit length 3 differs from formal bit length 4 for port 'CO' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:1478]
+Completed static elaboration
+Starting simulation data flow analysis
+Completed simulation data flow analysis
+Time Resolution for simulation is 1ps
+Compiling package std.standard
+Compiling package std.textio
+Compiling package ieee.std_logic_1164
+Compiling package ieee.numeric_std
+Compiling package vl.vl_types
+Compiling module xil_defaultlib.glbl
+Compiling architecture archi_operativeunit of entity xil_defaultlib.controlUnit [controlunit_default]
+Compiling module unisims_ver.GND
+Compiling module unisims_ver.BUFG
+Compiling module unisims_ver.IBUF
+Compiling module unisims_ver.OBUF
+Compiling module unisims_ver.x_lut3_mux8
+Compiling module unisims_ver.LUT3
+Compiling module unisims_ver.DSP48E1(ACASCREG=0,ALUMODEREG=0,...
+Compiling module unisims_ver.x_lut2_mux4
+Compiling module unisims_ver.LUT2
+Compiling module unisims_ver.LUT4
+Compiling module unisims_ver.LUT6
+Compiling module unisims_ver.MUXF8
+Compiling module unisims_ver.MUXF7
+Compiling module unisims_ver.FDCE_default
+Compiling module unisims_ver.CARRY4
+Compiling module unisims_ver.LUT5(INIT=32'b0110101010101010)
+Compiling module unisims_ver.VCC
+Compiling module xil_defaultlib.operativeUnit
+Compiling architecture archi_firunit of entity xil_defaultlib.firUnit [firunit_default]
+Compiling architecture archi_tb_firunit of entity xil_defaultlib.tb_firunit
+Built simulation snapshot tb_firUnit_behav
+INFO: [USF-XSim-69] 'elaborate' step finished in '4' seconds
+Time resolution is 1 ps
+relaunch_sim: Time (s): cpu = 00:00:07 ; elapsed = 00:00:09 . Memory (MB): peak = 8636.066 ; gain = 0.000 ; free physical = 5583 ; free virtual = 15336
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd:]
+relaunch_sim
+Command: launch_simulation -step compile -simset sim_1 -mode behavioral
+INFO: [Vivado 12-12493] Simulation top is 'tb_firUnit'
+INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [SIM-utils-51] Simulation object is 'sim_1'
+INFO: [USF-XSim-2] XSim::Compile design
+INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+xvlog --incr --relax -prj tb_firUnit_vlog.prj
+xvhdl --incr --relax -prj tb_firUnit_vhdl.prj
+INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd" into library xil_defaultlib
+INFO: [VRFC 10-3107] analyzing entity 'controlUnit'
+INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd" into library xil_defaultlib
+INFO: [VRFC 10-3107] analyzing entity 'firUnit'
+INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd" into library xil_defaultlib
+INFO: [VRFC 10-3107] analyzing entity 'tb_firUnit'
+Waiting for jobs to finish...
+No pending jobs, compilation finished.
+INFO: [USF-XSim-69] 'compile' step finished in '3' seconds
+Command: launch_simulation -step elaborate -simset sim_1 -mode behavioral
+INFO: [Vivado 12-12493] Simulation top is 'tb_firUnit'
+INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [SIM-utils-51] Simulation object is 'sim_1'
+INFO: [USF-XSim-3] XSim::Elaborate design
+INFO: [USF-XSim-61] Executing 'ELABORATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log
+Vivado Simulator v2024.1
+Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
+Running: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/bin/unwrapped/lnx64.o/xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log
+Using 8 slave threads.
+Starting static elaboration
+Pass Through NonSizing Optimizer
+WARNING: [VRFC 10-3091] actual bit length 36 differs from formal bit length 48 for port 'P' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:422]
+WARNING: [VRFC 10-3091] actual bit length 3 differs from formal bit length 4 for port 'CO' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:1478]
+Completed static elaboration
+Starting simulation data flow analysis
+Completed simulation data flow analysis
+Time Resolution for simulation is 1ps
+Compiling package std.standard
+Compiling package std.textio
+Compiling package ieee.std_logic_1164
+Compiling package ieee.numeric_std
+Compiling package vl.vl_types
+Compiling module xil_defaultlib.glbl
+Compiling architecture archi_operativeunit of entity xil_defaultlib.controlUnit [controlunit_default]
+Compiling module unisims_ver.GND
+Compiling module unisims_ver.BUFG
+Compiling module unisims_ver.IBUF
+Compiling module unisims_ver.OBUF
+Compiling module unisims_ver.x_lut3_mux8
+Compiling module unisims_ver.LUT3
+Compiling module unisims_ver.DSP48E1(ACASCREG=0,ALUMODEREG=0,...
+Compiling module unisims_ver.x_lut2_mux4
+Compiling module unisims_ver.LUT2
+Compiling module unisims_ver.LUT4
+Compiling module unisims_ver.LUT6
+Compiling module unisims_ver.MUXF8
+Compiling module unisims_ver.MUXF7
+Compiling module unisims_ver.FDCE_default
+Compiling module unisims_ver.CARRY4
+Compiling module unisims_ver.LUT5(INIT=32'b0110101010101010)
+Compiling module unisims_ver.VCC
+Compiling module xil_defaultlib.operativeUnit
+Compiling architecture archi_firunit of entity xil_defaultlib.firUnit [firunit_default]
+Compiling architecture archi_tb_firunit of entity xil_defaultlib.tb_firunit
+Built simulation snapshot tb_firUnit_behav
+INFO: [USF-XSim-69] 'elaborate' step finished in '4' seconds
+Time resolution is 1 ps
+relaunch_sim: Time (s): cpu = 00:00:09 ; elapsed = 00:00:09 . Memory (MB): peak = 8649.246 ; gain = 0.000 ; free physical = 5672 ; free virtual = 15422
+close_sim
+INFO: [Simtcl 6-16] Simulation closed
+launch_simulation
+Command: launch_simulation
+INFO: [Vivado 12-12493] Simulation top is 'tb_firUnit'
+INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [SIM-utils-51] Simulation object is 'sim_1'
+INFO: [SIM-utils-72] Using boost library from '/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/tps/boost_1_72_0'
+INFO: [USF-XSim-7] Finding pre-compiled libraries...
+INFO: [USF-XSim-11] File '/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/data/xsim/xsim.ini' copied to run dir:'/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [SIM-utils-54] Inspecting design source files for 'tb_firUnit' in fileset 'sim_1'...
+INFO: [USF-XSim-97] Finding global include files...
+INFO: [USF-XSim-98] Fetching design files from 'sim_1'...
+INFO: [USF-XSim-2] XSim::Compile design
+INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+xvlog --incr --relax -prj tb_firUnit_vlog.prj
+xvhdl --incr --relax -prj tb_firUnit_vhdl.prj
+Waiting for jobs to finish...
+No pending jobs, compilation finished.
+INFO: [USF-XSim-69] 'compile' step finished in '3' seconds
+INFO: [USF-XSim-3] XSim::Elaborate design
+INFO: [USF-XSim-61] Executing 'ELABORATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log
+Vivado Simulator v2024.1
+Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
+Running: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/bin/unwrapped/lnx64.o/xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log
+Using 8 slave threads.
+Starting static elaboration
+Pass Through NonSizing Optimizer
+WARNING: [VRFC 10-3091] actual bit length 36 differs from formal bit length 48 for port 'P' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:422]
+WARNING: [VRFC 10-3091] actual bit length 3 differs from formal bit length 4 for port 'CO' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:1478]
+Completed static elaboration
+INFO: [XSIM 43-4323] No Change in HDL. Linking previously generated obj files to create kernel
+INFO: [USF-XSim-69] 'elaborate' step finished in '2' seconds
+INFO: [USF-XSim-4] XSim::Simulate design
+INFO: [USF-XSim-61] Executing 'SIMULATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [USF-XSim-98] *** Running xsim
+ with args "tb_firUnit_behav -key {Behavioral:sim_1:Functional:tb_firUnit} -tclbatch {tb_firUnit.tcl} -log {simulate.log}"
+INFO: [USF-XSim-8] Loading simulator feature
+Time resolution is 1 ps
+source tb_firUnit.tcl
+# set curr_wave [current_wave_config]
+# if { [string length $curr_wave] == 0 } {
+# if { [llength [get_objects]] > 0} {
+# add_wave /
+# set_property needs_save false [current_wave_config]
+# } else {
+# send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console."
+# }
+# }
+# run 1000ns
+INFO: [USF-XSim-96] XSim completed. Design snapshot 'tb_firUnit_behav' loaded.
+INFO: [USF-XSim-97] XSim simulation ran for 1000ns
+launch_simulation: Time (s): cpu = 00:00:05 ; elapsed = 00:00:07 . Memory (MB): peak = 8658.109 ; gain = 8.863 ; free physical = 5678 ; free virtual = 15432
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd:]
+add_bp {/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd} 96
+remove_bps -file {/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd} -line 96
+relaunch_sim
+Command: launch_simulation -step compile -simset sim_1 -mode behavioral
+INFO: [Vivado 12-12493] Simulation top is 'tb_firUnit'
+INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [SIM-utils-51] Simulation object is 'sim_1'
+INFO: [USF-XSim-2] XSim::Compile design
+INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+xvlog --incr --relax -prj tb_firUnit_vlog.prj
+xvhdl --incr --relax -prj tb_firUnit_vhdl.prj
+INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd" into library xil_defaultlib
+INFO: [VRFC 10-3107] analyzing entity 'controlUnit'
+INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd" into library xil_defaultlib
+INFO: [VRFC 10-3107] analyzing entity 'firUnit'
+INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd" into library xil_defaultlib
+INFO: [VRFC 10-3107] analyzing entity 'tb_firUnit'
+Waiting for jobs to finish...
+No pending jobs, compilation finished.
+INFO: [USF-XSim-69] 'compile' step finished in '4' seconds
+Command: launch_simulation -step elaborate -simset sim_1 -mode behavioral
+INFO: [Vivado 12-12493] Simulation top is 'tb_firUnit'
+INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [SIM-utils-51] Simulation object is 'sim_1'
+INFO: [USF-XSim-3] XSim::Elaborate design
+INFO: [USF-XSim-61] Executing 'ELABORATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log
+Vivado Simulator v2024.1
+Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
+Running: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/bin/unwrapped/lnx64.o/xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log
+Using 8 slave threads.
+Starting static elaboration
+Pass Through NonSizing Optimizer
+WARNING: [VRFC 10-3091] actual bit length 36 differs from formal bit length 48 for port 'P' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:422]
+WARNING: [VRFC 10-3091] actual bit length 3 differs from formal bit length 4 for port 'CO' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:1478]
+Completed static elaboration
+Starting simulation data flow analysis
+Completed simulation data flow analysis
+Time Resolution for simulation is 1ps
+Compiling package std.standard
+Compiling package std.textio
+Compiling package ieee.std_logic_1164
+Compiling package ieee.numeric_std
+Compiling package vl.vl_types
+Compiling module xil_defaultlib.glbl
+Compiling architecture archi_operativeunit of entity xil_defaultlib.controlUnit [controlunit_default]
+Compiling module unisims_ver.GND
+Compiling module unisims_ver.BUFG
+Compiling module unisims_ver.IBUF
+Compiling module unisims_ver.OBUF
+Compiling module unisims_ver.x_lut3_mux8
+Compiling module unisims_ver.LUT3
+Compiling module unisims_ver.DSP48E1(ACASCREG=0,ALUMODEREG=0,...
+Compiling module unisims_ver.x_lut2_mux4
+Compiling module unisims_ver.LUT2
+Compiling module unisims_ver.LUT4
+Compiling module unisims_ver.LUT6
+Compiling module unisims_ver.MUXF8
+Compiling module unisims_ver.MUXF7
+Compiling module unisims_ver.FDCE_default
+Compiling module unisims_ver.CARRY4
+Compiling module unisims_ver.LUT5(INIT=32'b0110101010101010)
+Compiling module unisims_ver.VCC
+Compiling module xil_defaultlib.operativeUnit
+Compiling architecture archi_firunit of entity xil_defaultlib.firUnit [firunit_default]
+Compiling architecture archi_tb_firunit of entity xil_defaultlib.tb_firunit
+Built simulation snapshot tb_firUnit_behav
+INFO: [USF-XSim-69] 'elaborate' step finished in '5' seconds
+Time resolution is 1 ps
+relaunch_sim: Time (s): cpu = 00:00:07 ; elapsed = 00:00:10 . Memory (MB): peak = 8676.250 ; gain = 0.000 ; free physical = 5699 ; free virtual = 15449
+run all
+restart
+INFO: [Wavedata 42-604] Simulation restarted
+relaunch_sim
+Command: launch_simulation -step compile -simset sim_1 -mode behavioral
+INFO: [Vivado 12-12493] Simulation top is 'tb_firUnit'
+INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [SIM-utils-51] Simulation object is 'sim_1'
+INFO: [USF-XSim-2] XSim::Compile design
+INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+xvlog --incr --relax -prj tb_firUnit_vlog.prj
+xvhdl --incr --relax -prj tb_firUnit_vhdl.prj
+Waiting for jobs to finish...
+No pending jobs, compilation finished.
+INFO: [USF-XSim-69] 'compile' step finished in '3' seconds
+Command: launch_simulation -step elaborate -simset sim_1 -mode behavioral
+INFO: [Vivado 12-12493] Simulation top is 'tb_firUnit'
+INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+INFO: [SIM-utils-51] Simulation object is 'sim_1'
+INFO: [USF-XSim-3] XSim::Elaborate design
+INFO: [USF-XSim-61] Executing 'ELABORATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log
+Vivado Simulator v2024.1
+Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
+Running: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/bin/unwrapped/lnx64.o/xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log
+Using 8 slave threads.
+Starting static elaboration
+Pass Through NonSizing Optimizer
+WARNING: [VRFC 10-3091] actual bit length 36 differs from formal bit length 48 for port 'P' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:422]
+WARNING: [VRFC 10-3091] actual bit length 3 differs from formal bit length 4 for port 'CO' [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:1478]
+Completed static elaboration
+INFO: [XSIM 43-4323] No Change in HDL. Linking previously generated obj files to create kernel
+INFO: [USF-XSim-69] 'elaborate' step finished in '2' seconds
+Time resolution is 1 ps
+relaunch_sim: Time (s): cpu = 00:00:10 ; elapsed = 00:00:06 . Memory (MB): peak = 8723.930 ; gain = 0.000 ; free physical = 5641 ; free virtual = 15424
+run 10 ns
+run 10 ns
+run 10 ns
+run 10 ns
+run 10 ns
+run 10 ns
+run 10 ns
+run 10 ns
+run 10 ns
+run 10 ns
+run 10 ns
+run 10 ns
+run 10 us
+run 10 us
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.v:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:]
+WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd:]
+launch_runs impl_1 -to_step write_bitstream -jobs 6
+[Fri May 9 16:03:06 2025] Launched synth_1...
+Run output will be captured here: /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.runs/synth_1/runme.log
+[Fri May 9 16:03:06 2025] Launched impl_1...
+Run output will be captured here: /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.runs/impl_1/runme.log
diff --git a/vivado_pid88932.str b/vivado_pid88932.str
new file mode 100644
index 0000000000000000000000000000000000000000..dc2755318e8695dd329629044af2f69a00a3701c
--- /dev/null
+++ b/vivado_pid88932.str
@@ -0,0 +1,4534 @@
+/*
+
+AMD Vivado v2024.1 (64-bit) [Major: 2024, Minor: 1]
+SW Build: 5076996 on Wed May 22 18:36:09 MDT 2024
+IP Build: 5075265 on Wed May 22 21:45:21 MDT 2024
+IP Build: 5075265 on Wed May 22 21:45:21 MDT 2024
+
+Process ID (PID): 88932
+License: Customer
+Mode: GUI Mode
+
+Current time: Fri May 09 14:20:51 CEST 2025
+Time zone: Central European Standard Time (Europe/Paris)
+
+OS: Ubuntu
+OS Version: 6.8.0-59-generic
+OS Architecture: amd64
+Available processors (cores): 12
+LSB Release Description: DISTRIB_ID=Ubuntu
+
+Display: 0
+Screen size: 1680x1050
+Local screen bounds: x = 66, y = 32, width = 1614, height = 1018
+Screen resolution (DPI): 100
+Available screens: 1
+Default font: family=Dialog,name=Dialog,style=plain,size=12
+Scale size: 12
+OS font scaling: 100%
+Anti-Alias Enabled: false
+
+Java version: 21.0.1 64-bit
+JavaFX version: 21.0.1
+Java home: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/tps/lnx64/jre21.0.1_12
+Java executable: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/tps/lnx64/jre21.0.1_12/bin/java
+Java arguments: [-Dsun.java2d.pmoffscreen=false, -Dhttps.protocols=TLSv1,TLSv1.1,TLSv1.2, -Dsun.java2d.xrender=false, -Dsun.java2d.uiScale.enabled=false, -Dswing.aatext=true, -XX:-UsePerfData, -Djdk.map.althashing.threshold=512, -XX:StringTableSize=4072, -XX:+UseStringDeduplication, -XX:MaxGCPauseMillis=200, -XX:+ParallelRefProcEnabled, --add-opens=java.desktop/javax.swing.plaf.synth=ALL-UNNAMED, --add-opens=java.base/java.nio=ALL-UNNAMED, --add-opens=java.desktop/sun.swing=ALL-UNNAMED, --add-opens=java.desktop/javax.swing=ALL-UNNAMED, --add-opens=java.desktop/javax.swing.tree=ALL-UNNAMED, --add-opens=java.desktop/javax.swing.plaf.basic=ALL-UNNAMED, --add-opens=java.desktop/javax.swing.plaf.synth=ALL-UNNAMED, --add-opens=java.desktop/javax.swing.plaf.basic=ALL-UNNAMED, --add-opens=java.desktop/javax.swing=ALL-UNNAMED, --add-opens=java.desktop/javax.swing.tree=ALL-UNNAMED, --add-opens=java.desktop/java.awt.event=ALL-UNNAMED, --add-exports=java.desktop/javax.swing.plaf.synth=ALL-UNNAMED, --add-exports=java.base/java.nio=ALL-UNNAMED, --add-exports=java.desktop/sun.swing=ALL-UNNAMED, --add-exports=java.desktop/javax.swing=ALL-UNNAMED, --add-exports=java.desktop/javax.swing.tree=ALL-UNNAMED, --add-exports=java.desktop/javax.swing.plaf.basic=ALL-UNNAMED, --add-exports=java.desktop/sun.swing=ALL-UNNAMED, --add-exports=java.desktop/sun.swing.table=ALL-UNNAMED, --add-exports=java.desktop/sun.swing.plaf.synth=ALL-UNNAMED, --add-exports=java.desktop/sun.awt.shell=ALL-UNNAMED, --add-exports=java.base/sun.security.action=ALL-UNNAMED, --add-exports=java.desktop/sun.font=ALL-UNNAMED, --add-opens=java.desktop/sun.awt.X11=ALL-UNNAMED, -XX:NewSize=80m, -XX:MaxNewSize=80m, -Xms512m, -Xmx4072m, -Xss10m, -Xrs]
+Java initial memory (-Xms): 512 MB
+Java maximum memory (-Xmx): 3 GB
+
+User name: l24nicot
+User home directory: /homes/l24nicot
+User working directory: /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant
+User country: US
+User language: en
+User locale: en_US
+
+RDI_BASEROOT: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado
+HDI_APPROOT: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1
+RDI_DATADIR: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/SharedData/2024.1/data:/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/data
+RDI_BINDIR: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/bin
+
+Vivado preferences file: /homes/l24nicot/.Xilinx/Vivado/2024.1/vivado.xml
+Vivado preferences directory: /homes/l24nicot/.Xilinx/Vivado/2024.1/
+Vivado layouts directory: /homes/l24nicot/.Xilinx/Vivado/2024.1/data/layouts
+PlanAhead jar file: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/lib/classes/planAhead.jar
+Vivado log file: /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/vivado.log
+Vivado journal file: /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/vivado.jou
+Engine tmp dir: ./.Xil/Vivado-88932-fl-tp-br-515
+Non-Default Parameters: []
+
+Xilinx & AMD Environment Variables
+--------------------------------------------------------------------------------------------
+GNOME_SHELL_SESSION_MODE: ubuntu
+RDI_APPROOT: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1
+RDI_BASEROOT: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado
+RDI_BINROOT: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/bin
+RDI_BUILD: yes
+RDI_DATADIR: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/SharedData/2024.1/data:/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/data
+RDI_INSTALLROOT: /usr/home/enstb1/MEE/Xilinx/vivado2024.1
+RDI_INSTALLVER: 2024.1
+RDI_JAVA_PLATFORM:
+RDI_JAVA_VERSION: 21.0.1_12
+RDI_LIBDIR: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/lib/lnx64.o/Ubuntu:/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/lib/lnx64.o
+RDI_OPT_EXT: .o
+RDI_PATCHROOT:
+RDI_PLATFORM: lnx64
+RDI_PREPEND_PATH: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vitis/2024.1/bin:/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/ids_lite/ISE/bin/lin64
+RDI_PROG: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/bin/unwrapped/lnx64.o/vivado
+RDI_SESSION_INFO: /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant:fl-tp-br-515_1746793104_88863
+RDI_SHARED_DATA: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/SharedData/2024.1/data
+RDI_TPS_ROOT: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/tps/lnx64
+RDI_USE_JDK21: True
+SHELL: /bin/bash
+XILINX: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/ids_lite/ISE
+XILINXD_LICENSE_FILE: 27007@licence-01.imta.fr
+XILINX_DSP: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/ids_lite/ISE
+XILINX_HLS: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vitis_HLS/2024.1
+XILINX_PLANAHEAD: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1
+XILINX_SDK: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vitis/2024.1
+XILINX_VITIS: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vitis/2024.1
+XILINX_VIVADO: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1
+XILINX_VIVADO_HLS: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1
+
+
+GUI allocated memory: 512 MB
+GUI max memory: 4,072 MB
+Engine allocated memory: 1,501 MB
+
+Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
+
+*/
+
+// TclEventType: START_GUI
+// Tcl Message: start_gui
+// HMemoryUtils.trashcanNow. Engine heap size: 1,525 MB. GUI used memory: 72 MB. Current time: 5/9/25, 2:20:52 PM CEST
+// HMemoryUtils.trashcanNow. Engine heap size: 1,681 MB. GUI used memory: 70 MB. Current time: 5/9/25, 2:21:12 PM CEST
+selectCodeEditor(RDIResource.TclConsoleView_TCL_CONSOLE_CODE_EDITOR, 95, 17); // cC (RDIResource.TclConsoleView_TCL_CONSOLE_CODE_EDITOR)
+typeControlKey(RDIResource.TclConsoleView_TCL_CONSOLE_CODE_EDITOR, "RDIResource.TclConsoleView_TCL_CONSOLE_CODE_EDITOR", 'v'); // cC (RDIResource.TclConsoleView_TCL_CONSOLE_CODE_EDITOR)
+// Tcl (Dont Echo) Command: 'rdi::info_commands bd::match_path'
+setText(RDIResource.CommandsInput_TYPE_TCL_COMMAND_HERE, "cd tp-filtre-etudiant-$USER/proj", true); // h.b (RDIResource.CommandsInput_TYPE_TCL_COMMAND_HERE)
+// Tcl Command: 'cd tp-filtre-etudiant-$USER/proj'
+// HMemoryUtils.trashcanNow. Engine heap size: 1,847 MB. GUI used memory: 71 MB. Current time: 5/9/25, 2:21:32 PM CEST
+// Tcl Message: cd tp-filtre-etudiant-$USER/proj
+// Tcl Message: can't read "USER": no such variable
+setText(RDIResource.CommandsInput_TYPE_TCL_COMMAND_HERE, "ls", true); // h.b (RDIResource.CommandsInput_TYPE_TCL_COMMAND_HERE)
+// Tcl Command: 'ls'
+// Tcl Message: ls
+// Tcl Message: docs proj README.md src vivado.jou vivado.log vivado_pid88932.str
+// Tcl (Dont Echo) Command: 'rdi::info_commands {cd*}'
+setText(RDIResource.CommandsInput_TYPE_TCL_COMMAND_HERE, "cd proj", true); // h.b (RDIResource.CommandsInput_TYPE_TCL_COMMAND_HERE)
+// Tcl Command: 'cd proj'
+// Tcl Message: cd proj
+setText(RDIResource.CommandsInput_TYPE_TCL_COMMAND_HERE, "ls", true); // h.b (RDIResource.CommandsInput_TYPE_TCL_COMMAND_HERE)
+// Tcl Command: 'ls'
+// Tcl Message: ls
+// Tcl Message: cleanup.cmd cleanup.sh create_project.tcl
+// [GUI Memory]: 99 MB (+100813kb) [00:01:38]
+// [Engine Memory]: 1,858 MB (+1796753kb) [00:01:38]
+setText(RDIResource.CommandsInput_TYPE_TCL_COMMAND_HERE, (String) null); // h.b (RDIResource.CommandsInput_TYPE_TCL_COMMAND_HERE)
+setText(RDIResource.CommandsInput_TYPE_TCL_COMMAND_HERE, (String) null); // h.b (RDIResource.CommandsInput_TYPE_TCL_COMMAND_HERE)
+// Tcl (Dont Echo) Command: 'rdi::info_commands bd::match_path'
+setText(RDIResource.CommandsInput_TYPE_TCL_COMMAND_HERE, "source ./create_project.tcl", true); // h.b (RDIResource.CommandsInput_TYPE_TCL_COMMAND_HERE)
+// Tcl Command: 'source ./create_project.tcl'
+// TclEventType: DEBUG_PROBE_SET_CHANGE
+// TclEventType: FLOW_ADDED
+// Tcl Message: source ./create_project.tcl
+// Tcl Message: # if {[info exists ::create_path]} { # set dest_dir $::create_path # } else { # set dest_dir [pwd] # } # puts "INFO: Creating new project in $dest_dir"
+// Tcl Message: INFO: Creating new project in /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj
+// Tcl Message: # set proj_name "AudioProc" # set origin_dir ".." # set orig_proj_dir "[file normalize "$origin_dir/proj"]" # set src_dir $origin_dir/src # set repo_dir $origin_dir/repo # set part_num "xc7a200tsbg484-1" # create_project $proj_name $dest_dir
+// TclEventType: FILE_SET_NEW
+// TclEventType: RUN_ADD
+// TclEventType: RUN_CURRENT
+// TclEventType: PROJECT_DASHBOARD_NEW
+// TclEventType: PROJECT_DASHBOARD_GADGET_NEW
+// TclEventType: PROJECT_DASHBOARD_GADGET_CHANGE
+// TclEventType: PROJECT_DASHBOARD_GADGET_NEW
+// TclEventType: PROJECT_DASHBOARD_GADGET_CHANGE
+// TclEventType: PROJECT_DASHBOARD_GADGET_NEW
+// TclEventType: PROJECT_DASHBOARD_GADGET_CHANGE
+// TclEventType: PROJECT_DASHBOARD_GADGET_NEW
+// TclEventType: PROJECT_DASHBOARD_GADGET_CHANGE
+// TclEventType: PROJECT_DASHBOARD_GADGET_NEW
+// TclEventType: PROJECT_DASHBOARD_GADGET_CHANGE
+// TclEventType: PROJECT_DASHBOARD_GADGET_NEW
+// TclEventType: PROJECT_DASHBOARD_GADGET_CHANGE
+// TclEventType: PROJECT_NEW
+// Tcl Message: INFO: [IP_Flow 19-234] Refreshing IP repositories INFO: [IP_Flow 19-1704] No user IP repositories specified
+// TclEventType: PROJECT_NEW
+// [GUI Memory]: 140 MB (+37802kb) [00:01:57]
+// [Engine Memory]: 1,966 MB (+15308kb) [00:01:58]
+// WARNING: HEventQueue.dispatchEvent() is taking 3632 ms.
+// TclEventType: FILE_SET_OPTIONS_CHANGE
+// Tcl Message: INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/data/ip'.
+// TclEventType: FILE_SET_OPTIONS_CHANGE
+// TclEventType: RUN_MODIFY
+// HMemoryUtils.trashcanNow. Engine heap size: 2,051 MB. GUI used memory: 78 MB. Current time: 5/9/25, 2:22:07 PM CEST
+// TclEventType: RUN_MODIFY
+// TclEventType: CREATE_IP_CATALOG
+// TclEventType: PART_MODIFIED
+// TclEventType: PROJECT_CHANGE
+// TclEventType: FILE_SET_OPTIONS_CHANGE
+// TclEventType: FILE_SET_CHANGE
+// TclEventType: IP_LOCK_CHANGE
+// TclEventType: COMPOSITE_FILE_CHANGE
+// TclEventType: FILE_SET_CHANGE
+// TclEventType: RUN_OPTIONS_MODIFIED
+// TclEventType: RUN_MODIFY
+// TclEventType: RUN_OPTIONS_MODIFIED
+// TclEventType: RUN_MODIFY
+// Tcl Message: create_project: Time (s): cpu = 00:00:08 ; elapsed = 00:00:08 . Memory (MB): peak = 8148.336 ; gain = 197.250 ; free physical = 6602 ; free virtual = 16113
+// TclEventType: RUN_OPTIONS_MODIFIED
+// TclEventType: RUN_MODIFY
+// [GUI Memory]: 154 MB (+7545kb) [00:02:02]
+// TclEventType: RUN_MODIFY
+// TclEventType: RUN_OPTIONS_MODIFIED
+// Tcl Message: # set obj [get_runs impl_1] # set_property "part" "$part_num" $obj # set_property "steps.write_bitstream.args.bin_file" "1" $obj # current_run -implementation [get_runs impl_1]
+// Tcl Message: impl_1
+// Elapsed time: 10 seconds
+dismissDialog("Tcl Command"); // bj (Tcl Command Progress)
+// TclEventType: FILE_SET_CHANGE
+// TclEventType: DG_GRAPH_STALE
+// TclEventType: FILE_SET_CHANGE
+// TclEventType: DG_GRAPH_STALE
+// Tcl Message: update_compile_order -fileset sources_1
+setText(RDIResource.CommandsInput_TYPE_TCL_COMMAND_HERE, (String) null); // h.b (RDIResource.CommandsInput_TYPE_TCL_COMMAND_HERE)
+// TclEventType: DG_GRAPH_STALE
+// TclEventType: FILE_SET_CHANGE
+// [Engine Memory]: 2,083 MB (+19804kb) [00:02:11]
+// Tcl Message: update_compile_order -fileset sources_1
+// Elapsed time: 21 seconds
+setText(RDIResource.CommandsInput_TYPE_TCL_COMMAND_HERE, (String) null); // h.b (RDIResource.CommandsInput_TYPE_TCL_COMMAND_HERE)
+selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, Syntax Error Files]", 1, true); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE) - Node
+expandTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, Syntax Error Files]", 1); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, Syntax Error Files, controlUnit.vhd]", 2, false); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, Syntax Error Files, controlUnit.vhd]", 2, false, false, false, false, false, true); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE) - Double Click
+// HMemoryUtils.trashcanNow. Engine heap size: 2,137 MB. GUI used memory: 80 MB. Current time: 5/9/25, 2:22:47 PM CEST
+selectCodeEditor("controlUnit.vhd", 96, 255); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 96, 255, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 219, 269); // ac (controlUnit.vhd)
+// Elapsed time: 12 seconds
+selectCodeEditor("controlUnit.vhd", 128, 358); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 241, 294); // ac (controlUnit.vhd)
+// Elapsed time: 56 seconds
+selectCodeEditor("controlUnit.vhd", 108, 235); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 108, 235, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 174, 246); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 12, 235); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 217, 268); // ac (controlUnit.vhd)
+// Elapsed time: 16 seconds
+selectCodeEditor("controlUnit.vhd", 76, 266); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 76, 266, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 91, 186); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 203, 233); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 75, 262); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 100, 353); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 244, 186); // ac (controlUnit.vhd)
+// Elapsed time: 14 seconds
+selectCodeEditor("controlUnit.vhd", 128, 143); // ac (controlUnit.vhd)
+// Elapsed time: 15 seconds
+typeControlKey(null, null, 'z');
+selectCodeEditor("controlUnit.vhd", 449, 272); // ac (controlUnit.vhd)
+// Elapsed time: 175 seconds
+selectCodeEditor("controlUnit.vhd", 186, 144); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 255, 219); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 105, 97); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 105, 97, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 167, 136); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 33, 126); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 199, 118); // ac (controlUnit.vhd)
+// Elapsed time: 13 seconds
+selectCodeEditor("controlUnit.vhd", 74, 161); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 73, 174); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 73, 174, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 114, 182); // ac (controlUnit.vhd)
+// Elapsed time: 32 seconds
+selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, Syntax Error Files, operativeUnit.vhd]", 3, false); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, Syntax Error Files, operativeUnit.vhd]", 3, false, false, false, false, false, true); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE) - Double Click
+// [Engine Memory]: 2,189 MB (+2638kb) [00:08:55]
+// HMemoryUtils.trashcanNow. Engine heap size: 2,199 MB. GUI used memory: 80 MB. Current time: 5/9/25, 2:29:02 PM CEST
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "controlUnit.vhd", 1); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+// Elapsed time: 84 seconds
+selectCodeEditor("controlUnit.vhd", 44, 233); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 257, 245); // ac (controlUnit.vhd)
+// Elapsed time: 66 seconds
+selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, tb_firUnit(archi_tb_firUnit) (tb_firUnit.vhd)]", 5, true); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE) - Node
+selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, tb_firUnit(archi_tb_firUnit) (tb_firUnit.vhd)]", 5, true); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE) - Node
+selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, tb_firUnit(archi_tb_firUnit) (tb_firUnit.vhd)]", 5, true, false, false, false, false, true); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE) - Double Click - Node
+// HMemoryUtils.trashcanNow. Engine heap size: 2,230 MB. GUI used memory: 80 MB. Current time: 5/9/25, 2:31:47 PM CEST
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "controlUnit.vhd", 1); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+// Elapsed time: 48 seconds
+selectCodeEditor("controlUnit.vhd", 157, 136); // ac (controlUnit.vhd)
+// Elapsed time: 91 seconds
+selectCodeEditor("controlUnit.vhd", 101, 51); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 101, 50, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 116, 222); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 116, 222, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+// Elapsed time: 13 seconds
+selectCodeEditor("controlUnit.vhd", 292, 311); // ac (controlUnit.vhd)
+// Elapsed time: 38 seconds
+selectCodeEditor("controlUnit.vhd", 124, 271); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 123, 271, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 197, 96); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 197, 96, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+// Elapsed time: 46 seconds
+selectCodeEditor("controlUnit.vhd", 232, 101); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 232, 101, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 92, 56); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 75, 128); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 48, 98); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 257, 110); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 258, 98); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 71, 126); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 71, 126, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 203, 132); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 203, 132, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 266, 175); // ac (controlUnit.vhd)
+// Elapsed time: 34 seconds
+selectCodeEditor("controlUnit.vhd", 117, 173); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 117, 173, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 200, 350); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 200, 350, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 271, 367); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 115, 310); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 115, 310, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 162, 343); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 115, 302); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 115, 302, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 217, 312); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 217, 312, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 95, 310); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 95, 310, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 81, 383); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 81, 383, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 240, 362); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 118, 380); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 126, 378); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+typeControlKey(null, null, 'z');
+typeControlKey(null, null, 'z');
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 81, 321); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 81, 321, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 83, 296); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 83, 296, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 114, 284); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 114, 284, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 83, 296); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 83, 296, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 291, 249); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 291, 249, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 76, 291); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 76, 291, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 132, 307); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 132, 307, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 421, 111); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 421, 111, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 74, 322); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 74, 322, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 102, 409); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 255, 96); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 46, 115); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 244, 152); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 26, 127); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 268, 159); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 46, 131); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 306, 149); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 254, 165); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 233, 142); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 233, 142, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 240, 168); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 265, 147); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 227, 146); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 227, 146, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 206, 278); // ac (controlUnit.vhd)
+// Elapsed time: 44 seconds
+selectCodeEditor("controlUnit.vhd", 206, 278, false, false, false, true, false); // ac (controlUnit.vhd) - Popup Trigger
+selectCodeEditor("controlUnit.vhd", 203, 269); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 43, 352); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 42, 249); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 53, 283); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 21, 279); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 54, 308); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 55, 316); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 58, 296); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 59, 263); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 218, 102); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 218, 102, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 60, 265); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 60, 264); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+// Elapsed time: 11 seconds
+selectCodeEditor("controlUnit.vhd", 67, 264); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 219, 266); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 213, 266); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 58, 291); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+// Elapsed time: 75 seconds
+selectCodeEditor("controlUnit.vhd", 101, 336); // ac (controlUnit.vhd)
+typeControlKey(null, null, 'z');
+typeControlKey(null, null, 'z');
+typeControlKey(null, null, 'z');
+selectCodeEditor("controlUnit.vhd", 406, 159); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 406, 159, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 75, 367); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 75, 367, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 125, 369); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 143, 371); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 52, 381); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 79, 367); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 79, 367, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 146, 386); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 146, 386, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 476, 154); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 476, 154, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 82, 394); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 82, 394, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 250, 377); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 42, 235); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 39, 247); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 124, 210); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 125, 209); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 145, 230); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 133, 211); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 133, 211, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 145, 206); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 145, 206, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 178, 217); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 130, 206); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 130, 206, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 211, 155); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 300, 343); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 379, 367); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 179, 374); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 199, 281); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 42, 236); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 47, 250); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 77, 266); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 193, 282); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 231, 265); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 222, 143); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 222, 143, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 237, 282); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 10, 236); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 301, 240); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 100, 220); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 100, 220, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 218, 236); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 130, 216); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 130, 216, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 115, 251); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 115, 251, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 61, 262); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 243, 242); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 118, 218); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 118, 218, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 96, 277); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 96, 277, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 60, 293); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 291, 266); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 184, 246); // ac (controlUnit.vhd)
+// Elapsed time: 116 seconds
+selectCodeEditor("controlUnit.vhd", 90, 145); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 90, 145, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+// Elapsed time: 69 seconds
+selectCodeEditor("controlUnit.vhd", 194, 342); // ac (controlUnit.vhd)
+// Elapsed time: 36 seconds
+selectCodeEditor("controlUnit.vhd", 19, 235); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 96, 227); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 104, 223); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 100, 233); // ac (controlUnit.vhd)
+// Elapsed time: 79 seconds
+selectCodeEditor("controlUnit.vhd", 135, 261); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 135, 261, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 71, 296); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 71, 296, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 128, 267); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 128, 267, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+// Elapsed time: 10 seconds
+selectCodeEditor("controlUnit.vhd", 75, 295); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 75, 295, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 118, 268); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 118, 268, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 177, 320); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 177, 320, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 143, 264); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 149, 267); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 142, 266); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 236, 283); // ac (controlUnit.vhd)
+// Elapsed time: 22 seconds
+selectCodeEditor("controlUnit.vhd", 129, 293); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 129, 293, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 117, 330); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 117, 330, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 116, 323); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 116, 323, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 118, 299); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 118, 299, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+// Elapsed time: 14 seconds
+selectCodeEditor("controlUnit.vhd", 45, 299); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 45, 319); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 58, 333); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 85, 321); // ac (controlUnit.vhd)
+// Elapsed time: 14 seconds
+selectCodeEditor("controlUnit.vhd", 270, 323); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 80, 322); // ac (controlUnit.vhd)
+// Elapsed time: 15 seconds
+selectCodeEditor("controlUnit.vhd", 158, 176); // ac (controlUnit.vhd)
+// Elapsed time: 31 seconds
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 197, 291); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+// Elapsed time: 13 seconds
+selectCodeEditor("controlUnit.vhd", 80, 367); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+// Elapsed time: 11 seconds
+selectCodeEditor("controlUnit.vhd", 338, 369); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 263, 385); // ac (controlUnit.vhd)
+// Elapsed time: 15 seconds
+selectCodeEditor("controlUnit.vhd", 99, 189); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 99, 189, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 215, 296); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 61, 277); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 59, 322); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 82, 324); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 230, 343); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 142, 268); // ac (controlUnit.vhd)
+// Elapsed time: 14 seconds
+selectCodeEditor("controlUnit.vhd", 256, 231); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 260, 252); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 283, 281); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 268, 321); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 283, 354); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 305, 306); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 191, 269); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 266, 247); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 291, 293); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 261, 353); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 246, 392); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 332, 157); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 295, 241); // ac (controlUnit.vhd)
+// Elapsed time: 33 seconds
+selectCodeEditor("controlUnit.vhd", 167, 400); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 178, 400); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 189, 401); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 187, 398); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 88, 335); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 189, 355); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 81, 339); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 55, 381); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 191, 400); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 173, 383); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 56, 429); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 58, 389); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 56, 428); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 180, 400); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 61, 385); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 58, 427); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 42, 201); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 308, 317); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 267, 114); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 282, 142); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 163, 189); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 259, 280); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 112, 294); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 260, 311); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 291, 363); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 64, 367); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 157, 356); // ac (controlUnit.vhd)
+// Elapsed time: 10 seconds
+selectCodeEditor("controlUnit.vhd", 205, 325); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 205, 325, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 114, 355); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 114, 355, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+// Elapsed time: 32 seconds
+selectCodeEditor("controlUnit.vhd", 301, 231); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 269, 265); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 244, 311); // ac (controlUnit.vhd)
+// Elapsed time: 25 seconds
+selectCodeEditor("controlUnit.vhd", 129, 233); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 129, 233, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 100, 123); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 100, 123, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 118, 112); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 118, 112, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 211, 267); // ac (controlUnit.vhd)
+// Elapsed time: 27 seconds
+selectCodeEditor("controlUnit.vhd", 295, 341); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 154, 379); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 245, 264); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 239, 258); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 309, 396); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 83, 350); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 41, 353); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 49, 275); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 68, 292); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 138, 324); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 213, 280); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 130, 128); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 130, 128, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 248, 307); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 248, 307, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 215, 344); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 85, 289); // ac (controlUnit.vhd)
+// Elapsed time: 209 seconds
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "operativeUnit.vhd", 2); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+// Elapsed time: 10 seconds
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "tb_firUnit.vhd", 3); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+// Elapsed time: 13 seconds
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "controlUnit.vhd", 1); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+// HMemoryUtils.trashcanNow. Engine heap size: 2,233 MB. GUI used memory: 81 MB. Current time: 5/9/25, 3:01:47 PM CEST
+// Elapsed time: 287 seconds
+selectCodeEditor("controlUnit.vhd", 121, 366); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 121, 366, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 226, 399); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 226, 399, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+// Elapsed time: 14 seconds
+selectCodeEditor("controlUnit.vhd", 286, 193); // ac (controlUnit.vhd)
+// Elapsed time: 58 seconds
+selectCodeEditor("controlUnit.vhd", 246, 188); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 87, 293); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 321, 307); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 376, 268); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 355, 320); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 17, 306); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 377, 400); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 52, 308); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 52, 308, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 254, 307); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 254, 307, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 275, 311); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 260, 310); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 254, 310); // ac (controlUnit.vhd)
+// Elapsed time: 19 seconds
+selectCodeEditor("controlUnit.vhd", 265, 315); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 274, 313); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 274, 313, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+// Elapsed time: 21 seconds
+selectCodeEditor("controlUnit.vhd", 58, 330); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 16, 311); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 225, 325); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 221, 307); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 256, 311); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 256, 311, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+// Elapsed time: 35 seconds
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "operativeUnit.vhd", 2); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "controlUnit.vhd", 1); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+// Elapsed time: 126 seconds
+selectCodeEditor("controlUnit.vhd", 84, 159); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 268, 128); // ac (controlUnit.vhd)
+// Elapsed time: 141 seconds
+selectCodeEditor("controlUnit.vhd", 99, 338); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 99, 338, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 219, 312); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 126, 275); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 126, 275, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+// Elapsed time: 10 seconds
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "operativeUnit.vhd", 2); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "controlUnit.vhd", 1); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+// Elapsed time: 23 seconds
+selectCodeEditor("controlUnit.vhd", 121, 116); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 121, 116, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 278, 277); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 278, 277, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 454, 231); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 257, 281); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 254, 279); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 278, 293); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 278, 293, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 269, 310); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 269, 310, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 328, 145); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 328, 145, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 399, 307); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 399, 307, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 260, 305); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 306, 318); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 255, 309); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 272, 323); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 272, 323, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 394, 297); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 394, 297, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 412, 324); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 412, 324, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 485, 309); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 284, 338); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 284, 338, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 283, 354); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 283, 354, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 400, 353); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 400, 353, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+// Elapsed time: 49 seconds
+selectCodeEditor("controlUnit.vhd", 277, 345); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 277, 345, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 270, 371); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 278, 372); // ac (controlUnit.vhd)
+// Elapsed time: 92 seconds
+selectCodeEditor("controlUnit.vhd", 132, 250); // ac (controlUnit.vhd)
+// Elapsed time: 60 seconds
+selectCodeEditor("controlUnit.vhd", 25, 198); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 157, 229); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 18, 190); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 18, 356); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 171, 301); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 114, 298); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 204, 277); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 112, 116); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 112, 116, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 100, 81); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 324, 84); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 140, 281); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 140, 281, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 324, 83); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 361, 119); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 97, 115); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 97, 115, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 347, 133); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 411, 39); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 411, 39, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 348, 212); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 386, 28); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 386, 29, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 391, 37); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 391, 37, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 368, 199); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 82, 42); // ac (controlUnit.vhd)
+// Elapsed time: 12 seconds
+selectCodeEditor("controlUnit.vhd", 302, 314); // ac (controlUnit.vhd)
+// Elapsed time: 240 seconds
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "operativeUnit.vhd", 2); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectTab((HResource) null, "PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "operativeUnit.vhd", 2, true, false); // o (PlanAheadTabBaseWorkspace_JideTabbedPane) - Popup Trigger
+selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, Syntax Error Files, operativeUnit.vhd]", 3, false); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, Syntax Error Files, operativeUnit.vhd]", 3, false, false, false, false, true, false); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE) - Popup Trigger
+selectMenu(PAResourceCommand.PACommandNames_OPEN_FILE_WITH, "Open With"); // am (PAResourceCommand.PACommandNames_OPEN_FILE_WITH, Open With)
+selectMenuItem(PAResourceCommand.PACommandNames_SRC_DISABLE, "Disable File"); // ap (PAResourceCommand.PACommandNames_SRC_DISABLE, src_disable_menu)
+// Run Command: PAResourceCommand.PACommandNames_SRC_DISABLE
+// TclEventType: DG_GRAPH_STALE
+// TclEventType: FILE_SET_CHANGE
+// Tcl Message: set_property is_enabled false [get_files /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/operativeUnit.vhd]
+// Elapsed Time for: 'L.f': 01h:00m:54s
+// HMemoryUtils.trashcanNow. Engine heap size: 2,262 MB. GUI used memory: 81 MB. Current time: 5/9/25, 3:23:02 PM CEST
+// TclEventType: DG_GRAPH_STALE
+// TclEventType: FILE_SET_CHANGE
+// Elapsed Time for: 'L.f': 01h:00m:58s
+// Tcl Message: update_compile_order -fileset sources_1
+// Elapsed Time for: 'L.f': 01h:01m:00s
+// Elapsed Time for: 'L.f': 01h:01m:04s
+// Elapsed time: 19 seconds
+selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, tb_firUnit(archi_tb_firUnit) (tb_firUnit.vhd)]", 4, true); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE) - Node
+selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, tb_firUnit(archi_tb_firUnit) (tb_firUnit.vhd)]", 4, true, false, false, false, true, false); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE) - Popup Trigger - Node
+selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, tb_firUnit(archi_tb_firUnit) (tb_firUnit.vhd), firUnit_1 : firUnit(archi_firUnit) (firUnit.vhd)]", 5, true); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE) - Node
+selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, tb_firUnit(archi_tb_firUnit) (tb_firUnit.vhd), firUnit_1 : firUnit(archi_firUnit) (firUnit.vhd)]", 5, true, false, false, false, true, false); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE) - Popup Trigger - Node
+selectMenu(PAResourceCommand.PACommandNames_AUTO_UPDATE_HIER, "Hierarchy Update"); // am (PAResourceCommand.PACommandNames_AUTO_UPDATE_HIER, Hierarchy Update)
+selectMenu(PAResourceQtoS.SrcMenu_IP_HIERARCHY, "IP Hierarchy"); // am (PAResourceQtoS.SrcMenu_IP_HIERARCHY, IP Hierarchy)
+selectMenuItem(PAResourceCommand.PACommandNames_SET_AS_TOP, "Set as Top"); // ap (PAResourceCommand.PACommandNames_SET_AS_TOP, set_as_top_menu)
+// Run Command: PAResourceCommand.PACommandNames_SET_AS_TOP
+// TclEventType: FILE_SET_CHANGE
+// TclEventType: FILE_SET_OPTIONS_CHANGE
+// TclEventType: DG_GRAPH_STALE
+// Tcl Message: set_property top firUnit [current_fileset]
+// TclEventType: DG_GRAPH_STALE
+// Elapsed Time for: 'L.f': 01h:01m:18s
+// [Engine Memory]: 2,306 MB (+7326kb) [01:03:18]
+// TclEventType: DG_GRAPH_STALE
+// TclEventType: FILE_SET_CHANGE
+// Elapsed Time for: 'L.f': 01h:01m:20s
+// Tcl Message: update_compile_order -fileset sources_1
+// HMemoryUtils.trashcanNow. Engine heap size: 2,316 MB. GUI used memory: 82 MB. Current time: 5/9/25, 3:23:27 PM CEST
+// Elapsed Time for: 'L.f': 01h:01m:22s
+selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, tb_firUnit(archi_tb_firUnit) (tb_firUnit.vhd)]", 4, true); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE) - Node
+// Elapsed Time for: 'L.f': 01h:01m:24s
+selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, tb_firUnit(archi_tb_firUnit) (tb_firUnit.vhd)]", 4, true, false, false, false, true, false); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE) - Popup Trigger - Node
+selectMenu(PAResourceCommand.PACommandNames_OPEN_FILE_WITH, "Open With"); // am (PAResourceCommand.PACommandNames_OPEN_FILE_WITH, Open With)
+selectMenu(PAResourceCommand.PACommandNames_AUTO_UPDATE_HIER, "Hierarchy Update"); // am (PAResourceCommand.PACommandNames_AUTO_UPDATE_HIER, Hierarchy Update)
+selectMenu(PAResourceQtoS.SrcMenu_IP_HIERARCHY, "IP Hierarchy"); // am (PAResourceQtoS.SrcMenu_IP_HIERARCHY, IP Hierarchy)
+selectMenuItem(PAResourceCommand.PACommandNames_SET_AS_TOP, "Set as Top"); // ap (PAResourceCommand.PACommandNames_SET_AS_TOP, set_as_top_menu)
+// Run Command: PAResourceCommand.PACommandNames_SET_AS_TOP
+// TclEventType: FILE_SET_CHANGE
+// TclEventType: FILE_SET_OPTIONS_CHANGE
+// TclEventType: DG_GRAPH_STALE
+// Tcl Message: set_property top tb_firUnit [current_fileset]
+// TclEventType: DG_GRAPH_STALE
+// Elapsed Time for: 'L.f': 01h:01m:26s
+// TclEventType: DG_GRAPH_STALE
+// TclEventType: FILE_SET_CHANGE
+// Elapsed Time for: 'L.f': 01h:01m:28s
+// Tcl Message: update_compile_order -fileset sources_1
+// Elapsed Time for: 'L.f': 01h:01m:30s
+// Elapsed Time for: 'L.f': 01h:01m:34s
+expandTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, Disabled Sources]", 6); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+collapseTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, Disabled Sources]", 6); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+expandTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, Disabled Sources]", 6); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+selectTree(PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, "[, Simulation, Run Simulation]", 10, false); // g (PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, Flow Navigator Tree)
+selectMenuItem(PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL, "Run Behavioral Simulation"); // ap (PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL, simulation_run_behavioral_menu)
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL
+selectButton(PAResourceQtoS.SaveProjectUtils_SAVE, "Save", "Save Project"); // a (PAResourceQtoS.SaveProjectUtils_SAVE)
+// TclEventType: DG_GRAPH_STALE
+dismissDialog("Save Project"); // Z.d (dialog0)
+// TclEventType: LAUNCH_SIM
+// TclEventType: DG_GRAPH_STALE
+// TclEventType: FILE_SET_CHANGE
+// TclEventType: LAUNCH_SIM
+// TclEventType: FILE_SET_CHANGE
+// Tcl Message: launch_simulation
+// Tcl Message: Command: launch_simulation
+// Tcl Message: INFO: [Vivado 12-12493] Simulation top is 'audioProc'
+// TclEventType: FILE_SET_OPTIONS_CHANGE
+// Tcl Message: INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim' INFO: [SIM-utils-51] Simulation object is 'sim_1' INFO: [SIM-utils-72] Using boost library from '/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/tps/boost_1_72_0'
+// Tcl Message: INFO: [USF-XSim-7] Finding pre-compiled libraries... INFO: [USF-XSim-11] File '/usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/data/xsim/xsim.ini' copied to run dir:'/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim' INFO: [SIM-utils-54] Inspecting design source files for 'audioProc' in fileset 'sim_1'...
+// TclEventType: LOAD_FEATURE
+// TclEventType: PACKAGER_MESSAGE_RESET
+// TclEventType: PACKAGER_UNLOAD_CORE
+// Tcl Message: INFO: [USF-XSim-97] Finding global include files... INFO: [USF-XSim-98] Fetching design files from 'sim_1'...
+// Tcl Message: INFO: [USF-XSim-2] XSim::Compile design
+// Tcl Message: INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+// Tcl Message: xvlog --incr --relax -prj audioProc_vlog.prj
+// Tcl Message: INFO: [VRFC 10-2263] Analyzing Verilog file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/ip/clk_wiz_0/clk_wiz_0_clk_wiz.v" into library xil_defaultlib INFO: [VRFC 10-311] analyzing module clk_wiz_0_clk_wiz
+// TclEventType: LAUNCH_SIM_LOG
+// Tcl Message: execute_script: Time (s): cpu = 00:00:03 ; elapsed = 00:00:12 . Memory (MB): peak = 8459.359 ; gain = 0.000 ; free physical = 5850 ; free virtual = 15540
+// Tcl Message: INFO: [USF-XSim-69] 'compile' step finished in '12' seconds INFO: [USF-XSim-3] XSim::Elaborate design INFO: [USF-XSim-61] Executing 'ELABORATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+// Tcl Message: xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot audioProc_behav xil_defaultlib.audioProc xil_defaultlib.glbl -log elaborate.log
+// Tcl Message: Vivado Simulator v2024.1 Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved. Running: /usr/home/enstb1/MEE/Xilinx/vivado2024.1/Vivado/2024.1/bin/unwrapped/lnx64.o/xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot audioProc_behav xil_defaultlib.audioProc xil_defaultlib.glbl -log elaborate.log Using 8 slave threads. Starting static elaboration
+// Tcl Message: Starting simulation data flow analysis Completed simulation data flow analysis Time Resolution for simulation is 1ps Compiling package std.standard Compiling package std.textio Compiling package ieee.std_logic_1164 Compiling package ieee.std_logic_arith Compiling package ieee.std_logic_unsigned Compiling package ieee.math_real Compiling package ieee.numeric_std Compiling module unisims_ver.IBUF Compiling module unisims_ver.MMCME2_ADV(CLKFBOUT_MULT_F=6.0,C...
+// HMemoryUtils.trashcanNow. Engine heap size: 2,349 MB. GUI used memory: 83 MB. Current time: 5/9/25, 3:24:26 PM CEST
+// TclEventType: LAUNCH_SIM
+// Tcl Message: Built simulation snapshot audioProc_behav
+// Tcl Message: execute_script: Time (s): cpu = 00:00:08 ; elapsed = 00:00:13 . Memory (MB): peak = 8459.359 ; gain = 0.000 ; free physical = 5732 ; free virtual = 15477
+// Tcl Message: INFO: [USF-XSim-69] 'elaborate' step finished in '12' seconds INFO: [USF-XSim-4] XSim::Simulate design INFO: [USF-XSim-61] Executing 'SIMULATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim' INFO: [USF-XSim-98] *** Running xsim
+// Tcl Message: with args "audioProc_behav -key {Behavioral:sim_1:Functional:audioProc} -tclbatch {audioProc.tcl} -log {simulate.log}"
+// Tcl Message: INFO: [USF-XSim-8] Loading simulator feature
+// TclEventType: LOAD_FEATURE
+// TclEventType: SIMULATION_CREATE_SIMULATION_OBJECT
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// Elapsed time: 34 seconds
+closeView(PAResourceOtoP.PAViews_PROJECT_SUMMARY, "Project Summary"); // u (PAResourceOtoP.PAViews_PROJECT_SUMMARY, PlanAheadTabProject Summary)
+// TclEventType: WAVEFORM_UPDATE_TITLE
+// TclEventType: WAVEFORM_OPEN_WCFG
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// Tcl Message: Time resolution is 1 ps
+// TclEventType: WAVEFORM_OPEN_WCFG
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MODEL_EVENT
+// Tcl Message: source audioProc.tcl
+// Tcl Message: # set curr_wave [current_wave_config] # if { [string length $curr_wave] == 0 } { # if { [llength [get_objects]] > 0} { # add_wave / # set_property needs_save false [current_wave_config] # } else { # send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console." # } # }
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+// HMemoryUtils.trashcanNow. Engine heap size: 2,432 MB. GUI used memory: 90 MB. Current time: 5/9/25, 3:24:31 PM CEST
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_UPDATE_TITLE
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_TITLE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// [Engine Memory]: 2,432 MB (+11766kb) [01:04:25]
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: # run 1000ns
+// Tcl Message: INFO: [USF-XSim-96] XSim completed. Design snapshot 'audioProc_behav' loaded. INFO: [USF-XSim-97] XSim simulation ran for 1000ns
+// Tcl Message: launch_simulation: Time (s): cpu = 00:00:21 ; elapsed = 00:00:36 . Memory (MB): peak = 8549.523 ; gain = 99.164 ; free physical = 5741 ; free virtual = 15522
+// Elapsed Time for: 'h': 42s
+// 'd' command handler elapsed time: 42 seconds
+dismissDialog("Run Simulation"); // e (Run Simulation Progress)
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+// Elapsed Time for: 'L.f': 01h:02m:28s
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,413 MB. GUI used memory: 88 MB. Current time: 5/9/25, 3:24:43 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,413 MB. GUI used memory: 88 MB. Current time: 5/9/25, 3:24:44 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,413 MB. GUI used memory: 88 MB. Current time: 5/9/25, 3:24:45 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,413 MB. GUI used memory: 89 MB. Current time: 5/9/25, 3:24:48 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,457 MB. GUI used memory: 91 MB. Current time: 5/9/25, 3:24:57 PM CEST
+// Elapsed time: 25 seconds
+maximizeView(PAResourceOtoP.PAViews_BASE_WORKSPACE, "BaseWorkspace"); // L (PAResourceOtoP.PAViews_BASE_WORKSPACE, PlanAheadTabBaseWorkspace)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// [Engine Memory]: 3,457 MB (+946876kb) [01:04:51]
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+selectButton(RDIResource.GraphicalView_ZOOM_FIT, "Waveform Viewer_zoom_fit"); // B (RDIResource.GraphicalView_ZOOM_FIT, Waveform Viewer_zoom_fit)
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,413 MB. GUI used memory: 91 MB. Current time: 5/9/25, 3:25:04 PM CEST
+selectMenu("Waveform Style"); // am (Waveform Style)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,413 MB. GUI used memory: 92 MB. Current time: 5/9/25, 3:25:09 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,413 MB. GUI used memory: 92 MB. Current time: 5/9/25, 3:25:09 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,413 MB. GUI used memory: 91 MB. Current time: 5/9/25, 3:25:10 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,413 MB. GUI used memory: 91 MB. Current time: 5/9/25, 3:25:10 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,413 MB. GUI used memory: 91 MB. Current time: 5/9/25, 3:25:12 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,413 MB. GUI used memory: 92 MB. Current time: 5/9/25, 3:25:12 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,413 MB. GUI used memory: 91 MB. Current time: 5/9/25, 3:25:14 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,413 MB. GUI used memory: 92 MB. Current time: 5/9/25, 3:25:15 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// Elapsed time: 27 seconds
+expandTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, outputRightSample[23:0]]", 21); // k (RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE)
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+collapseTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, outputRightSample[23:0]]", 21); // k (RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// HMemoryUtils.trashcanNow. Engine heap size: 2,430 MB. GUI used memory: 92 MB. Current time: 5/9/25, 3:25:34 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+expandTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, outputLeftSample[23:0]]", 20); // k (RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+collapseTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, outputLeftSample[23:0]]", 20); // k (RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+expandTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, inputRightSample[23:0]]", 19); // k (RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// HMemoryUtils.trashcanNow. Engine heap size: 2,430 MB. GUI used memory: 92 MB. Current time: 5/9/25, 3:25:36 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+collapseTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, inputRightSample[23:0]]", 19); // k (RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+expandTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, inputLeftSample[23:0]]", 18); // k (RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+collapseTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, inputLeftSample[23:0]]", 18); // k (RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// HMemoryUtils.trashcanNow. Engine heap size: 2,432 MB. GUI used memory: 91 MB. Current time: 5/9/25, 3:25:37 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,432 MB. GUI used memory: 91 MB. Current time: 5/9/25, 3:25:43 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,432 MB. GUI used memory: 92 MB. Current time: 5/9/25, 3:25:43 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+selectButton(RDIResource.GraphicalView_ZOOM_FIT, "Waveform Viewer_zoom_fit"); // B (RDIResource.GraphicalView_ZOOM_FIT, Waveform Viewer_zoom_fit)
+unMinimizeFrame(PAResourceOtoP.PAViews_TCL_CONSOLE, "Tcl Console"); // R (PAResourceOtoP.PAViews_TCL_CONSOLE, Tcl Console)
+// HMemoryUtils.trashcanNow. Engine heap size: 3,476 MB. GUI used memory: 90 MB. Current time: 5/9/25, 3:25:49 PM CEST
+// Elapsed time: 31 seconds
+selectButton(PAResourceCommand.PACommandNames_SIMULATION_RELAUNCH, "simulation_relaunch"); // B (PAResourceCommand.PACommandNames_SIMULATION_RELAUNCH, simulation_relaunch)
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_RELAUNCH
+// TclEventType: SIMULATION_MODEL_ABOUT_TO_CLOSE
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: SIMULATION_MODEL_RELOADED
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: LAUNCH_SIM
+// TclEventType: FILE_SET_OPTIONS_CHANGE
+// TclEventType: PACKAGER_MESSAGE_RESET
+// TclEventType: PACKAGER_UNLOAD_CORE
+// Tcl Message: relaunch_sim
+// Tcl Message: Command: launch_simulation -step compile -simset sim_1 -mode behavioral
+// Tcl Message: INFO: [USF-XSim-2] XSim::Compile design INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+// Tcl Message: xvlog --incr --relax -prj audioProc_vlog.prj
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+// Tcl Message: xvhdl --incr --relax -prj audioProc_vhdl.prj
+// TclEventType: LAUNCH_SIM
+// TclEventType: FILE_SET_OPTIONS_CHANGE
+// Tcl Message: Waiting for jobs to finish... No pending jobs, compilation finished.
+// Tcl Message: INFO: [USF-XSim-69] 'compile' step finished in '3' seconds
+// Tcl Message: Command: launch_simulation -step elaborate -simset sim_1 -mode behavioral
+// Tcl Message: INFO: [Vivado 12-12493] Simulation top is 'audioProc' INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim' INFO: [SIM-utils-51] Simulation object is 'sim_1' INFO: [USF-XSim-3] XSim::Elaborate design INFO: [USF-XSim-61] Executing 'ELABORATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+// Tcl Message: xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot audioProc_behav xil_defaultlib.audioProc xil_defaultlib.glbl -log elaborate.log
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: INFO: [USF-XSim-69] 'elaborate' step finished in '2' seconds
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_MODEL_ABOUT_TO_CLOSE
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: SIMULATION_MODEL_RELOADED
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_DELETE_ALL_BREAKPOINTS
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// HMemoryUtils.trashcanNow. Engine heap size: 2,430 MB. GUI used memory: 90 MB. Current time: 5/9/25, 3:26:27 PM CEST
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: Time resolution is 1 ps relaunch_sim: Time (s): cpu = 00:00:06 ; elapsed = 00:00:07 . Memory (MB): peak = 8549.523 ; gain = 0.000 ; free physical = 5660 ; free virtual = 15430
+// 'a' command handler elapsed time: 7 seconds
+dismissDialog("Relaunch Simulation"); // b (Relaunch Simulation Progress)
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,430 MB. GUI used memory: 90 MB. Current time: 5/9/25, 3:26:32 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,430 MB. GUI used memory: 78 MB. Current time: 5/9/25, 3:26:38 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,430 MB. GUI used memory: 77 MB. Current time: 5/9/25, 3:26:47 PM CEST
+// Elapsed time: 22 seconds
+expandTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, out_audioR[23:0]]", 6); // k (RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,430 MB. GUI used memory: 77 MB. Current time: 5/9/25, 3:26:51 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+selectGraphicalView(RDIResource.RDIViews_WAVEFORM_VIEWER, 72, 269); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer)
+/********** leftMouseClick (827, 531, true); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer) **********/
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,430 MB. GUI used memory: 77 MB. Current time: 5/9/25, 3:26:53 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 3,474 MB. GUI used memory: 77 MB. Current time: 5/9/25, 3:26:55 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,430 MB. GUI used memory: 77 MB. Current time: 5/9/25, 3:26:58 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,430 MB. GUI used memory: 76 MB. Current time: 5/9/25, 3:26:58 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+collapseTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, out_audioR[23:0]]", 9); // k (RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE)
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,430 MB. GUI used memory: 77 MB. Current time: 5/9/25, 3:27:49 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,430 MB. GUI used memory: 73 MB. Current time: 5/9/25, 3:27:51 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,430 MB. GUI used memory: 73 MB. Current time: 5/9/25, 3:27:51 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_CLOSE_WCFG
+// Elapsed time: 72 seconds
+closeView(RDIResource.RDIViews_WAVEFORM_VIEWER, "Untitled 1"); // t (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer)
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "operativeUnit.vhd", 1); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "controlUnit.vhd", 0); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+unMinimizeFrame(PAResourceOtoP.PAViews_SOURCES, "Sources"); // R (PAResourceOtoP.PAViews_SOURCES, Sources)
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+expandTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, tb_firUnit(archi_tb_firUnit) (tb_firUnit.vhd), firUnit_1 : firUnit(archi_firUnit) (firUnit.vhd)]", 2); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+collapseTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, tb_firUnit(archi_tb_firUnit) (tb_firUnit.vhd), firUnit_1 : firUnit(archi_firUnit) (firUnit.vhd)]", 2); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "tb_firUnit.vhd", 2); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectTree(PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, "[, Simulation, Run Simulation]", 10, false); // g (PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, Flow Navigator Tree)
+selectMenuItem(PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL, "Run Behavioral Simulation"); // ap (PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL, simulation_run_behavioral_menu)
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL
+selectButton("OptionPane.button", "Yes", "Simulation is Already Running"); // JButton (OptionPane.button)
+// TclEventType: SIMULATION_CLOSE_SIMULATION
+// Tcl Message: close_sim
+// Tcl Message: INFO: [Simtcl 6-16] Simulation closed
+dismissDialog("Close"); // bj (Close Progress)
+// TclEventType: LAUNCH_SIM
+// TclEventType: FILE_SET_OPTIONS_CHANGE
+// TclEventType: PACKAGER_MESSAGE_RESET
+// TclEventType: PACKAGER_UNLOAD_CORE
+// Tcl Message: launch_simulation
+// Tcl Message: Command: launch_simulation
+// Tcl Message: INFO: [USF-XSim-2] XSim::Compile design INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+// Tcl Message: xvlog --incr --relax -prj audioProc_vlog.prj
+// Tcl Message: xvhdl --incr --relax -prj audioProc_vhdl.prj
+// TclEventType: LAUNCH_SIM_LOG
+// Tcl Message: Waiting for jobs to finish... No pending jobs, compilation finished.
+// Tcl Message: INFO: [USF-XSim-69] 'compile' step finished in '2' seconds INFO: [USF-XSim-3] XSim::Elaborate design INFO: [USF-XSim-61] Executing 'ELABORATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+// Tcl Message: xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot audioProc_behav xil_defaultlib.audioProc xil_defaultlib.glbl -log elaborate.log
+// TclEventType: LAUNCH_SIM
+// Tcl Message: INFO: [USF-XSim-69] 'elaborate' step finished in '2' seconds INFO: [USF-XSim-4] XSim::Simulate design INFO: [USF-XSim-61] Executing 'SIMULATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim' INFO: [USF-XSim-98] *** Running xsim
+// Tcl Message: with args "audioProc_behav -key {Behavioral:sim_1:Functional:audioProc} -tclbatch {audioProc.tcl} -log {simulate.log}"
+// Tcl Message: INFO: [USF-XSim-8] Loading simulator feature
+// TclEventType: SIMULATION_CREATE_SIMULATION_OBJECT
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+closeView(PAResourceOtoP.PAViews_PROJECT_SUMMARY, "Project Summary"); // u (PAResourceOtoP.PAViews_PROJECT_SUMMARY, PlanAheadTabProject Summary)
+// TclEventType: WAVEFORM_UPDATE_TITLE
+// TclEventType: WAVEFORM_OPEN_WCFG
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: WAVEFORM_OPEN_WCFG
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+// HMemoryUtils.trashcanNow. Engine heap size: 2,441 MB. GUI used memory: 75 MB. Current time: 5/9/25, 3:28:42 PM CEST
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_UPDATE_TITLE
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_TITLE
+// Tcl Message: Time resolution is 1 ps
+// Tcl Message: source audioProc.tcl
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: # set curr_wave [current_wave_config] # if { [string length $curr_wave] == 0 } { # if { [llength [get_objects]] > 0} { # add_wave / # set_property needs_save false [current_wave_config] # } else { # send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console." # } # }
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: # run 1000ns
+// Tcl Message: INFO: [USF-XSim-96] XSim completed. Design snapshot 'audioProc_behav' loaded. INFO: [USF-XSim-97] XSim simulation ran for 1000ns
+// Tcl Message: launch_simulation: Time (s): cpu = 00:00:07 ; elapsed = 00:00:08 . Memory (MB): peak = 8556.098 ; gain = 6.574 ; free physical = 5679 ; free virtual = 15450
+// 'd' command handler elapsed time: 10 seconds
+dismissDialog("Run Simulation"); // e (Run Simulation Progress)
+// HMemoryUtils.trashcanNow. Engine heap size: 3,485 MB. GUI used memory: 76 MB. Current time: 5/9/25, 3:28:44 PM CEST
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+// Elapsed time: 11 seconds
+selectTab((HResource) null, (HResource) null, "Sources", 1); // aa
+expandTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources]", 7); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+expandTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1]", 8); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, tb_firUnit(archi_tb_firUnit) (tb_firUnit.vhd)]", 10, true); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE) - Node
+selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, tb_firUnit(archi_tb_firUnit) (tb_firUnit.vhd)]", 10, true, false, false, false, true, false); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE) - Popup Trigger - Node
+selectMenu(PAResourceCommand.PACommandNames_AUTO_UPDATE_HIER, "Hierarchy Update"); // am (PAResourceCommand.PACommandNames_AUTO_UPDATE_HIER, Hierarchy Update)
+selectMenu(PAResourceQtoS.SrcMenu_IP_HIERARCHY, "IP Hierarchy"); // am (PAResourceQtoS.SrcMenu_IP_HIERARCHY, IP Hierarchy)
+selectMenuItem(PAResourceCommand.PACommandNames_SET_AS_TOP, "Set as Top"); // ap (PAResourceCommand.PACommandNames_SET_AS_TOP, set_as_top_menu)
+// Run Command: PAResourceCommand.PACommandNames_SET_AS_TOP
+// TclEventType: FILE_SET_CHANGE
+// TclEventType: FILE_SET_OPTIONS_CHANGE
+// Tcl Message: set_property top tb_firUnit [get_filesets sim_1]
+// TclEventType: FILE_SET_CHANGE
+// TclEventType: FILE_SET_OPTIONS_CHANGE
+// TclEventType: DG_GRAPH_STALE
+// Tcl Message: set_property top_lib xil_defaultlib [get_filesets sim_1]
+// TclEventType: DG_GRAPH_STALE
+// Elapsed Time for: 'L.f': 01h:07m:00s
+// Elapsed Time for: 'L.f': 01h:07m:02s
+selectTree(PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, "[, Simulation, Run Simulation]", 10, false); // g (PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, Flow Navigator Tree)
+selectMenuItem(PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL, "Run Behavioral Simulation"); // ap (PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL, simulation_run_behavioral_menu)
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL
+// TclEventType: LAUNCH_SIM
+// TclEventType: FILE_SET_OPTIONS_CHANGE
+// TclEventType: PACKAGER_MESSAGE_RESET
+// TclEventType: PACKAGER_UNLOAD_CORE
+// Tcl Message: launch_simulation
+// Tcl Message: Command: launch_simulation
+// Tcl Message: xvlog --incr --relax -prj tb_firUnit_vlog.prj
+// Tcl Message: xvhdl --incr --relax -prj tb_firUnit_vhdl.prj
+// TclEventType: LAUNCH_SIM_LOG
+// Tcl Message: INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd" into library xil_defaultlib INFO: [VRFC 10-3107] analyzing entity 'tb_firUnit' Waiting for jobs to finish... No pending jobs, compilation finished.
+// Tcl Message: INFO: [USF-XSim-69] 'compile' step finished in '3' seconds INFO: [USF-XSim-3] XSim::Elaborate design INFO: [USF-XSim-61] Executing 'ELABORATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+// Tcl Message: xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log
+// TclEventType: LAUNCH_SIM
+// Tcl Message: Built simulation snapshot tb_firUnit_behav
+// Tcl Message: INFO: [USF-XSim-69] 'elaborate' step finished in '4' seconds INFO: [USF-XSim-4] XSim::Simulate design INFO: [USF-XSim-61] Executing 'SIMULATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim' INFO: [USF-XSim-98] *** Running xsim
+// Tcl Message: with args "tb_firUnit_behav -key {Behavioral:sim_1:Functional:tb_firUnit} -tclbatch {tb_firUnit.tcl} -log {simulate.log}"
+// Tcl Message: INFO: [USF-XSim-8] Loading simulator feature
+// TclEventType: SIMULATION_CREATE_SIMULATION_OBJECT
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: WAVEFORM_UPDATE_TITLE
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: WAVEFORM_UPDATE_TITLE
+// TclEventType: WAVEFORM_OPEN_WCFG
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_UPDATE_TITLE
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_TITLE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// HMemoryUtils.trashcanNow. Engine heap size: 2,494 MB. GUI used memory: 82 MB. Current time: 5/9/25, 3:29:19 PM CEST
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: Time resolution is 1 ps
+// Tcl Message: source tb_firUnit.tcl
+// Tcl Message: # set curr_wave [current_wave_config] # if { [string length $curr_wave] == 0 } { # if { [llength [get_objects]] > 0} { # add_wave / # set_property needs_save false [current_wave_config] # } else { # send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console." # } # } # run 1000ns
+// Tcl Message: INFO: [USF-XSim-96] XSim completed. Design snapshot 'tb_firUnit_behav' loaded. INFO: [USF-XSim-97] XSim simulation ran for 1000ns
+// Tcl Message: launch_simulation: Time (s): cpu = 00:00:09 ; elapsed = 00:00:09 . Memory (MB): peak = 8615.930 ; gain = 45.684 ; free physical = 5636 ; free virtual = 15426
+// 'd' command handler elapsed time: 9 seconds
+dismissDialog("Run Simulation"); // e (Run Simulation Progress)
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 81 MB. Current time: 5/9/25, 3:29:25 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 81 MB. Current time: 5/9/25, 3:29:25 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 82 MB. Current time: 5/9/25, 3:29:25 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+selectTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, SC_filteredSample[15:0]]", 4, true); // k (RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE) - Node
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+selectMenu("Waveform Style"); // am (Waveform Style)
+selectMenu("Signal Color"); // am (Signal Color)
+selectMenu("Radix"); // am (Radix)
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+selectMenu("Radix"); // am (Radix)
+selectMenuItem((HResource) null, "Signed Decimal"); // ad (Signed Decimal)
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_UPDATE_TITLE
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 81 MB. Current time: 5/9/25, 3:29:37 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 81 MB. Current time: 5/9/25, 3:29:39 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 82 MB. Current time: 5/9/25, 3:29:39 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,529 MB. GUI used memory: 81 MB. Current time: 5/9/25, 3:29:39 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 81 MB. Current time: 5/9/25, 3:29:40 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 82 MB. Current time: 5/9/25, 3:29:40 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 81 MB. Current time: 5/9/25, 3:29:40 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 81 MB. Current time: 5/9/25, 3:29:40 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 81 MB. Current time: 5/9/25, 3:29:40 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 81 MB. Current time: 5/9/25, 3:29:40 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,529 MB. GUI used memory: 81 MB. Current time: 5/9/25, 3:29:40 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,529 MB. GUI used memory: 81 MB. Current time: 5/9/25, 3:29:40 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,879 MB. GUI used memory: 81 MB. Current time: 5/9/25, 3:29:40 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 81 MB. Current time: 5/9/25, 3:29:40 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 81 MB. Current time: 5/9/25, 3:29:40 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 81 MB. Current time: 5/9/25, 3:29:40 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,529 MB. GUI used memory: 81 MB. Current time: 5/9/25, 3:29:41 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,401 MB. GUI used memory: 81 MB. Current time: 5/9/25, 3:29:41 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,618 MB. GUI used memory: 81 MB. Current time: 5/9/25, 3:29:41 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 81 MB. Current time: 5/9/25, 3:29:41 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,529 MB. GUI used memory: 82 MB. Current time: 5/9/25, 3:29:41 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,401 MB. GUI used memory: 82 MB. Current time: 5/9/25, 3:29:41 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,140 MB. GUI used memory: 82 MB. Current time: 5/9/25, 3:29:41 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+selectButton(RDIResource.GraphicalView_ZOOM_FIT, "Waveform Viewer_zoom_fit"); // B (RDIResource.GraphicalView_ZOOM_FIT, Waveform Viewer_zoom_fit)
+selectGraphicalView(RDIResource.RDIViews_WAVEFORM_VIEWER, 221, 144); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer)
+/********** leftMouseClick (1500, 432, true); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer) **********/
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 82 MB. Current time: 5/9/25, 3:29:45 PM CEST
+maximizeView(PAResourceOtoP.PAViews_BASE_WORKSPACE, "BaseWorkspace"); // L (PAResourceOtoP.PAViews_BASE_WORKSPACE, PlanAheadTabBaseWorkspace)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:29:50 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 85 MB. Current time: 5/9/25, 3:29:51 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:29:52 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:29:53 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 85 MB. Current time: 5/9/25, 3:29:56 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:29:58 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:29:59 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:30:00 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 85 MB. Current time: 5/9/25, 3:30:02 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:30:03 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 85 MB. Current time: 5/9/25, 3:30:03 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:30:04 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:30:04 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 85 MB. Current time: 5/9/25, 3:30:05 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 3,529 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:30:14 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// Elapsed time: 30 seconds
+selectButton(RDIResource.GraphicalView_ZOOM_FIT, "Waveform Viewer_zoom_fit"); // B (RDIResource.GraphicalView_ZOOM_FIT, Waveform Viewer_zoom_fit)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:30:19 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:30:21 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:30:24 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "controlUnit.vhd", 0); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectCodeEditor("controlUnit.vhd", 384, 156); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 220, 145); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 407, 568); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 407, 568, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 236, 284); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 236, 284, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 409, 566); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 409, 566, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 722, 522); // ac (controlUnit.vhd)
+// TclEventType: DG_GRAPH_STALE
+// TclEventType: FILE_SET_CHANGE
+// [GUI Memory]: 162 MB (+675kb) [01:10:36]
+// Elapsed Time for: 'L.f': 01h:08m:38s
+selectCodeEditor("controlUnit.vhd", 94, 266); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 94, 266, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+// Elapsed Time for: 'L.f': 01h:08m:42s
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 608, 494); // ac (controlUnit.vhd)
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Untitled 3*", 3); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectButton(PAResourceCommand.PACommandNames_SIMULATION_RELAUNCH, "simulation_relaunch"); // B (PAResourceCommand.PACommandNames_SIMULATION_RELAUNCH, simulation_relaunch)
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_RELAUNCH
+// TclEventType: SIMULATION_MODEL_ABOUT_TO_CLOSE
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: SIMULATION_MODEL_RELOADED
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: LAUNCH_SIM
+// TclEventType: FILE_SET_OPTIONS_CHANGE
+// Tcl Message: relaunch_sim
+// Tcl Message: Command: launch_simulation -step compile -simset sim_1 -mode behavioral
+// Tcl Message: INFO: [Vivado 12-12493] Simulation top is 'tb_firUnit' INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim' INFO: [SIM-utils-51] Simulation object is 'sim_1' INFO: [USF-XSim-2] XSim::Compile design INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+// Tcl Message: xvlog --incr --relax -prj tb_firUnit_vlog.prj
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+// Tcl Message: xvhdl --incr --relax -prj tb_firUnit_vhdl.prj
+// TclEventType: LAUNCH_SIM
+// TclEventType: FILE_SET_OPTIONS_CHANGE
+// Tcl Message: INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd" into library xil_defaultlib INFO: [VRFC 10-3107] analyzing entity 'controlUnit' INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd" into library xil_defaultlib INFO: [VRFC 10-3107] analyzing entity 'firUnit' INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd" into library xil_defaultlib INFO: [VRFC 10-3107] analyzing entity 'tb_firUnit' Waiting for jobs to finish... No pending jobs, compilation finished.
+// Tcl Message: INFO: [USF-XSim-69] 'compile' step finished in '3' seconds
+// Tcl Message: Command: launch_simulation -step elaborate -simset sim_1 -mode behavioral
+// Tcl Message: INFO: [Vivado 12-12493] Simulation top is 'tb_firUnit' INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim' INFO: [SIM-utils-51] Simulation object is 'sim_1' INFO: [USF-XSim-3] XSim::Elaborate design INFO: [USF-XSim-61] Executing 'ELABORATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+// Tcl Message: xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: Built simulation snapshot tb_firUnit_behav
+// Tcl Message: INFO: [USF-XSim-69] 'elaborate' step finished in '5' seconds
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_MODEL_ABOUT_TO_CLOSE
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: SIMULATION_MODEL_RELOADED
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_DELETE_ALL_BREAKPOINTS
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// HMemoryUtils.trashcanNow. Engine heap size: 2,511 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:31:05 PM CEST
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: Time resolution is 1 ps relaunch_sim: Time (s): cpu = 00:00:07 ; elapsed = 00:00:09 . Memory (MB): peak = 8636.066 ; gain = 0.000 ; free physical = 5502 ; free virtual = 15300
+// 'a' command handler elapsed time: 9 seconds
+dismissDialog("Relaunch Simulation"); // b (Relaunch Simulation Progress)
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_CLOSE
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,556 MB. GUI used memory: 86 MB. Current time: 5/9/25, 3:31:12 PM CEST
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+selectButton(RDIResource.BaseDialog_OK, "OK", "Confirm Close"); // a (RDIResource.BaseDialog_OK)
+dismissDialog("Confirm Close"); // t (dialog1)
+// TclEventType: WAVEFORM_UPDATE_TITLE
+// TclEventType: WAVEFORM_CLOSE_WCFG
+selectButton("OptionPane.button", "Discard", "Save Waveform Configuration"); // JButton (OptionPane.button)
+// TclEventType: SIMULATION_CLOSE_SIMULATION
+// HMemoryUtils.trashcanNow. Engine heap size: 2,485 MB. GUI used memory: 83 MB. Current time: 5/9/25, 3:31:17 PM CEST
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// Tcl Message: close_sim
+// Tcl Message: INFO: [Simtcl 6-16] Simulation closed
+dismissDialog("Close"); // bj (Close Progress)
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,467 MB. GUI used memory: 82 MB. Current time: 5/9/25, 3:31:18 PM CEST
+selectButton(PAResourceTtoZ.TaskBanner_CLOSE, (String) null); // j (PAResourceTtoZ.TaskBanner_CLOSE)
+closeTask("Simulation", "Behavioral Simulation - Functional - sim_1 - audioProc", "DesignTask.SIMULATION");
+// TclEventType: WAVEFORM_CLOSE_WCFG
+// TclEventType: SIMULATION_CLOSE_SIMULATION
+// Tcl Message: close_sim
+// Tcl Message: INFO: [Simtcl 6-16] Simulation closed
+dismissDialog("Close"); // bj (Close Progress)
+selectTree(PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, "[, Simulation, Run Simulation]", 10, false); // g (PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, Flow Navigator Tree)
+selectMenuItem(PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL, "Run Behavioral Simulation"); // ap (PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL, simulation_run_behavioral_menu)
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL
+// TclEventType: LAUNCH_SIM
+// TclEventType: FILE_SET_OPTIONS_CHANGE
+// TclEventType: PACKAGER_MESSAGE_RESET
+// TclEventType: PACKAGER_UNLOAD_CORE
+// Tcl Message: launch_simulation
+// Tcl Message: Command: launch_simulation
+// Tcl Message: xvlog --incr --relax -prj tb_firUnit_vlog.prj
+// Tcl Message: xvhdl --incr --relax -prj tb_firUnit_vhdl.prj
+// TclEventType: LAUNCH_SIM_LOG
+// Tcl Message: Waiting for jobs to finish... No pending jobs, compilation finished.
+// Tcl Message: INFO: [USF-XSim-69] 'compile' step finished in '2' seconds INFO: [USF-XSim-3] XSim::Elaborate design INFO: [USF-XSim-61] Executing 'ELABORATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+// Tcl Message: xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log
+// TclEventType: LAUNCH_SIM
+// Tcl Message: INFO: [USF-XSim-69] 'elaborate' step finished in '2' seconds INFO: [USF-XSim-4] XSim::Simulate design INFO: [USF-XSim-61] Executing 'SIMULATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim' INFO: [USF-XSim-98] *** Running xsim
+// Tcl Message: with args "tb_firUnit_behav -key {Behavioral:sim_1:Functional:tb_firUnit} -tclbatch {tb_firUnit.tcl} -log {simulate.log}"
+// Tcl Message: INFO: [USF-XSim-8] Loading simulator feature
+// TclEventType: SIMULATION_CREATE_SIMULATION_OBJECT
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+closeView(PAResourceOtoP.PAViews_PROJECT_SUMMARY, "Project Summary"); // u (PAResourceOtoP.PAViews_PROJECT_SUMMARY, PlanAheadTabProject Summary)
+// TclEventType: WAVEFORM_UPDATE_TITLE
+// TclEventType: WAVEFORM_OPEN_WCFG
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: WAVEFORM_OPEN_WCFG
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+// HMemoryUtils.trashcanNow. Engine heap size: 2,469 MB. GUI used memory: 85 MB. Current time: 5/9/25, 3:31:33 PM CEST
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_UPDATE_TITLE
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_TITLE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: Time resolution is 1 ps
+// Tcl Message: source tb_firUnit.tcl
+// Tcl Message: # set curr_wave [current_wave_config] # if { [string length $curr_wave] == 0 } { # if { [llength [get_objects]] > 0} { # add_wave / # set_property needs_save false [current_wave_config] # } else { # send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console." # } # } # run 1000ns
+// Tcl Message: INFO: [USF-XSim-96] XSim completed. Design snapshot 'tb_firUnit_behav' loaded. INFO: [USF-XSim-97] XSim simulation ran for 1000ns
+// Tcl Message: launch_simulation: Time (s): cpu = 00:00:05 ; elapsed = 00:00:06 . Memory (MB): peak = 8636.066 ; gain = 0.000 ; free physical = 5547 ; free virtual = 15350
+// 'd' command handler elapsed time: 6 seconds
+dismissDialog("Run Simulation"); // e (Run Simulation Progress)
+// HMemoryUtils.trashcanNow. Engine heap size: 2,469 MB. GUI used memory: 83 MB. Current time: 5/9/25, 3:31:34 PM CEST
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+maximizeView(PAResourceOtoP.PAViews_BASE_WORKSPACE, "BaseWorkspace"); // L (PAResourceOtoP.PAViews_BASE_WORKSPACE, PlanAheadTabBaseWorkspace)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,469 MB. GUI used memory: 86 MB. Current time: 5/9/25, 3:31:37 PM CEST
+selectButton(RDIResource.GraphicalView_ZOOM_FIT, "Waveform Viewer_zoom_fit"); // B (RDIResource.GraphicalView_ZOOM_FIT, Waveform Viewer_zoom_fit)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+selectTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, SC_filteredSample[15:0]]", 4, true, false, false, false, true, false); // k (RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE) - Popup Trigger - Node
+selectMenu("Name"); // am (Name)
+selectMenu("Waveform Style"); // am (Waveform Style)
+selectMenu("Signal Color"); // am (Signal Color)
+selectMenu("Radix"); // am (Radix)
+selectMenuItem((HResource) null, "Signed Decimal"); // ad (Signed Decimal)
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_UPDATE_TITLE
+// HMemoryUtils.trashcanNow. Engine heap size: 2,459 MB. GUI used memory: 87 MB. Current time: 5/9/25, 3:31:44 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+selectGraphicalView(RDIResource.RDIViews_WAVEFORM_VIEWER, 153, 477); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer)
+/********** leftMouseClick (908, 740, true); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer) **********/
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "operativeUnit.vhd", 1); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "controlUnit.vhd", 0); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectCodeEditor("controlUnit.vhd", 435, 560); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 435, 560, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 643, 536); // ac (controlUnit.vhd)
+// Elapsed time: 53 seconds
+selectCodeEditor("controlUnit.vhd", 77, 173); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 76, 295); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 85, 415); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 342, 371); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 178, 416); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 178, 416, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+// Elapsed time: 11 seconds
+selectCodeEditor("controlUnit.vhd", 248, 174); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+// Elapsed time: 10 seconds
+selectCodeEditor("controlUnit.vhd", 246, 411); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 163, 292); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 163, 292, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 232, 292); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 248, 414); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 252, 414); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 403, 369); // ac (controlUnit.vhd)
+// Elapsed time: 15 seconds
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Untitled 4*", 3); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+unMinimizeFrame(PAResourceOtoP.PAViews_SCOPE, "Scopes"); // R (PAResourceOtoP.PAViews_SCOPE, Scope)
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,460 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:34:09 PM CEST
+selectTreeTable(PAResourceQtoS.SimulationScopesPanel_SIMULATE_SCOPE_TABLE, "tb_firUnit ; tb_firUnit(archi_tb_firUnit) ; VHDL Entity", 0, "tb_firUnit(archi_tb_firUnit)", 1, true); // c (PAResourceQtoS.SimulationScopesPanel_SIMULATE_SCOPE_TABLE) - Node
+// TclEventType: SIMULATION_REQUEST_SELECT_SCOPES
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+selectTreeTable(PAResourceQtoS.SimulationScopesPanel_SIMULATE_SCOPE_TABLE, "firUnit_1 ; firUnit(archi_firUnit) ; VHDL Entity", 1, "firUnit(archi_firUnit)", 1, true); // c (PAResourceQtoS.SimulationScopesPanel_SIMULATE_SCOPE_TABLE) - Node
+// TclEventType: SIMULATION_REQUEST_SELECT_SCOPES
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+selectTreeTable(PAResourceQtoS.SimulationScopesPanel_SIMULATE_SCOPE_TABLE, "firUnit_1 ; firUnit(archi_firUnit) ; VHDL Entity", 1, "firUnit_1", 0, true, false, false, false, false, true); // c (PAResourceQtoS.SimulationScopesPanel_SIMULATE_SCOPE_TABLE) - Double Click - Node
+// TclEventType: SIMULATION_REQUEST_SELECT_SCOPES
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_OPEN_SOURCE
+selectTreeTable(PAResourceQtoS.SimulationScopesPanel_SIMULATE_SCOPE_TABLE, "controlUnit_1 ; controlUnit(archi_operativeUnit) ; VHDL Entity", 2, "controlUnit_1", 0, false); // c (PAResourceQtoS.SimulationScopesPanel_SIMULATE_SCOPE_TABLE)
+// TclEventType: SIMULATION_REQUEST_SELECT_SCOPES
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Untitled 4*", 3); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+unMinimizeFrame(PAResourceOtoP.PAViews_OBJECTS, "Objects"); // R (PAResourceOtoP.PAViews_OBJECTS, Objects)
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+selectTreeTable(PAResourceQtoS.SimulationObjectsPanel_SIMULATION_OBJECTS_TREE_TABLE, "SR_currentState ; PROCESSING_LOOP ; Enumeration", 11, "SR_currentState", 0, false); // c (PAResourceQtoS.SimulationObjectsPanel_SIMULATION_OBJECTS_TREE_TABLE)
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_UPDATE_TITLE
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+selectButton(PAResourceCommand.PACommandNames_SIMULATION_RELAUNCH, "simulation_relaunch"); // B (PAResourceCommand.PACommandNames_SIMULATION_RELAUNCH, simulation_relaunch)
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_RELAUNCH
+selectButton(RDIResource.BaseDialog_OK, "OK", "Save Simulation Sources"); // a (RDIResource.BaseDialog_OK)
+// TclEventType: DG_GRAPH_STALE
+dismissDialog("Save Simulation Sources"); // c (dialog2)
+// TclEventType: SIMULATION_MODEL_ABOUT_TO_CLOSE
+// TclEventType: DG_GRAPH_STALE
+// TclEventType: SIMULATION_MODEL_ABOUT_TO_CLOSE
+// TclEventType: FILE_SET_CHANGE
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: SIMULATION_MODEL_RELOADED
+// HMemoryUtils.trashcanNow. Engine heap size: 2,490 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:34:41 PM CEST
+// TclEventType: SIMULATION_MODEL_RELOADED
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: LAUNCH_SIM
+// Tcl Message: relaunch_sim
+// Tcl Message: Command: launch_simulation -step compile -simset sim_1 -mode behavioral
+// Tcl Message: INFO: [Vivado 12-12493] Simulation top is 'tb_firUnit'
+// TclEventType: FILE_SET_OPTIONS_CHANGE
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+// Tcl Message: INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim' INFO: [SIM-utils-51] Simulation object is 'sim_1' INFO: [USF-XSim-2] XSim::Compile design INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+// Tcl Message: xvlog --incr --relax -prj tb_firUnit_vlog.prj
+// Tcl Message: xvhdl --incr --relax -prj tb_firUnit_vhdl.prj
+// TclEventType: LAUNCH_SIM
+// TclEventType: FILE_SET_OPTIONS_CHANGE
+// Tcl Message: INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd" into library xil_defaultlib INFO: [VRFC 10-3107] analyzing entity 'controlUnit' INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd" into library xil_defaultlib INFO: [VRFC 10-3107] analyzing entity 'firUnit' INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd" into library xil_defaultlib INFO: [VRFC 10-3107] analyzing entity 'tb_firUnit' Waiting for jobs to finish... No pending jobs, compilation finished.
+// Tcl Message: INFO: [USF-XSim-69] 'compile' step finished in '3' seconds
+// Tcl Message: Command: launch_simulation -step elaborate -simset sim_1 -mode behavioral
+// Tcl Message: INFO: [Vivado 12-12493] Simulation top is 'tb_firUnit' INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim' INFO: [SIM-utils-51] Simulation object is 'sim_1' INFO: [USF-XSim-3] XSim::Elaborate design
+// Tcl Message: INFO: [USF-XSim-61] Executing 'ELABORATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+// Tcl Message: xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: Built simulation snapshot tb_firUnit_behav
+// Tcl Message: INFO: [USF-XSim-69] 'elaborate' step finished in '5' seconds
+// Tcl Message: launch_simulation: Time (s): cpu = 00:00:05 ; elapsed = 00:00:06 . Memory (MB): peak = 8636.066 ; gain = 0.000 ; free physical = 5602 ; free virtual = 15329
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_MODEL_ABOUT_TO_CLOSE
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: SIMULATION_MODEL_RELOADED
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_DELETE_ALL_BREAKPOINTS
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: Time resolution is 1 ps relaunch_sim: Time (s): cpu = 00:00:11 ; elapsed = 00:00:12 . Memory (MB): peak = 8636.066 ; gain = 0.000 ; free physical = 5618 ; free virtual = 15351
+// 'a' command handler elapsed time: 14 seconds
+// Elapsed time: 12 seconds
+dismissDialog("Relaunch Simulation"); // b (Relaunch Simulation Progress)
+// Elapsed Time for: 'L.f': 01h:12m:48s
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+// Elapsed time: 11 seconds
+selectGraphicalView(RDIResource.RDIViews_WAVEFORM_VIEWER, 176, 182); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+/********** leftMouseClick (1485, 459, true); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer) **********/
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:35:05 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 85 MB. Current time: 5/9/25, 3:35:09 PM CEST
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 85 MB. Current time: 5/9/25, 3:35:12 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:35:13 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 3,546 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:35:16 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 85 MB. Current time: 5/9/25, 3:35:18 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 85 MB. Current time: 5/9/25, 3:35:18 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:35:19 PM CEST
+// Elapsed time: 18 seconds
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "controlUnit.vhd", 0); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+// Elapsed time: 10 seconds
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Untitled 4*", 3); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+// HMemoryUtils.trashcanNow. Engine heap size: 3,546 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:35:42 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// Elapsed time: 14 seconds
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "operativeUnit.vhd", 1); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "controlUnit.vhd", 0); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectCodeEditor("controlUnit.vhd", 113, 294); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 210, 390); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 210, 390, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 208, 382); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 208, 382, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 222, 445); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 222, 503); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 222, 503, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 132, 548); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 132, 548, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+// Elapsed time: 22 seconds
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Untitled 4*", 3); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+selectGraphicalView(RDIResource.RDIViews_WAVEFORM_VIEWER, 20, 182); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer)
+/********** leftMouseClick (1341, 473, true); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer) **********/
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:36:45 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:36:45 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:36:46 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 3,546 MB. GUI used memory: 85 MB. Current time: 5/9/25, 3:36:46 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:36:49 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:36:52 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:36:55 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 3,546 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:36:57 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:36:58 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 85 MB. Current time: 5/9/25, 3:36:58 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:36:59 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 85 MB. Current time: 5/9/25, 3:37:00 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 3,546 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:37:01 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 85 MB. Current time: 5/9/25, 3:37:02 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:37:02 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:37:02 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 3,546 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:37:02 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 3,287 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:37:03 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:37:03 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// Elapsed time: 23 seconds
+selectMenu("Waveform Style"); // am (Waveform Style)
+selectMenu("Signal Color"); // am (Signal Color)
+selectMenu("Radix"); // am (Radix)
+selectMenu("Signal Color"); // am (Signal Color)
+selectMenu("Waveform Style"); // am (Waveform Style)
+selectMenu("Signal Color"); // am (Signal Color)
+selectMenu("Waveform Style"); // am (Waveform Style)
+selectMenu("Signal Color"); // am (Signal Color)
+selectMenu("Radix"); // am (Radix)
+selectMenu("Radix"); // am (Radix)
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+selectMenu("Radix"); // am (Radix)
+selectMenuItem((HResource) null, "Signed Decimal"); // ad (Signed Decimal)
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_UPDATE_TITLE
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 85 MB. Current time: 5/9/25, 3:37:18 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:37:20 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:37:21 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 3,546 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:37:21 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 84 MB. Current time: 5/9/25, 3:37:22 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// Elapsed time: 12 seconds
+selectButton(RDIResource.GraphicalView_ZOOM_FIT, "Waveform Viewer_zoom_fit"); // B (RDIResource.GraphicalView_ZOOM_FIT, Waveform Viewer_zoom_fit)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 85 MB. Current time: 5/9/25, 3:37:31 PM CEST
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 85 MB. Current time: 5/9/25, 3:37:34 PM CEST
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 88 MB. Current time: 5/9/25, 3:37:36 PM CEST
+// Elapsed time: 12 seconds
+selectButton(RDIResource.GraphicalView_ZOOM_FIT, "Waveform Viewer_zoom_fit"); // B (RDIResource.GraphicalView_ZOOM_FIT, Waveform Viewer_zoom_fit)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+selectGraphicalView(RDIResource.RDIViews_WAVEFORM_VIEWER, 18, 198); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer)
+/********** leftMouseClick (929, 476, true); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer) **********/
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 88 MB. Current time: 5/9/25, 3:37:42 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 88 MB. Current time: 5/9/25, 3:37:43 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 88 MB. Current time: 5/9/25, 3:37:44 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 89 MB. Current time: 5/9/25, 3:37:48 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 89 MB. Current time: 5/9/25, 3:37:49 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 3,546 MB. GUI used memory: 88 MB. Current time: 5/9/25, 3:37:50 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 87 MB. Current time: 5/9/25, 3:37:51 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 87 MB. Current time: 5/9/25, 3:37:51 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 87 MB. Current time: 5/9/25, 3:37:52 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 88 MB. Current time: 5/9/25, 3:37:53 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 3,546 MB. GUI used memory: 87 MB. Current time: 5/9/25, 3:37:59 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,502 MB. GUI used memory: 87 MB. Current time: 5/9/25, 3:38:00 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// Elapsed time: 52 seconds
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "tb_firUnit.vhd", 2); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "operativeUnit.vhd", 1); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "controlUnit.vhd", 0); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectCodeEditor("controlUnit.vhd", 501, 310); // ac (controlUnit.vhd)
+// Elapsed time: 43 seconds
+selectCodeEditor("controlUnit.vhd", 252, 185); // ac (controlUnit.vhd)
+// Elapsed time: 46 seconds
+selectCodeEditor("controlUnit.vhd", 288, 430); // ac (controlUnit.vhd)
+// Elapsed time: 11 seconds
+selectCodeEditor("controlUnit.vhd", 295, 428); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 102, 462); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 134, 400); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 134, 400, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 246, 462); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 246, 462, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 63, 443); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 265, 308); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 144, 277); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 144, 277, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 253, 341); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 253, 341, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 320, 337); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 249, 188); // ac (controlUnit.vhd)
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 134, 157); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 134, 157, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 235, 213); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 235, 213, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 350, 249); // ac (controlUnit.vhd)
+// TclEventType: DG_GRAPH_STALE
+// TclEventType: FILE_SET_CHANGE
+// Elapsed Time for: 'L.f': 01h:18m:46s
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "firUnit.vhd", 4); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Untitled 4*", 3); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectButton(PAResourceCommand.PACommandNames_SIMULATION_RELAUNCH, "simulation_relaunch"); // B (PAResourceCommand.PACommandNames_SIMULATION_RELAUNCH, simulation_relaunch)
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_RELAUNCH
+// TclEventType: SIMULATION_MODEL_ABOUT_TO_CLOSE
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: SIMULATION_MODEL_RELOADED
+// HMemoryUtils.trashcanNow. Engine heap size: 2,490 MB. GUI used memory: 87 MB. Current time: 5/9/25, 3:40:56 PM CEST
+// TclEventType: SIMULATION_MODEL_RELOADED
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: LAUNCH_SIM
+// TclEventType: FILE_SET_OPTIONS_CHANGE
+// Tcl Message: relaunch_sim
+// Tcl Message: Command: launch_simulation -step compile -simset sim_1 -mode behavioral
+// Tcl Message: INFO: [Vivado 12-12493] Simulation top is 'tb_firUnit' INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim' INFO: [SIM-utils-51] Simulation object is 'sim_1' INFO: [USF-XSim-2] XSim::Compile design INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+// Tcl Message: xvlog --incr --relax -prj tb_firUnit_vlog.prj
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+// Tcl Message: xvhdl --incr --relax -prj tb_firUnit_vhdl.prj
+// TclEventType: LAUNCH_SIM
+// TclEventType: FILE_SET_OPTIONS_CHANGE
+// Tcl Message: INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd" into library xil_defaultlib INFO: [VRFC 10-3107] analyzing entity 'controlUnit' INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd" into library xil_defaultlib INFO: [VRFC 10-3107] analyzing entity 'firUnit' INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd" into library xil_defaultlib INFO: [VRFC 10-3107] analyzing entity 'tb_firUnit' Waiting for jobs to finish... No pending jobs, compilation finished.
+// Tcl Message: INFO: [USF-XSim-69] 'compile' step finished in '3' seconds
+// Tcl Message: Command: launch_simulation -step elaborate -simset sim_1 -mode behavioral
+// Tcl Message: INFO: [Vivado 12-12493] Simulation top is 'tb_firUnit' INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim' INFO: [SIM-utils-51] Simulation object is 'sim_1' INFO: [USF-XSim-3] XSim::Elaborate design INFO: [USF-XSim-61] Executing 'ELABORATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+// Tcl Message: xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: Built simulation snapshot tb_firUnit_behav
+// Tcl Message: INFO: [USF-XSim-69] 'elaborate' step finished in '4' seconds
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_MODEL_ABOUT_TO_CLOSE
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: SIMULATION_MODEL_RELOADED
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_DELETE_ALL_BREAKPOINTS
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: Time resolution is 1 ps relaunch_sim: Time (s): cpu = 00:00:07 ; elapsed = 00:00:09 . Memory (MB): peak = 8636.066 ; gain = 0.000 ; free physical = 5583 ; free virtual = 15336
+// 'a' command handler elapsed time: 8 seconds
+dismissDialog("Relaunch Simulation"); // b (Relaunch Simulation Progress)
+// Elapsed Time for: 'L.f': 01h:19m:00s
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+// Elapsed time: 12 seconds
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "controlUnit.vhd", 0); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectCodeEditor("controlUnit.vhd", 451, 286); // ac (controlUnit.vhd)
+// Elapsed time: 23 seconds
+selectCodeEditor("controlUnit.vhd", 316, 475); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 316, 474, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 294, 346); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 148, 307); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 148, 307, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 330, 480); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 330, 480, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 334, 473); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 334, 473, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 333, 507); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 333, 507, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 334, 524); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 334, 524, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 336, 537); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 336, 537, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 338, 557); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 338, 557, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 337, 550); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 337, 550, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 400, 390); // ac (controlUnit.vhd)
+// TclEventType: DG_GRAPH_STALE
+// TclEventType: FILE_SET_CHANGE
+// Elapsed Time for: 'L.f': 01h:19m:44s
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Untitled 4*", 3); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectButton(PAResourceCommand.PACommandNames_SIMULATION_RELAUNCH, "simulation_relaunch"); // B (PAResourceCommand.PACommandNames_SIMULATION_RELAUNCH, simulation_relaunch)
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_RELAUNCH
+// TclEventType: SIMULATION_MODEL_ABOUT_TO_CLOSE
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: SIMULATION_MODEL_RELOADED
+// HMemoryUtils.trashcanNow. Engine heap size: 2,520 MB. GUI used memory: 89 MB. Current time: 5/9/25, 3:41:52 PM CEST
+// TclEventType: SIMULATION_MODEL_RELOADED
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: LAUNCH_SIM
+// TclEventType: FILE_SET_OPTIONS_CHANGE
+// Tcl Message: relaunch_sim
+// Tcl Message: Command: launch_simulation -step compile -simset sim_1 -mode behavioral
+// Tcl Message: INFO: [Vivado 12-12493] Simulation top is 'tb_firUnit' INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim' INFO: [SIM-utils-51] Simulation object is 'sim_1' INFO: [USF-XSim-2] XSim::Compile design INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+// Tcl Message: xvlog --incr --relax -prj tb_firUnit_vlog.prj
+// Tcl Message: xvhdl --incr --relax -prj tb_firUnit_vhdl.prj
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: LAUNCH_SIM
+// TclEventType: FILE_SET_OPTIONS_CHANGE
+// Tcl Message: INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd" into library xil_defaultlib INFO: [VRFC 10-3107] analyzing entity 'controlUnit' INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd" into library xil_defaultlib INFO: [VRFC 10-3107] analyzing entity 'firUnit' INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd" into library xil_defaultlib INFO: [VRFC 10-3107] analyzing entity 'tb_firUnit' Waiting for jobs to finish... No pending jobs, compilation finished.
+// Tcl Message: INFO: [USF-XSim-69] 'compile' step finished in '3' seconds
+// Tcl Message: Command: launch_simulation -step elaborate -simset sim_1 -mode behavioral
+// Tcl Message: INFO: [Vivado 12-12493] Simulation top is 'tb_firUnit' INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim' INFO: [SIM-utils-51] Simulation object is 'sim_1' INFO: [USF-XSim-3] XSim::Elaborate design INFO: [USF-XSim-61] Executing 'ELABORATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+// Tcl Message: xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: Built simulation snapshot tb_firUnit_behav
+// Tcl Message: INFO: [USF-XSim-69] 'elaborate' step finished in '4' seconds
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_MODEL_ABOUT_TO_CLOSE
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: SIMULATION_MODEL_RELOADED
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_DELETE_ALL_BREAKPOINTS
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: Time resolution is 1 ps relaunch_sim: Time (s): cpu = 00:00:09 ; elapsed = 00:00:09 . Memory (MB): peak = 8649.246 ; gain = 0.000 ; free physical = 5672 ; free virtual = 15422
+// 'a' command handler elapsed time: 9 seconds
+dismissDialog("Relaunch Simulation"); // b (Relaunch Simulation Progress)
+// Elapsed Time for: 'L.f': 01h:19m:56s
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+selectButton(PAResourceTtoZ.TaskBanner_CLOSE, (String) null); // j (PAResourceTtoZ.TaskBanner_CLOSE)
+closeTask("Simulation", "Behavioral Simulation - Functional - sim_1 - tb_firUnit", "DesignTask.SIMULATION");
+// TclEventType: WAVEFORM_UPDATE_TITLE
+// TclEventType: WAVEFORM_CLOSE_WCFG
+selectButton("OptionPane.button", "Discard", "Save Waveform Configuration"); // JButton (OptionPane.button)
+// TclEventType: SIMULATION_CLOSE_SIMULATION
+// Tcl Message: close_sim
+// Tcl Message: INFO: [Simtcl 6-16] Simulation closed
+dismissDialog("Close"); // bj (Close Progress)
+selectTree(PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, "[, Simulation, Run Simulation]", 10, false); // g (PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, Flow Navigator Tree)
+selectMenuItem(PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL, "Run Behavioral Simulation"); // ap (PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL, simulation_run_behavioral_menu)
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL
+// TclEventType: LAUNCH_SIM
+// TclEventType: FILE_SET_OPTIONS_CHANGE
+// TclEventType: PACKAGER_MESSAGE_RESET
+// TclEventType: PACKAGER_UNLOAD_CORE
+// Tcl Message: launch_simulation
+// Tcl Message: Command: launch_simulation
+// Tcl Message: INFO: [USF-XSim-2] XSim::Compile design INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+// Tcl Message: xvlog --incr --relax -prj tb_firUnit_vlog.prj
+// Tcl Message: xvhdl --incr --relax -prj tb_firUnit_vhdl.prj
+// TclEventType: LAUNCH_SIM_LOG
+// Tcl Message: Waiting for jobs to finish... No pending jobs, compilation finished.
+// Tcl Message: INFO: [USF-XSim-69] 'compile' step finished in '3' seconds INFO: [USF-XSim-3] XSim::Elaborate design INFO: [USF-XSim-61] Executing 'ELABORATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+// Tcl Message: xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log
+// TclEventType: LAUNCH_SIM
+// Tcl Message: INFO: [USF-XSim-69] 'elaborate' step finished in '2' seconds INFO: [USF-XSim-4] XSim::Simulate design INFO: [USF-XSim-61] Executing 'SIMULATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim' INFO: [USF-XSim-98] *** Running xsim
+// Tcl Message: with args "tb_firUnit_behav -key {Behavioral:sim_1:Functional:tb_firUnit} -tclbatch {tb_firUnit.tcl} -log {simulate.log}"
+// Tcl Message: INFO: [USF-XSim-8] Loading simulator feature
+// TclEventType: SIMULATION_CREATE_SIMULATION_OBJECT
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+closeView(PAResourceOtoP.PAViews_PROJECT_SUMMARY, "Project Summary"); // u (PAResourceOtoP.PAViews_PROJECT_SUMMARY, PlanAheadTabProject Summary)
+// TclEventType: WAVEFORM_UPDATE_TITLE
+// TclEventType: WAVEFORM_OPEN_WCFG
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: WAVEFORM_OPEN_WCFG
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+// HMemoryUtils.trashcanNow. Engine heap size: 2,549 MB. GUI used memory: 89 MB. Current time: 5/9/25, 3:42:21 PM CEST
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_UPDATE_TITLE
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_TITLE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: Time resolution is 1 ps
+// Tcl Message: source tb_firUnit.tcl
+// Tcl Message: # set curr_wave [current_wave_config] # if { [string length $curr_wave] == 0 } { # if { [llength [get_objects]] > 0} { # add_wave / # set_property needs_save false [current_wave_config] # } else { # send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console." # } # } # run 1000ns
+// Tcl Message: INFO: [USF-XSim-96] XSim completed. Design snapshot 'tb_firUnit_behav' loaded. INFO: [USF-XSim-97] XSim simulation ran for 1000ns
+// Tcl Message: launch_simulation: Time (s): cpu = 00:00:05 ; elapsed = 00:00:07 . Memory (MB): peak = 8658.109 ; gain = 8.863 ; free physical = 5678 ; free virtual = 15432
+// 'd' command handler elapsed time: 7 seconds
+dismissDialog("Run Simulation"); // e (Run Simulation Progress)
+// HMemoryUtils.trashcanNow. Engine heap size: 2,549 MB. GUI used memory: 89 MB. Current time: 5/9/25, 3:42:23 PM CEST
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_PROTOCOL_INSTANCE_TREE
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+maximizeView(PAResourceOtoP.PAViews_BASE_WORKSPACE, "BaseWorkspace"); // L (PAResourceOtoP.PAViews_BASE_WORKSPACE, PlanAheadTabBaseWorkspace)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,549 MB. GUI used memory: 91 MB. Current time: 5/9/25, 3:42:26 PM CEST
+selectButton(RDIResource.GraphicalView_ZOOM_FIT, "Waveform Viewer_zoom_fit"); // B (RDIResource.GraphicalView_ZOOM_FIT, Waveform Viewer_zoom_fit)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+selectTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, SC_filteredSample[15:0]]", 4, true); // k (RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE) - Node
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "controlUnit.vhd", 0); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectCodeEditor("controlUnit.vhd", 123, 33); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 123, 33, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'c'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 302, 566); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 302, 566, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 307, 578); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 307, 578, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 309, 596); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 309, 596, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 315, 616); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 315, 616, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+// [GUI Memory]: 174 MB (+4045kb) [01:22:36]
+selectCodeEditor("controlUnit.vhd", 316, 609); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 316, 609, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 318, 640); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 318, 640, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 315, 653); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 315, 653, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+typeControlKey((HResource) null, "controlUnit.vhd", 'v'); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 344, 402); // ac (controlUnit.vhd)
+// TclEventType: DG_GRAPH_STALE
+// TclEventType: FILE_SET_CHANGE
+// Elapsed Time for: 'L.f': 01h:20m:40s
+// Elapsed Time for: 'L.f': 01h:20m:42s
+// TclEventType: SIMULATION_ADD_BREAKPOINT
+// Tcl Message: add_bp {/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd} 96
+// TclEventType: SIMULATION_DELETE_BREAKPOINT
+// Tcl Message: remove_bps -file {/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd} -line 96
+selectCodeEditor("controlUnit.vhd", 233, 396); // ac (controlUnit.vhd)
+// Elapsed time: 22 seconds
+selectCodeEditor("controlUnit.vhd", 261, 222); // ac (controlUnit.vhd)
+// Elapsed time: 23 seconds
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "firUnit.vhd", 3); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "tb_firUnit.vhd", 2); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Untitled 5", 4); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectButton(PAResourceCommand.PACommandNames_SIMULATION_RELAUNCH, "simulation_relaunch"); // B (PAResourceCommand.PACommandNames_SIMULATION_RELAUNCH, simulation_relaunch)
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_RELAUNCH
+// TclEventType: SIMULATION_MODEL_ABOUT_TO_CLOSE
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: SIMULATION_MODEL_RELOADED
+// HMemoryUtils.trashcanNow. Engine heap size: 2,527 MB. GUI used memory: 91 MB. Current time: 5/9/25, 3:43:39 PM CEST
+// TclEventType: SIMULATION_MODEL_RELOADED
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: LAUNCH_SIM
+// TclEventType: FILE_SET_OPTIONS_CHANGE
+// Tcl Message: relaunch_sim
+// Tcl Message: Command: launch_simulation -step compile -simset sim_1 -mode behavioral
+// Tcl Message: INFO: [Vivado 12-12493] Simulation top is 'tb_firUnit' INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim' INFO: [SIM-utils-51] Simulation object is 'sim_1' INFO: [USF-XSim-2] XSim::Compile design INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+// Tcl Message: xvlog --incr --relax -prj tb_firUnit_vlog.prj
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+// Tcl Message: xvhdl --incr --relax -prj tb_firUnit_vhdl.prj
+// Tcl Message: INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/controlUnit.vhd" into library xil_defaultlib INFO: [VRFC 10-3107] analyzing entity 'controlUnit' INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/firUnit.vhd" into library xil_defaultlib INFO: [VRFC 10-3107] analyzing entity 'firUnit' INFO: [VRFC 10-163] Analyzing VHDL file "/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/src/hdl/tb_firUnit.vhd" into library xil_defaultlib INFO: [VRFC 10-3107] analyzing entity 'tb_firUnit'
+// TclEventType: LAUNCH_SIM
+// TclEventType: FILE_SET_OPTIONS_CHANGE
+// Tcl Message: Waiting for jobs to finish... No pending jobs, compilation finished.
+// Tcl Message: INFO: [USF-XSim-69] 'compile' step finished in '4' seconds
+// Tcl Message: Command: launch_simulation -step elaborate -simset sim_1 -mode behavioral
+// Tcl Message: INFO: [Vivado 12-12493] Simulation top is 'tb_firUnit' INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim' INFO: [SIM-utils-51] Simulation object is 'sim_1' INFO: [USF-XSim-3] XSim::Elaborate design INFO: [USF-XSim-61] Executing 'ELABORATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+// Tcl Message: xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: Built simulation snapshot tb_firUnit_behav
+// Tcl Message: INFO: [USF-XSim-69] 'elaborate' step finished in '5' seconds
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_MODEL_ABOUT_TO_CLOSE
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: SIMULATION_MODEL_RELOADED
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_DELETE_ALL_BREAKPOINTS
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: Time resolution is 1 ps relaunch_sim: Time (s): cpu = 00:00:07 ; elapsed = 00:00:10 . Memory (MB): peak = 8676.250 ; gain = 0.000 ; free physical = 5699 ; free virtual = 15449
+// 'a' command handler elapsed time: 10 seconds
+// Elapsed time: 10 seconds
+dismissDialog("Relaunch Simulation"); // b (Relaunch Simulation Progress)
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+// Elapsed time: 34 seconds
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "operativeUnit.vhd", 1); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "controlUnit.vhd", 0); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+// Elapsed time: 118 seconds
+selectCodeEditor("controlUnit.vhd", 466, 231); // ac (controlUnit.vhd)
+// Elapsed time: 16 seconds
+unMinimizeFrame(PAResourceOtoP.PAViews_SOURCES, "Sources"); // R (PAResourceOtoP.PAViews_SOURCES, Sources)
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+expandTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Utility Sources]", 12); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Utility Sources, utils_1]", 13, false); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+expandTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Constraints]", 6); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+expandTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, audioProc (audioProc.v)]", 12); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+expandTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, tb_firUnit(archi_tb_firUnit) (tb_firUnit.vhd)]", 11); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+expandTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, tb_firUnit(archi_tb_firUnit) (tb_firUnit.vhd), firUnit_1 : firUnit(archi_firUnit) (firUnit.vhd)]", 12); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, tb_firUnit(archi_tb_firUnit) (tb_firUnit.vhd), firUnit_1 : firUnit(archi_firUnit) (firUnit.vhd), controlUnit_1 : controlUnit(archi_operativeUnit) (controlUnit.vhd)]", 13, false); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, tb_firUnit(archi_tb_firUnit) (tb_firUnit.vhd), firUnit_1 : firUnit(archi_firUnit) (firUnit.vhd), operativeUnit_1 : operativeUnit (operativeUnit.v)]", 14, false); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+collapseTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, tb_firUnit(archi_tb_firUnit) (tb_firUnit.vhd), firUnit_1 : firUnit(archi_firUnit) (firUnit.vhd)]", 12); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+collapseTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, tb_firUnit(archi_tb_firUnit) (tb_firUnit.vhd)]", 11); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+expandTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, audioProc (audioProc.v)]", 3); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+collapseTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, audioProc (audioProc.v)]", 3); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+collapseTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, Disabled Sources]", 4); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+expandTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, Disabled Sources]", 4); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+expandTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, tb_firUnit(archi_tb_firUnit) (tb_firUnit.vhd), firUnit_1 : firUnit(archi_firUnit) (firUnit.vhd)]", 2); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+collapseTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, tb_firUnit(archi_tb_firUnit) (tb_firUnit.vhd), firUnit_1 : firUnit(archi_firUnit) (firUnit.vhd)]", 2); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+collapseTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, tb_firUnit(archi_tb_firUnit) (tb_firUnit.vhd)]", 1); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+expandTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, tb_firUnit(archi_tb_firUnit) (tb_firUnit.vhd)]", 1); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+// Elapsed time: 25 seconds
+expandTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, tb_firUnit(archi_tb_firUnit) (tb_firUnit.vhd)]", 11); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+expandTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, tb_firUnit(archi_tb_firUnit) (tb_firUnit.vhd), firUnit_1 : firUnit(archi_firUnit) (firUnit.vhd)]", 12); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+collapseTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, tb_firUnit(archi_tb_firUnit) (tb_firUnit.vhd), firUnit_1 : firUnit(archi_firUnit) (firUnit.vhd)]", 12); // E (PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE)
+// Elapsed time: 18 seconds
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "controlUnit.vhd", 0); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+// Elapsed time: 20 seconds
+selectCodeEditor("controlUnit.vhd", 138, 325); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 138, 325, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+selectCodeEditor("controlUnit.vhd", 139, 352); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 139, 352, false, false, false, false, true); // ac (controlUnit.vhd) - Double Click
+// Elapsed time: 21 seconds
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "operativeUnit.v", 5); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Untitled 5", 4); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+// HMemoryUtils.trashcanNow. Engine heap size: 2,598 MB. GUI used memory: 92 MB. Current time: 5/9/25, 3:48:39 PM CEST
+// Elapsed time: 12 seconds
+selectTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, SC_filteredSample[15:0]]", 4, true, false, false, false, true, false); // k (RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE) - Popup Trigger - Node
+selectMenu("Name"); // am (Name)
+selectMenu("Waveform Style"); // am (Waveform Style)
+selectMenu("Signal Color"); // am (Signal Color)
+selectMenu("Radix"); // am (Radix)
+selectMenu("Signal Color"); // am (Signal Color)
+selectMenu("Waveform Style"); // am (Waveform Style)
+selectGraphicalView(RDIResource.RDIViews_WAVEFORM_VIEWER, 223, 379); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+/********** leftMouseClick (1270, 639, true); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer) **********/
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+selectTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, SC_filteredSample[15:0]]", 4, true, false, false, false, true, false); // k (RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE) - Popup Trigger - Node
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+selectMenu("Name"); // am (Name)
+selectMenu("Waveform Style"); // am (Waveform Style)
+selectMenu("Signal Color"); // am (Signal Color)
+selectMenu("Radix"); // am (Radix)
+selectMenu("Radix"); // am (Radix)
+selectMenuItem((HResource) null, "Signed Decimal"); // ad (Signed Decimal)
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_UPDATE_TITLE
+// HMemoryUtils.trashcanNow. Engine heap size: 2,598 MB. GUI used memory: 92 MB. Current time: 5/9/25, 3:49:06 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+selectGraphicalView(RDIResource.RDIViews_WAVEFORM_VIEWER, 228, 468); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer)
+/********** leftMouseClick (1275, 721, true); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer) **********/
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// Elapsed time: 13 seconds
+selectGraphicalView(RDIResource.RDIViews_WAVEFORM_VIEWER, 434, 344); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+/********** leftMouseClick (1463, 607, true); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer) **********/
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,598 MB. GUI used memory: 93 MB. Current time: 5/9/25, 3:49:21 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,598 MB. GUI used memory: 92 MB. Current time: 5/9/25, 3:49:21 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,598 MB. GUI used memory: 92 MB. Current time: 5/9/25, 3:49:22 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,598 MB. GUI used memory: 92 MB. Current time: 5/9/25, 3:49:22 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,642 MB. GUI used memory: 92 MB. Current time: 5/9/25, 3:49:22 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// [Engine Memory]: 3,642 MB (+12449kb) [01:29:15]
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,642 MB. GUI used memory: 92 MB. Current time: 5/9/25, 3:49:22 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,598 MB. GUI used memory: 92 MB. Current time: 5/9/25, 3:49:23 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,598 MB. GUI used memory: 92 MB. Current time: 5/9/25, 3:49:23 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,642 MB. GUI used memory: 92 MB. Current time: 5/9/25, 3:49:24 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,642 MB. GUI used memory: 92 MB. Current time: 5/9/25, 3:49:24 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,514 MB. GUI used memory: 92 MB. Current time: 5/9/25, 3:49:24 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,598 MB. GUI used memory: 92 MB. Current time: 5/9/25, 3:49:24 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,598 MB. GUI used memory: 92 MB. Current time: 5/9/25, 3:49:24 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,598 MB. GUI used memory: 93 MB. Current time: 5/9/25, 3:49:24 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+selectButton(PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN_ALL, "simulation_live_run_all"); // B (PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN_ALL, simulation_live_run_all)
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN_ALL
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// Tcl Message: run all
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+selectButton(PAResourceCommand.PACommandNames_SIMULATION_LIVE_BREAK, "simulation_live_break"); // B (PAResourceCommand.PACommandNames_SIMULATION_LIVE_BREAK, simulation_live_break)
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_LIVE_BREAK
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+selectButton(PAResourceCommand.PACommandNames_SIMULATION_LIVE_RESTART, "simulation_live_restart"); // B (PAResourceCommand.PACommandNames_SIMULATION_LIVE_RESTART, simulation_live_restart)
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_LIVE_RESTART
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// HMemoryUtils.trashcanNow. Engine heap size: 3,660 MB. GUI used memory: 94 MB. Current time: 5/9/25, 3:49:35 PM CEST
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// Tcl Message: restart
+// Tcl Message: INFO: [Wavedata 42-604] Simulation restarted
+dismissDialog("Restart"); // bj (Restart Progress)
+selectButton(PAResourceCommand.PACommandNames_SIMULATION_RELAUNCH, "simulation_relaunch"); // B (PAResourceCommand.PACommandNames_SIMULATION_RELAUNCH, simulation_relaunch)
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_RELAUNCH
+// TclEventType: SIMULATION_MODEL_ABOUT_TO_CLOSE
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: SIMULATION_MODEL_RELOADED
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: LAUNCH_SIM
+// TclEventType: FILE_SET_OPTIONS_CHANGE
+// Tcl Message: relaunch_sim
+// Tcl Message: Command: launch_simulation -step compile -simset sim_1 -mode behavioral
+// Tcl Message: INFO: [Vivado 12-12493] Simulation top is 'tb_firUnit' INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim' INFO: [SIM-utils-51] Simulation object is 'sim_1' INFO: [USF-XSim-2] XSim::Compile design INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+// Tcl Message: xvlog --incr --relax -prj tb_firUnit_vlog.prj
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+// Tcl Message: xvhdl --incr --relax -prj tb_firUnit_vhdl.prj
+// TclEventType: LAUNCH_SIM
+// TclEventType: FILE_SET_OPTIONS_CHANGE
+// Tcl Message: Waiting for jobs to finish... No pending jobs, compilation finished.
+// Tcl Message: INFO: [USF-XSim-69] 'compile' step finished in '3' seconds
+// Tcl Message: Command: launch_simulation -step elaborate -simset sim_1 -mode behavioral
+// Tcl Message: INFO: [Vivado 12-12493] Simulation top is 'tb_firUnit' INFO: [Vivado 12-5682] Launching behavioral simulation in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim' INFO: [SIM-utils-51] Simulation object is 'sim_1' INFO: [USF-XSim-3] XSim::Elaborate design INFO: [USF-XSim-61] Executing 'ELABORATE' step in '/homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.sim/sim_1/behav/xsim'
+// Tcl Message: xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit xil_defaultlib.glbl -log elaborate.log
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: INFO: [USF-XSim-69] 'elaborate' step finished in '2' seconds
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_MODEL_ABOUT_TO_CLOSE
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: SIMULATION_MODEL_RELOADED
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_DELETE_ALL_BREAKPOINTS
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: Time resolution is 1 ps relaunch_sim: Time (s): cpu = 00:00:10 ; elapsed = 00:00:06 . Memory (MB): peak = 8723.930 ; gain = 0.000 ; free physical = 5641 ; free virtual = 15424
+// 'a' command handler elapsed time: 6 seconds
+dismissDialog("Relaunch Simulation"); // b (Relaunch Simulation Progress)
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+selectButton(PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN, "simulation_live_run_for_time"); // B (PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN, simulation_live_run_for_time)
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: run 10 ns
+selectButton(PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN, "simulation_live_run_for_time"); // B (PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN, simulation_live_run_for_time)
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
+// HMemoryUtils.trashcanNow. Engine heap size: 2,606 MB. GUI used memory: 93 MB. Current time: 5/9/25, 3:49:51 PM CEST
+// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: run 10 ns
+selectButton(PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN, "simulation_live_run_for_time"); // B (PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN, simulation_live_run_for_time)
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: run 10 ns
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: run 10 ns
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// HMemoryUtils.trashcanNow. Engine heap size: 2,606 MB. GUI used memory: 93 MB. Current time: 5/9/25, 3:49:52 PM CEST
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: run 10 ns
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: run 10 ns
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: run 10 ns
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// HMemoryUtils.trashcanNow. Engine heap size: 2,606 MB. GUI used memory: 93 MB. Current time: 5/9/25, 3:49:53 PM CEST
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
+selectButton(PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN, "simulation_live_run_for_time"); // B (PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN, simulation_live_run_for_time)
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: run 10 ns
+selectButton(PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN, "simulation_live_run_for_time"); // B (PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN, simulation_live_run_for_time)
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: run 10 ns
+selectButton(PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN, "simulation_live_run_for_time"); // B (PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN, simulation_live_run_for_time)
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: run 10 ns
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// HMemoryUtils.trashcanNow. Engine heap size: 2,606 MB. GUI used memory: 94 MB. Current time: 5/9/25, 3:49:54 PM CEST
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+selectButton(PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN, "simulation_live_run_for_time"); // B (PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN, simulation_live_run_for_time)
+// Tcl Message: run 10 ns
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: run 10 ns
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+selectComboBox(PAResourceQtoS.SimulationLiveRunForComp_SPECIFY_TIME_AND_UNITS, "ms", 1); // b (PAResourceQtoS.SimulationLiveRunForComp_SPECIFY_TIME_AND_UNITS)
+selectComboBox(PAResourceQtoS.SimulationLiveRunForComp_SPECIFY_TIME_AND_UNITS, "us", 2); // b (PAResourceQtoS.SimulationLiveRunForComp_SPECIFY_TIME_AND_UNITS)
+selectButton(PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN, "simulation_live_run_for_time"); // B (PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN, simulation_live_run_for_time)
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_DELAYED_MODEL_EVENT
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: run 10 us
+selectButton(PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN, "simulation_live_run_for_time"); // B (PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN, simulation_live_run_for_time)
+// Run Command: PAResourceCommand.PACommandNames_SIMULATION_LIVE_RUN
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// HMemoryUtils.trashcanNow. Engine heap size: 2,606 MB. GUI used memory: 93 MB. Current time: 5/9/25, 3:50:01 PM CEST
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: SIMULATION_UPDATE_LATEST_TIME
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
+// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
+// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
+// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
+// TclEventType: SIMULATION_UPDATE_LOCALS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
+// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
+// Tcl Message: run 10 us
+// TclEventType: WAVEFORM_MODEL_EVENT
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_MODEL_EVENT
+selectGraphicalView(RDIResource.RDIViews_WAVEFORM_VIEWER, 393, 144); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+/********** leftMouseClick (1419, 428, true); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer) **********/
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,606 MB. GUI used memory: 94 MB. Current time: 5/9/25, 3:50:06 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,606 MB. GUI used memory: 93 MB. Current time: 5/9/25, 3:50:07 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 3,650 MB. GUI used memory: 93 MB. Current time: 5/9/25, 3:50:07 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,606 MB. GUI used memory: 93 MB. Current time: 5/9/25, 3:50:07 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,606 MB. GUI used memory: 93 MB. Current time: 5/9/25, 3:50:08 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,606 MB. GUI used memory: 93 MB. Current time: 5/9/25, 3:50:08 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 3,650 MB. GUI used memory: 93 MB. Current time: 5/9/25, 3:50:09 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,606 MB. GUI used memory: 94 MB. Current time: 5/9/25, 3:50:09 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,606 MB. GUI used memory: 93 MB. Current time: 5/9/25, 3:50:10 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,606 MB. GUI used memory: 93 MB. Current time: 5/9/25, 3:50:10 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,606 MB. GUI used memory: 93 MB. Current time: 5/9/25, 3:50:11 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,606 MB. GUI used memory: 94 MB. Current time: 5/9/25, 3:50:11 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 3,650 MB. GUI used memory: 94 MB. Current time: 5/9/25, 3:50:11 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// Elapsed time: 11 seconds
+selectButton(RDIResource.GraphicalView_ZOOM_FIT, "Waveform Viewer_zoom_fit"); // B (RDIResource.GraphicalView_ZOOM_FIT, Waveform Viewer_zoom_fit)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// Elapsed time: 14 seconds
+selectGraphicalView(RDIResource.RDIViews_WAVEFORM_VIEWER, 10, 145); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer)
+/********** leftMouseClick (1075, 425, true); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer) **********/
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,606 MB. GUI used memory: 94 MB. Current time: 5/9/25, 3:50:31 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,606 MB. GUI used memory: 95 MB. Current time: 5/9/25, 3:50:37 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,606 MB. GUI used memory: 94 MB. Current time: 5/9/25, 3:50:42 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,606 MB. GUI used memory: 94 MB. Current time: 5/9/25, 3:50:44 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,606 MB. GUI used memory: 94 MB. Current time: 5/9/25, 3:50:44 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,606 MB. GUI used memory: 94 MB. Current time: 5/9/25, 3:50:44 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,606 MB. GUI used memory: 95 MB. Current time: 5/9/25, 3:50:49 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,606 MB. GUI used memory: 94 MB. Current time: 5/9/25, 3:50:50 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,606 MB. GUI used memory: 94 MB. Current time: 5/9/25, 3:50:53 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,606 MB. GUI used memory: 94 MB. Current time: 5/9/25, 3:50:55 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 3,650 MB. GUI used memory: 95 MB. Current time: 5/9/25, 3:50:58 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,606 MB. GUI used memory: 94 MB. Current time: 5/9/25, 3:51:01 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// Elapsed time: 34 seconds
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "controlUnit.vhd", 0); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectCodeEditor("controlUnit.vhd", 320, 283); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 283, 127); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 333, 368); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 343, 380); // ac (controlUnit.vhd)
+selectCodeEditor("controlUnit.vhd", 365, 326); // ac (controlUnit.vhd)
+// TclEventType: DG_GRAPH_STALE
+// TclEventType: FILE_SET_CHANGE
+// Elapsed Time for: 'L.f': 01h:29m:11s
+// Elapsed Time for: 'L.f': 01h:29m:14s
+// Elapsed time: 140 seconds
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "operativeUnit.v", 5); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Untitled 5*", 4); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectButton(RDIResource.GraphicalView_ZOOM_FIT, "Waveform Viewer_zoom_fit"); // B (RDIResource.GraphicalView_ZOOM_FIT, Waveform Viewer_zoom_fit)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+selectButton(RDIResource.GraphicalView_ZOOM_FIT, "Waveform Viewer_zoom_fit"); // B (RDIResource.GraphicalView_ZOOM_FIT, Waveform Viewer_zoom_fit)
+// HMemoryUtils.trashcanNow. Engine heap size: 2,622 MB. GUI used memory: 97 MB. Current time: 5/9/25, 3:53:41 PM CEST
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+selectGraphicalView(RDIResource.RDIViews_WAVEFORM_VIEWER, 437, 249); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer)
+/********** leftMouseClick (1316, 512, true); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer) **********/
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+selectGraphicalView(RDIResource.RDIViews_WAVEFORM_VIEWER, 21, 260); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+/********** startDrag (909, 523); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer) **********/
+// HMemoryUtils.trashcanNow. Engine heap size: 2,622 MB. GUI used memory: 97 MB. Current time: 5/9/25, 3:53:44 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,622 MB. GUI used memory: 96 MB. Current time: 5/9/25, 3:53:45 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,666 MB. GUI used memory: 98 MB. Current time: 5/9/25, 3:53:45 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,538 MB. GUI used memory: 98 MB. Current time: 5/9/25, 3:53:45 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,622 MB. GUI used memory: 96 MB. Current time: 5/9/25, 3:53:45 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,622 MB. GUI used memory: 96 MB. Current time: 5/9/25, 3:53:45 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,622 MB. GUI used memory: 97 MB. Current time: 5/9/25, 3:53:45 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,622 MB. GUI used memory: 97 MB. Current time: 5/9/25, 3:53:46 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+/********** endDrag (1020, 522); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer) **********/
+selectGraphicalView(RDIResource.RDIViews_WAVEFORM_VIEWER, 110, 305); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer)
+/********** leftMouseClick (994, 567, true); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer) **********/
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 3,666 MB. GUI used memory: 96 MB. Current time: 5/9/25, 3:53:46 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+typeControlKey(null, null, 'z');
+typeControlKey(null, null, 'z');
+typeControlKey(null, null, 'z');
+typeControlKey(null, null, 'z');
+selectButton(RDIResource.GraphicalView_ZOOM_FIT, "Waveform Viewer_zoom_fit"); // B (RDIResource.GraphicalView_ZOOM_FIT, Waveform Viewer_zoom_fit)
+selectButton(RDIResource.GraphicalView_ZOOM_IN, "Waveform Viewer_zoom_in"); // B (RDIResource.GraphicalView_ZOOM_IN, Waveform Viewer_zoom_in)
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+selectGraphicalView(RDIResource.RDIViews_WAVEFORM_VIEWER, 476, 435); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+/********** startDrag (1365, 696); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer) **********/
+// HMemoryUtils.trashcanNow. Engine heap size: 2,622 MB. GUI used memory: 97 MB. Current time: 5/9/25, 3:53:52 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,622 MB. GUI used memory: 96 MB. Current time: 5/9/25, 3:53:52 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+/********** endDrag (1462, 686); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer) **********/
+selectGraphicalView(RDIResource.RDIViews_WAVEFORM_VIEWER, 714, 713); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer)
+/********** leftMouseClick (1599, 976, true); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer) **********/
+typeControlKey(null, null, 'z');
+typeControlKey(null, null, 'z');
+selectButton(RDIResource.GraphicalView_ZOOM_FIT, "Waveform Viewer_zoom_fit"); // B (RDIResource.GraphicalView_ZOOM_FIT, Waveform Viewer_zoom_fit)
+// HMemoryUtils.trashcanNow. Engine heap size: 2,622 MB. GUI used memory: 97 MB. Current time: 5/9/25, 3:53:56 PM CEST
+selectGraphicalView(RDIResource.RDIViews_WAVEFORM_VIEWER, 177, 232); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+/********** leftMouseClick (1051, 501, true); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer) **********/
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+selectButton(RDIResource.GraphicalView_ZOOM_IN, "Waveform Viewer_zoom_in"); // B (RDIResource.GraphicalView_ZOOM_IN, Waveform Viewer_zoom_in)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+selectButton(RDIResource.GraphicalView_ZOOM_IN, "Waveform Viewer_zoom_in"); // B (RDIResource.GraphicalView_ZOOM_IN, Waveform Viewer_zoom_in)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,622 MB. GUI used memory: 96 MB. Current time: 5/9/25, 3:54:02 PM CEST
+selectButton(RDIResource.GraphicalView_ZOOM_IN, "Waveform Viewer_zoom_in"); // B (RDIResource.GraphicalView_ZOOM_IN, Waveform Viewer_zoom_in)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,666 MB. GUI used memory: 96 MB. Current time: 5/9/25, 3:54:06 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,538 MB. GUI used memory: 97 MB. Current time: 5/9/25, 3:54:07 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,622 MB. GUI used memory: 96 MB. Current time: 5/9/25, 3:54:07 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,622 MB. GUI used memory: 96 MB. Current time: 5/9/25, 3:54:07 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,666 MB. GUI used memory: 96 MB. Current time: 5/9/25, 3:54:07 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,666 MB. GUI used memory: 98 MB. Current time: 5/9/25, 3:54:07 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,538 MB. GUI used memory: 96 MB. Current time: 5/9/25, 3:54:07 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,536 MB. GUI used memory: 96 MB. Current time: 5/9/25, 3:54:07 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,277 MB. GUI used memory: 96 MB. Current time: 5/9/25, 3:54:07 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,016 MB. GUI used memory: 96 MB. Current time: 5/9/25, 3:54:07 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,624 MB. GUI used memory: 96 MB. Current time: 5/9/25, 3:54:07 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,666 MB. GUI used memory: 96 MB. Current time: 5/9/25, 3:54:07 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,666 MB. GUI used memory: 96 MB. Current time: 5/9/25, 3:54:07 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,538 MB. GUI used memory: 97 MB. Current time: 5/9/25, 3:54:07 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,622 MB. GUI used memory: 96 MB. Current time: 5/9/25, 3:54:08 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,622 MB. GUI used memory: 96 MB. Current time: 5/9/25, 3:54:08 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,622 MB. GUI used memory: 96 MB. Current time: 5/9/25, 3:54:08 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,666 MB. GUI used memory: 98 MB. Current time: 5/9/25, 3:54:08 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,666 MB. GUI used memory: 97 MB. Current time: 5/9/25, 3:54:08 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,622 MB. GUI used memory: 97 MB. Current time: 5/9/25, 3:54:10 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,622 MB. GUI used memory: 97 MB. Current time: 5/9/25, 3:54:10 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,622 MB. GUI used memory: 96 MB. Current time: 5/9/25, 3:54:11 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,666 MB. GUI used memory: 97 MB. Current time: 5/9/25, 3:54:11 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,755 MB. GUI used memory: 96 MB. Current time: 5/9/25, 3:54:11 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,622 MB. GUI used memory: 97 MB. Current time: 5/9/25, 3:54:11 PM CEST
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 2,622 MB. GUI used memory: 96 MB. Current time: 5/9/25, 3:54:13 PM CEST
+// Elapsed time: 11 seconds
+floatFrame(RDIResource.RDIViews_WAVEFORM_VIEWER, "Untitled 5*"); // R (RDIResource.RDIViews_WAVEFORM_VIEWER, Untitled 5)
+// RDIResource.RDIViews_WAVEFORM_VIEWER: Untitled 5*: float view
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// HMemoryUtils.trashcanNow. Engine heap size: 3,666 MB. GUI used memory: 97 MB. Current time: 5/9/25, 3:54:15 PM CEST
+maximizeFrame(RDIResource.RDIViews_WAVEFORM_VIEWER, "Untitled 5*"); // R (RDIResource.RDIViews_WAVEFORM_VIEWER, Untitled 5)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+selectGraphicalView(RDIResource.RDIViews_WAVEFORM_VIEWER, 628, 364); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer)
+/********** leftMouseClick (1107, 464, true); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer) **********/
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_SELECTED_WAVE_OBJECT_NAMES
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+// HMemoryUtils.trashcanNow. Engine heap size: 2,622 MB. GUI used memory: 100 MB. Current time: 5/9/25, 3:54:18 PM CEST
+selectButton(RDIResource.GraphicalView_ZOOM_OUT, "Waveform Viewer_zoom_out"); // B (RDIResource.GraphicalView_ZOOM_OUT, Waveform Viewer_zoom_out)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+selectButton(RDIResource.GraphicalView_ZOOM_IN, "Waveform Viewer_zoom_in"); // B (RDIResource.GraphicalView_ZOOM_IN, Waveform Viewer_zoom_in)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// TclEventType: WAVEFORM_UPDATE_COMMANDS
+// TclEventType: WAVEFORM_MOVE_CURSOR
+selectGraphicalView(RDIResource.RDIViews_WAVEFORM_VIEWER, 299, 426); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer)
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+/********** startDrag (767, 523); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer) **********/
+// HMemoryUtils.trashcanNow. Engine heap size: 2,622 MB. GUI used memory: 99 MB. Current time: 5/9/25, 3:54:31 PM CEST
+/********** endDrag (767, 523); // b (RDIResource.RDIViews_WAVEFORM_VIEWER, PlanAheadTabWaveform Viewer_viewer) **********/
+// TclEventType: WAVEFORM_UPDATE_WAVEFORM
+// Elapsed time: 162 seconds
+selectCodeEditor("operativeUnit.v", 303, 361); // ac (operativeUnit.v)
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "controlUnit.vhd", 0); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "operativeUnit.vhd", 1); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+// Elapsed time: 303 seconds
+closeView(PAResourceOtoP.PAViews_CODE, "Code"); // J (PAResourceOtoP.PAViews_CODE, PlanAheadTabCode)
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "operativeUnit.v", 3); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+closeView(PAResourceOtoP.PAViews_CODE, "Code"); // J (PAResourceOtoP.PAViews_CODE, PlanAheadTabCode)
+selectCodeEditor("operativeUnit.v", 249, 475); // ac (operativeUnit.v)
+// Elapsed time: 11 seconds
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "operativeUnit.vhd", 1); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "operativeUnit.v", 2); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectCodeEditor("operativeUnit.v", 21, 345); // ac (operativeUnit.v)
+selectCodeEditor("operativeUnit.v", 307, 339); // ac (operativeUnit.v)
+closeView(PAResourceOtoP.PAViews_CODE, "Code"); // J (PAResourceOtoP.PAViews_CODE, PlanAheadTabCode)
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "controlUnit.vhd", 0); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectTree(PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, "[, Program and Debug, Generate Bitstream]", 21, false); // g (PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, Flow Navigator Tree)
+// Run Command: PAResourceCommand.PACommandNames_RUN_BITGEN
+selectButton(RDIResource.BaseDialog_YES, "Yes", "No Implementation Results Available"); // a (RDIResource.BaseDialog_YES)
+dismissDialog("No Implementation Results Available"); // t (dialog3)
+selectButton(RDIResource.BaseDialog_OK, "OK", "Launch Runs"); // a (RDIResource.BaseDialog_OK)
+// 'cI' command handler elapsed time: 5 seconds
+dismissDialog("Launch Runs"); // cL (dialog4)
+// Tcl Message: launch_runs impl_1 -to_step write_bitstream -jobs 6
+// TclEventType: RUN_LAUNCH
+// TclEventType: RUN_STATUS_CHANGE
+// TclEventType: RUN_MODIFY
+// Tcl Message: [Fri May 9 16:03:06 2025] Launched synth_1... Run output will be captured here: /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.runs/synth_1/runme.log [Fri May 9 16:03:06 2025] Launched impl_1... Run output will be captured here: /homes/l24nicot/path/wish/tp-vhdl-mee/UE-name/tp-filtre-etudiant/proj/AudioProc.runs/impl_1/runme.log
+dismissDialog("Generate Bitstream"); // bj (Generate Bitstream Progress)
+// TclEventType: RUN_STATUS_CHANGE
+// Elapsed time: 77 seconds
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "operativeUnit.vhd", 1); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+// TclEventType: RUN_COMPLETED
+// TclEventType: RUN_STATUS_CHANGE
+// TclEventType: RUN_STEP_COMPLETED
+// TclEventType: RUN_STATUS_CHANGE
+// Elapsed time: 29 seconds
+selectCodeEditor("operativeUnit.vhd", 158, 383); // ac (operativeUnit.vhd)
+selectCodeEditor("operativeUnit.vhd", 472, 420); // ac (operativeUnit.vhd)
+// Elapsed time: 18 seconds
+selectCodeEditor("operativeUnit.vhd", 51, 120); // ac (operativeUnit.vhd)
+selectCodeEditor("operativeUnit.vhd", 51, 120, false, false, false, false, true); // ac (operativeUnit.vhd) - Double Click
+selectCodeEditor("operativeUnit.vhd", 53, 109); // ac (operativeUnit.vhd)
+selectCodeEditor("operativeUnit.vhd", 53, 109, false, false, false, false, true); // ac (operativeUnit.vhd) - Double Click
+selectCodeEditor("operativeUnit.vhd", 350, 293); // ac (operativeUnit.vhd)
+// Elapsed time: 11 seconds
+selectCodeEditor("operativeUnit.vhd", 204, 96); // ac (operativeUnit.vhd)
+selectCodeEditor("operativeUnit.vhd", 326, 122); // ac (operativeUnit.vhd)
+selectCodeEditor("operativeUnit.vhd", 54, 112); // ac (operativeUnit.vhd)
+selectCodeEditor("operativeUnit.vhd", 54, 112, false, false, false, false, true); // ac (operativeUnit.vhd) - Double Click
+selectCodeEditor("operativeUnit.vhd", 129, 173); // ac (operativeUnit.vhd)
+selectCodeEditor("operativeUnit.vhd", 129, 173, false, false, false, false, true); // ac (operativeUnit.vhd) - Double Click
+selectCodeEditor("operativeUnit.vhd", 105, 326); // ac (operativeUnit.vhd)
+selectCodeEditor("operativeUnit.vhd", 105, 326, false, false, false, false, true); // ac (operativeUnit.vhd) - Double Click
+typeControlKey((HResource) null, "operativeUnit.vhd", 'c'); // ac (operativeUnit.vhd)
+selectCodeEditor("operativeUnit.vhd", 127, 504); // ac (operativeUnit.vhd)
+selectCodeEditor("operativeUnit.vhd", 127, 504, false, false, false, false, true); // ac (operativeUnit.vhd) - Double Click
+typeControlKey((HResource) null, "operativeUnit.vhd", 'v'); // ac (operativeUnit.vhd)
+typeControlKey((HResource) null, "operativeUnit.vhd", 'v'); // ac (operativeUnit.vhd)
+// TclEventType: RUN_STEP_COMPLETED
+// Elapsed time: 15 seconds
+selectCodeEditor("operativeUnit.vhd", 99, 504); // ac (operativeUnit.vhd)
+// TclEventType: RUN_FAILED
+// TclEventType: RUN_STATUS_CHANGE
+// TclEventType: RUN_STEP_COMPLETED
+selectButton(RDIResource.BaseDialog_OK, "OK", "Implementation Failed"); // a (RDIResource.BaseDialog_OK)
+// Run Command: PAResourceCommand.PACommandNames_MESSAGE_WINDOW
+dismissDialog("Implementation Failed"); // Q.a (dialog5)
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+// TclEventType: SIMULATION_UPDATE_SCOPE_TREE
+// TclEventType: SIMULATION_UPDATE_STACKS
+selectCodeEditor("operativeUnit.vhd", 261, 510); // ac (operativeUnit.vhd)
+selectCodeEditor("operativeUnit.vhd", 264, 503); // ac (operativeUnit.vhd)
+// Elapsed time: 46 seconds
+selectCodeEditor("operativeUnit.vhd", 157, 173); // ac (operativeUnit.vhd)
+selectCodeEditor("operativeUnit.vhd", 158, 173, false, false, false, false, true); // ac (operativeUnit.vhd) - Double Click
+typeControlKey((HResource) null, "operativeUnit.vhd", 'c'); // ac (operativeUnit.vhd)
+selectCodeEditor("operativeUnit.vhd", 252, 415); // ac (operativeUnit.vhd)
+typeControlKey((HResource) null, "operativeUnit.vhd", 'v'); // ac (operativeUnit.vhd)
+selectCodeEditor("operativeUnit.vhd", 62, 430); // ac (operativeUnit.vhd)
+selectCodeEditor("operativeUnit.vhd", 56, 433); // ac (operativeUnit.vhd)
+selectCodeEditor("operativeUnit.vhd", 166, 356); // ac (operativeUnit.vhd)
+selectCodeEditor("operativeUnit.vhd", 166, 356, false, false, false, false, true); // ac (operativeUnit.vhd) - Double Click
+selectCodeEditor("operativeUnit.vhd", 105, 379); // ac (operativeUnit.vhd)
+selectCodeEditor("operativeUnit.vhd", 105, 379, false, false, false, false, true); // ac (operativeUnit.vhd) - Double Click
+typeControlKey((HResource) null, "operativeUnit.vhd", 'c'); // ac (operativeUnit.vhd)
+selectCodeEditor("operativeUnit.vhd", 172, 353); // ac (operativeUnit.vhd)
+selectCodeEditor("operativeUnit.vhd", 172, 353, false, false, false, false, true); // ac (operativeUnit.vhd) - Double Click
+typeControlKey((HResource) null, "operativeUnit.vhd", 'v'); // ac (operativeUnit.vhd)
+selectCodeEditor("operativeUnit.vhd", 144, 412); // ac (operativeUnit.vhd)
+selectCodeEditor("operativeUnit.vhd", 143, 412, false, false, false, false, true); // ac (operativeUnit.vhd) - Double Click
+typeControlKey((HResource) null, "operativeUnit.vhd", 'c'); // ac (operativeUnit.vhd)
+selectCodeEditor("operativeUnit.vhd", 199, 356); // ac (operativeUnit.vhd)
+typeControlKey((HResource) null, "operativeUnit.vhd", 'v'); // ac (operativeUnit.vhd)
+selectCodeEditor("operativeUnit.vhd", 57, 424); // ac (operativeUnit.vhd)
+selectCodeEditor("operativeUnit.vhd", 220, 431); // ac (operativeUnit.vhd)
+// Elapsed time: 32 seconds
+selectCodeEditor("operativeUnit.vhd", 375, 401); // ac (operativeUnit.vhd)
+selectCodeEditor("operativeUnit.vhd", 461, 426); // ac (operativeUnit.vhd)
+// TclEventType: DG_GRAPH_STALE
+// TclEventType: FILE_SET_CHANGE
+// Elapsed time: 18 seconds
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "controlUnit.vhd", 0); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+// Elapsed Time for: 'L.f': 01h:46m:21s
+selectCodeEditor("controlUnit.vhd", 335, 304); // ac (controlUnit.vhd)
+// Elapsed Time for: 'L.f': 01h:46m:23s
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "operativeUnit.vhd", 1); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+selectCodeEditor("operativeUnit.vhd", 165, 434); // ac (operativeUnit.vhd)
+selectCodeEditor("operativeUnit.vhd", 265, 433); // ac (operativeUnit.vhd)
+selectCodeEditor("operativeUnit.vhd", 238, 419); // ac (operativeUnit.vhd)
+selectCodeEditor("operativeUnit.vhd", 389, 331); // ac (operativeUnit.vhd)
+// TclEventType: DG_GRAPH_STALE
+// TclEventType: FILE_SET_CHANGE
+selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "controlUnit.vhd", 0); // o (PlanAheadTabBaseWorkspace_JideTabbedPane)
+// Elapsed Time for: 'L.f': 01h:46m:31s
+// Elapsed Time for: 'L.f': 01h:46m:33s