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Commit 42ed4313 authored by Houda DAOUAIRI's avatar Houda DAOUAIRI
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tp a continuer

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...@@ -64,7 +64,7 @@ ...@@ -64,7 +64,7 @@
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...@@ -81,10 +81,10 @@ ...@@ -81,10 +81,10 @@
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......
docs/img/FSM.png

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docs/img/FSM.png

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docs/img/FSM.png
docs/img/FSM.png
docs/img/FSM.png
docs/img/FSM.png
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...@@ -54,23 +54,42 @@ begin ...@@ -54,23 +54,42 @@ begin
-- Process to describe the state register -- Process to describe the state register
-- Current state is provide at the output of the register -- Current state is provide at the output of the register
-- and is updated with the next state at each rising edge of clock -- and is updated with the next state at each rising edge of clock
process (_BLANK_) is process (I_clock, I_reset) is
begin begin
if I_reset = '1' then -- asynchronous reset (active high) if I_reset = '1' then -- asynchronous reset (active high)
SR_currentState <= _BLANK_ SR_currentState <= WAIT_SAMPLE;
elsif rising_edge(I_clock) then -- rising clock edge elsif rising_edge(I_clock) then -- rising clock edge
_BLANK_ SR_currentState <= SR_nextState;
end if; end if;
end process; end process;
-- Combinatorial process computing the next state which depends on -- Combinatorial process computing the next state which depends on
-- the current state and on the inputs -- the current state and on the inputs
process (_BLANK_) is process (SR_currentState, I_inputSampleValid, I_processingDone) is
begin begin
case SR_currentState is case SR_currentState is
when WAIT_SAMPLE =>
when WAIT_SAMPLE => if I_inputsampleValid = '1' then
_BLANK_ SR_nextState <= STORE;
else
SR_nextState <= WAIT_SAMPLE;
end if;
when STORE =>
SR_nextState <= PROCESSING_LOOP;
when PROCESSING_LOOP =>
if I_processingDone= '1' then
SR_nextState <= OUTPUT;
else
SR_nextState <= PROCESSING_LOOP;
end if;
when OUTPUT =>
SR_nextState <= WAIT_END_SAMPLE;
when WAIT_END_SAMPLE =>
if I_inputSampleValid = '0' then
SR_nextState <= WAIT_SAMPLE;
else
SR_nextState <= WAIT_END_SAMPLE;
end if;
when others => null; when others => null;
end case; end case;
...@@ -78,13 +97,13 @@ begin ...@@ -78,13 +97,13 @@ begin
-- Rules to compute the outputs depending on the current state -- Rules to compute the outputs depending on the current state
-- (and on the inputs, if you want a Mealy machine). -- (and on the inputs, if you want a Mealy machine).
O_loadShift <= '1' when _BLANK_ else '0'; O_loadShift <= '1' when SR_currentState = STORE else '0';
O_initAddress <= '1' when _BLANK_ else '0'; O_initAddress <= '1' when SR_currentState = STORE else '0';
O_incrAddress <= '1' when _BLANK_ else '0'; O_incrAddress <= '1' when SR_currentState = PROCESSING_LOOP else '0';
O_initSum <= '1' when _BLANK_ else '0'; O_initSum <= '1' when SR_currentState = STORE else '0';
O_loadSum <= '1' when _BLANK_ else '0'; O_loadSum <= '1' when SR_currentState = PROCESSING_LOOP else '0';
O_loadOutput <= '1' when _BLANK_ else '0'; O_loadOutput <= '1' when SR_currentState = OUTPUT else '0';
O_FilteredSampleValid <= '1' when _BLANK_ else '0'; O_FilteredSampleValid <= '1' when SR_currentState = OUTPUT or SR_currentState = WAIT_END_SAMPLE else '0';
......
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