i guess it works

src/hdl/controlUnit.vhd

@@ -140,9 +140,9 @@ begin
   
   O_initSum             <= '1' when (SR_presentState = STORE) else
                             I_processingDone when (SR_presentState = PROCESSING_LOOP_FIR_1) else
-                            I_processingDone when (SR_presentState = PROCESSING_LOOP_IIR_FEEDFORWARD) else
-                           '1' when (SR_presentState = PROCESSING_LOOP_IIR_FEEDBACK) else 
-                           I_processingDone when (SR_presentState = PROCESSING_LOOP_FIR_2) else '0';
+--                            I_processingDone when (SR_presentState = PROCESSING_LOOP_IIR_FEEDFORWARD) else
+                            I_processingDone when (SR_presentState = PROCESSING_LOOP_IIR_FEEDBACK) else 
+                            I_processingDone when (SR_presentState = PROCESSING_LOOP_FIR_2) else '0';
   
   
   O_loadSum             <= not(I_processingDone) when (SR_presentState = PROCESSING_LOOP_FIR_1) else

src/hdl/tb_firUnit.vhd

@@ -56,8 +56,8 @@ begin
 
   -- Null signal followed by a Dirac and then an arbitrary sequence
   SC_inputSample <= "00000000000",
-                    "01111111111" after 401 ns,
-                    "00000000000" after 601 ns;
+                    "01111111111" after 51 ns,
+                    "00000000000" after 251 ns;