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UEEE
sar-signal-audio
gr-vhdl-m24hashi
tp-synthe-etudiant-m24hashi
Commits
05b6119e
Commit
05b6119e
authored
1 month ago
by
LHOMME Titouan
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Edit wave_generator.vhd
parent
235095f0
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src/hdl/wave_generator.vhd
+7
-7
7 additions, 7 deletions
src/hdl/wave_generator.vhd
with
7 additions
and
7 deletions
src/hdl/wave_generator.vhd
+
7
−
7
View file @
05b6119e
...
...
@@ -124,7 +124,7 @@ begin
I_din1
=>
S_square
,
I_din2
=>
S_saw_tooth_out_lut
,
I_din3
=>
S_triangle_out_lut
,
O_dout
=>
O
_wav
O_dout
=>
S
_wav
e_sample
);
-- Module G
...
...
@@ -133,17 +133,17 @@ begin
G_N
=>
G_N
)
port
map
(
I_din
=>
O
_wav
,
O_dout
=>
O_wav
I_din
=>
S
_wav
e_sample
,
O_dout
=>
S_opposite_wave_sample
);
-- Module H
H_inst
:
entity
work
.
module_H
port
map
(
I_sel
=>
S_sign_sel
,
I_din0
=>
O
_wav
,
I_din1
=>
O_wav
,
O_dout
=>
O
_wav
I_din0
=>
S
_wav
e_sample
,
I_din1
=>
S_opposite_wave_sample
,
O_dout
=>
S
_wav
e_value
);
-- Module I
...
...
@@ -154,7 +154,7 @@ begin
port
map
(
I_clk
=>
I_clk
,
I_rst
=>
I_rst
,
I_din
=>
O
_wav
,
I_din
=>
S
_wav
e_value
,
O_dout
=>
O_wav
);
...
...
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