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Commit 65b5d122 authored by Antonio Emilio's avatar Antonio Emilio
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feat: implementing state machine and operative unit

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<mxfile host="Electron" modified="2023-04-28T15:06:41.325Z" agent="Mozilla/5.0 (X11; Linux x86_64) AppleWebKit/537.36 (KHTML, like Gecko) draw.io/21.2.1 Chrome/112.0.5615.87 Electron/24.1.2 Safari/537.36" etag="FiJOiTXp0n2vq3d9UAum" version="21.2.1" type="device">
<diagram name="Page-1" id="lufUWjv2mjaYaQ6cVEt1">
<mxGraphModel dx="798" dy="1290" grid="0" gridSize="10" guides="1" tooltips="1" connect="1" arrows="1" fold="1" page="1" pageScale="1" pageWidth="1169" pageHeight="827" math="0" shadow="0">
<root>
<mxCell id="0" />
<mxCell id="1" parent="0" />
<mxCell id="bw7OO0sNot4gaAuLXok9-1" value="" style="ellipse;whiteSpace=wrap;html=1;fillColor=#dae8fc;strokeColor=#6c8ebf;" vertex="1" parent="1">
<mxGeometry x="240" y="40" width="160" height="80" as="geometry" />
</mxCell>
<mxCell id="bw7OO0sNot4gaAuLXok9-2" value="&lt;font style=&quot;font-size: 21px;&quot; face=&quot;Ubuntu Mono&quot;&gt;Wait Sample&lt;/font&gt;" style="ellipse;whiteSpace=wrap;html=1;fillColor=#dae8fc;strokeColor=#6c8ebf;" vertex="1" parent="1">
<mxGeometry x="250" y="50" width="140" height="60" as="geometry" />
</mxCell>
<mxCell id="bw7OO0sNot4gaAuLXok9-3" value="Store" style="ellipse;whiteSpace=wrap;html=1;fontSize=21;fontFamily=Ubuntu Mono;fillColor=#dae8fc;strokeColor=#6c8ebf;" vertex="1" parent="1">
<mxGeometry x="240" y="160" width="160" height="80" as="geometry" />
</mxCell>
<mxCell id="bw7OO0sNot4gaAuLXok9-5" value="Processing&lt;br&gt;Loop" style="ellipse;whiteSpace=wrap;html=1;fontSize=21;fontFamily=Ubuntu Mono;fillColor=#dae8fc;strokeColor=#6c8ebf;" vertex="1" parent="1">
<mxGeometry x="240" y="280" width="160" height="80" as="geometry" />
</mxCell>
<mxCell id="bw7OO0sNot4gaAuLXok9-6" value="Output" style="ellipse;whiteSpace=wrap;html=1;fontSize=21;fontFamily=Ubuntu Mono;fillColor=#dae8fc;strokeColor=#6c8ebf;" vertex="1" parent="1">
<mxGeometry x="240" y="400" width="160" height="80" as="geometry" />
</mxCell>
<mxCell id="bw7OO0sNot4gaAuLXok9-7" value="Wait End&lt;br&gt;Sample" style="ellipse;whiteSpace=wrap;html=1;fontSize=21;fontFamily=Ubuntu Mono;fillColor=#dae8fc;strokeColor=#6c8ebf;" vertex="1" parent="1">
<mxGeometry x="240" y="520" width="160" height="80" as="geometry" />
</mxCell>
<mxCell id="bw7OO0sNot4gaAuLXok9-8" value="" style="endArrow=block;html=1;rounded=0;endFill=1;exitX=0.5;exitY=1;exitDx=0;exitDy=0;" edge="1" parent="1" source="bw7OO0sNot4gaAuLXok9-1" target="bw7OO0sNot4gaAuLXok9-3">
<mxGeometry width="50" height="50" relative="1" as="geometry">
<mxPoint x="560" y="650" as="sourcePoint" />
<mxPoint x="610" y="600" as="targetPoint" />
</mxGeometry>
</mxCell>
<mxCell id="bw7OO0sNot4gaAuLXok9-9" value="" style="endArrow=block;html=1;rounded=0;endFill=1;exitX=0.5;exitY=1;exitDx=0;exitDy=0;entryX=0.5;entryY=0;entryDx=0;entryDy=0;" edge="1" parent="1" target="bw7OO0sNot4gaAuLXok9-5">
<mxGeometry width="50" height="50" relative="1" as="geometry">
<mxPoint x="319.76" y="240" as="sourcePoint" />
<mxPoint x="319.76" y="320" as="targetPoint" />
</mxGeometry>
</mxCell>
<mxCell id="bw7OO0sNot4gaAuLXok9-10" value="" style="endArrow=block;html=1;rounded=0;endFill=1;exitX=0.5;exitY=1;exitDx=0;exitDy=0;entryX=0.5;entryY=0;entryDx=0;entryDy=0;" edge="1" parent="1" target="bw7OO0sNot4gaAuLXok9-6">
<mxGeometry width="50" height="50" relative="1" as="geometry">
<mxPoint x="319.76" y="360" as="sourcePoint" />
<mxPoint x="320" y="400" as="targetPoint" />
</mxGeometry>
</mxCell>
<mxCell id="bw7OO0sNot4gaAuLXok9-11" value="" style="endArrow=block;html=1;rounded=0;endFill=1;exitX=0.5;exitY=1;exitDx=0;exitDy=0;entryX=0.5;entryY=0;entryDx=0;entryDy=0;" edge="1" parent="1" source="bw7OO0sNot4gaAuLXok9-6" target="bw7OO0sNot4gaAuLXok9-7">
<mxGeometry width="50" height="50" relative="1" as="geometry">
<mxPoint x="319.76" y="480" as="sourcePoint" />
<mxPoint x="319.76" y="560" as="targetPoint" />
</mxGeometry>
</mxCell>
<mxCell id="bw7OO0sNot4gaAuLXok9-12" value="" style="curved=1;endArrow=block;html=1;rounded=0;exitX=0.5;exitY=1;exitDx=0;exitDy=0;entryX=0;entryY=0;entryDx=0;entryDy=0;endFill=1;" edge="1" parent="1" source="bw7OO0sNot4gaAuLXok9-7" target="bw7OO0sNot4gaAuLXok9-1">
<mxGeometry width="50" height="50" relative="1" as="geometry">
<mxPoint x="510" y="320" as="sourcePoint" />
<mxPoint x="560" y="270" as="targetPoint" />
<Array as="points">
<mxPoint x="320" y="670" />
<mxPoint x="170" y="640" />
<mxPoint x="180" y="80" />
<mxPoint x="230" y="20" />
</Array>
</mxGeometry>
</mxCell>
<mxCell id="bw7OO0sNot4gaAuLXok9-14" value="" style="endArrow=none;html=1;rounded=0;" edge="1" parent="1">
<mxGeometry width="50" height="50" relative="1" as="geometry">
<mxPoint x="300" y="140" as="sourcePoint" />
<mxPoint x="340" y="140" as="targetPoint" />
</mxGeometry>
</mxCell>
<mxCell id="bw7OO0sNot4gaAuLXok9-17" value="&lt;font style=&quot;font-size: 15px;&quot; face=&quot;Ubuntu Mono&quot;&gt;Condition 1&lt;/font&gt;" style="edgeLabel;html=1;align=left;verticalAlign=middle;resizable=0;points=[];labelBackgroundColor=none;labelBorderColor=none;fontStyle=2" vertex="1" connectable="0" parent="bw7OO0sNot4gaAuLXok9-14">
<mxGeometry x="0.564" relative="1" as="geometry">
<mxPoint x="10" as="offset" />
</mxGeometry>
</mxCell>
<mxCell id="bw7OO0sNot4gaAuLXok9-15" value="" style="endArrow=none;html=1;rounded=0;" edge="1" parent="1">
<mxGeometry width="50" height="50" relative="1" as="geometry">
<mxPoint x="300" y="380" as="sourcePoint" />
<mxPoint x="340" y="380" as="targetPoint" />
</mxGeometry>
</mxCell>
<mxCell id="bw7OO0sNot4gaAuLXok9-16" value="" style="endArrow=none;html=1;rounded=0;" edge="1" parent="1">
<mxGeometry width="50" height="50" relative="1" as="geometry">
<mxPoint x="300" y="620" as="sourcePoint" />
<mxPoint x="340" y="620" as="targetPoint" />
</mxGeometry>
</mxCell>
<mxCell id="bw7OO0sNot4gaAuLXok9-18" value="&lt;font style=&quot;font-size: 15px;&quot; face=&quot;Ubuntu Mono&quot;&gt;Condition 2&lt;/font&gt;" style="edgeLabel;html=1;align=left;verticalAlign=middle;resizable=0;points=[];labelBackgroundColor=none;labelBorderColor=none;fontStyle=2" vertex="1" connectable="0" parent="1">
<mxGeometry x="340.00279069767436" y="380" as="geometry" />
</mxCell>
<mxCell id="bw7OO0sNot4gaAuLXok9-19" value="&lt;font style=&quot;font-size: 15px;&quot; face=&quot;Ubuntu Mono&quot;&gt;Condition 3&lt;/font&gt;" style="edgeLabel;html=1;align=left;verticalAlign=middle;resizable=0;points=[];labelBackgroundColor=none;labelBorderColor=none;fontStyle=2" vertex="1" connectable="0" parent="1">
<mxGeometry x="340.00279069767436" y="620" as="geometry" />
</mxCell>
<mxCell id="bw7OO0sNot4gaAuLXok9-20" value="" style="curved=1;endArrow=block;html=1;rounded=0;endFill=1;entryX=0.5;entryY=0;entryDx=0;entryDy=0;" edge="1" parent="1" target="bw7OO0sNot4gaAuLXok9-1">
<mxGeometry width="50" height="50" relative="1" as="geometry">
<mxPoint x="350" y="-10" as="sourcePoint" />
<mxPoint x="460" y="90" as="targetPoint" />
<Array as="points">
<mxPoint x="330" />
</Array>
</mxGeometry>
</mxCell>
<mxCell id="bw7OO0sNot4gaAuLXok9-21" value="&lt;font face=&quot;Ubuntu Mono&quot;&gt;&lt;span style=&quot;font-size: 15px;&quot;&gt;Rst = &#39;1&#39;&lt;/span&gt;&lt;/font&gt;" style="edgeLabel;html=1;align=left;verticalAlign=middle;resizable=0;points=[];" vertex="1" connectable="0" parent="1">
<mxGeometry x="350.00279069767436" y="-10" as="geometry" />
</mxCell>
<mxCell id="bw7OO0sNot4gaAuLXok9-23" value="&lt;font style=&quot;font-size: 15px;&quot; face=&quot;Ubuntu Mono&quot;&gt;LoadShift = &#39;0&#39;&lt;br&gt;InitAddress = &#39;0&#39;&lt;br&gt;IncrAddress = &#39;0&#39;&lt;br&gt;InitSum = &#39;0&#39;&lt;br&gt;LoadSum = &#39;0&#39;&lt;br&gt;LoadOutput = &#39;1&#39;&lt;br&gt;&lt;/font&gt;" style="rounded=0;whiteSpace=wrap;html=1;align=left;fontStyle=2;container=0;fillColor=#f5f5f5;strokeColor=#666666;fontColor=#333333;" vertex="1" parent="1">
<mxGeometry x="480" y="380" width="240" height="110" as="geometry" />
</mxCell>
<mxCell id="bw7OO0sNot4gaAuLXok9-24" value="" style="endArrow=block;html=1;rounded=0;exitX=1;exitY=0.5;exitDx=0;exitDy=0;endFill=1;dashed=1;" edge="1" parent="1">
<mxGeometry width="50" height="50" relative="1" as="geometry">
<mxPoint x="400" y="439.77" as="sourcePoint" />
<mxPoint x="480" y="439.77" as="targetPoint" />
</mxGeometry>
</mxCell>
<mxCell id="bw7OO0sNot4gaAuLXok9-33" value="&lt;font style=&quot;font-size: 15px;&quot; face=&quot;Ubuntu Mono&quot;&gt;LoadShift =&amp;nbsp;&lt;br&gt;InitAddress =&amp;nbsp;&lt;br&gt;IncrAddress =&amp;nbsp;&lt;br&gt;InitSum =&amp;nbsp;&lt;br&gt;LoadSum =&amp;nbsp;&lt;br&gt;LoadOutput =&amp;nbsp;&lt;br&gt;&lt;/font&gt;" style="rounded=0;whiteSpace=wrap;html=1;align=left;fontStyle=2;fillColor=#f5f5f5;strokeColor=#666666;fontColor=#333333;" vertex="1" parent="1">
<mxGeometry x="480" y="20" width="240" height="110" as="geometry" />
</mxCell>
<mxCell id="bw7OO0sNot4gaAuLXok9-34" value="" style="endArrow=block;html=1;rounded=0;exitX=1;exitY=0.5;exitDx=0;exitDy=0;endFill=1;dashed=1;" edge="1" parent="1">
<mxGeometry width="50" height="50" relative="1" as="geometry">
<mxPoint x="400" y="79.80999999999995" as="sourcePoint" />
<mxPoint x="480" y="79.80999999999995" as="targetPoint" />
</mxGeometry>
</mxCell>
<mxCell id="bw7OO0sNot4gaAuLXok9-30" value="&lt;font style=&quot;font-size: 15px;&quot; face=&quot;Ubuntu Mono&quot;&gt;LoadShift =&amp;nbsp;&lt;br&gt;InitAddress =&amp;nbsp;&lt;br&gt;IncrAddress =&amp;nbsp;&lt;br&gt;InitSum =&amp;nbsp;&lt;br&gt;LoadSum =&amp;nbsp;&lt;br&gt;LoadOutput =&amp;nbsp;&lt;br&gt;&lt;/font&gt;" style="rounded=0;whiteSpace=wrap;html=1;align=left;fontStyle=2;fillColor=#f5f5f5;strokeColor=#666666;fontColor=#333333;" vertex="1" parent="1">
<mxGeometry x="480" y="140" width="240" height="110" as="geometry" />
</mxCell>
<mxCell id="bw7OO0sNot4gaAuLXok9-31" value="" style="endArrow=block;html=1;rounded=0;exitX=1;exitY=0.5;exitDx=0;exitDy=0;endFill=1;dashed=1;" edge="1" parent="1">
<mxGeometry width="50" height="50" relative="1" as="geometry">
<mxPoint x="400" y="199.80999999999995" as="sourcePoint" />
<mxPoint x="480" y="199.80999999999995" as="targetPoint" />
</mxGeometry>
</mxCell>
<mxCell id="bw7OO0sNot4gaAuLXok9-25" value="&lt;font style=&quot;font-size: 15px;&quot; face=&quot;Ubuntu Mono&quot;&gt;LoadShift =&amp;nbsp;&lt;br&gt;InitAddress =&amp;nbsp;&lt;br&gt;IncrAddress =&amp;nbsp;&lt;br&gt;InitSum =&amp;nbsp;&lt;br&gt;LoadSum =&amp;nbsp;&lt;br&gt;LoadOutput =&amp;nbsp;&lt;br&gt;&lt;/font&gt;" style="rounded=0;whiteSpace=wrap;html=1;align=left;fontStyle=2;fillColor=#f5f5f5;strokeColor=#666666;fontColor=#333333;" vertex="1" parent="1">
<mxGeometry x="480" y="260" width="240" height="110" as="geometry" />
</mxCell>
<mxCell id="bw7OO0sNot4gaAuLXok9-27" value="" style="endArrow=block;html=1;rounded=0;exitX=1;exitY=0.5;exitDx=0;exitDy=0;endFill=1;dashed=1;" edge="1" parent="1">
<mxGeometry width="50" height="50" relative="1" as="geometry">
<mxPoint x="400" y="319.80999999999995" as="sourcePoint" />
<mxPoint x="480" y="319.80999999999995" as="targetPoint" />
</mxGeometry>
</mxCell>
<mxCell id="bw7OO0sNot4gaAuLXok9-36" value="&lt;font style=&quot;font-size: 15px;&quot; face=&quot;Ubuntu Mono&quot;&gt;LoadShift =&amp;nbsp;&lt;br&gt;InitAddress =&amp;nbsp;&lt;br&gt;IncrAddress =&amp;nbsp;&lt;br&gt;InitSum =&amp;nbsp;&lt;br&gt;LoadSum =&amp;nbsp;&lt;br&gt;LoadOutput =&amp;nbsp;&lt;br&gt;&lt;/font&gt;" style="rounded=0;whiteSpace=wrap;html=1;align=left;fontStyle=2;fillColor=#f5f5f5;strokeColor=#666666;fontColor=#333333;" vertex="1" parent="1">
<mxGeometry x="480" y="500" width="240" height="110" as="geometry" />
</mxCell>
<mxCell id="bw7OO0sNot4gaAuLXok9-37" value="" style="endArrow=block;html=1;rounded=0;exitX=1;exitY=0.5;exitDx=0;exitDy=0;endFill=1;dashed=1;" edge="1" parent="1">
<mxGeometry width="50" height="50" relative="1" as="geometry">
<mxPoint x="400" y="559.81" as="sourcePoint" />
<mxPoint x="480" y="559.81" as="targetPoint" />
</mxGeometry>
</mxCell>
</root>
</mxGraphModel>
</diagram>
</mxfile>
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################################################################################
# DONOT REMOVE THIS FILE
# Unified simulation database file for selected simulation model for IP
#
# File: ssm.db (Wed Feb 26 11:58:08 2025)
#
# This file is generated by the unified simulation automation and contains the
# selected simulation model information for the IP/BD instances.
# DONOT REMOVE THIS FILE
################################################################################
clk_wiz_0,
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version:1
6d6f64655f636f756e7465727c4755494d6f6465:5
eof:
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version:1
7873696d:7873696d5c636f6d6d616e645f6c696e655f6f7074696f6e73:2d73696d5f6d6f6465:6265686176696f72616c:00:00
7873696d:7873696d5c636f6d6d616e645f6c696e655f6f7074696f6e73:2d73696d5f74797065:64656661756c743a3a:00:00
eof:2427094519
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<?xml version="1.0" encoding="UTF-8"?>
<!-- Product Version: Vivado v2024.1 (64-bit) -->
<!-- -->
<!-- Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. -->
<!-- Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved. -->
<labtools version="1" minor="0"/>
proj/AudioProc.ip_user_files/README.txt 0 → 100644
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The files in this directory structure are automatically generated and managed by Vivado. Editing these files is not recommended.
proj/AudioProc.ip_user_files/ip/clk_wiz_0/clk_wiz_0.vho 0 → 100644
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--
-- (c) Copyright 2008 - 2013 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--
------------------------------------------------------------------------------
-- User entered comments
------------------------------------------------------------------------------
-- None
--
------------------------------------------------------------------------------
-- Output Output Phase Duty Cycle Pk-to-Pk Phase
-- Clock Freq (MHz) (degrees) (%) Jitter (ps) Error (ps)
------------------------------------------------------------------------------
-- CLK_OUT1___100.000______0.000______50.0______151.366____132.063
-- CLK_OUT2___200.000______0.000______50.0______132.221____132.063
-- CLK_OUT3____12.000______0.000______50.0______231.952____132.063
-- CLK_OUT4____50.000______0.000______50.0______174.353____132.063
--
------------------------------------------------------------------------------
-- Input Clock Freq (MHz) Input Jitter (UI)
------------------------------------------------------------------------------
-- __primary_________100.000____________0.010
-- The following code must appear in the VHDL architecture header:
------------- Begin Cut here for COMPONENT Declaration ------ COMP_TAG
component clk_wiz_0
port
(-- Clock in ports
clk_in1 : in std_logic;
-- Clock out ports
clk_out1 : out std_logic;
clk_out2 : out std_logic;
clk_out3 : out std_logic;
clk_out4 : out std_logic;
-- Status and control signals
reset : in std_logic;
locked : out std_logic
);
end component;
-- COMP_TAG_END ------ End COMPONENT Declaration ------------
-- The following code must appear in the VHDL architecture
-- body. Substitute your own instance name and net names.
------------- Begin Cut here for INSTANTIATION Template ----- INST_TAG
your_instance_name : clk_wiz_0
port map (
-- Clock in ports
clk_in1 => clk_in1,
-- Clock out ports
clk_out1 => clk_out1,
clk_out2 => clk_out2,
clk_out3 => clk_out3,
clk_out4 => clk_out4,
-- Status and control signals
reset => reset,
locked => locked
);
-- INST_TAG_END ------ End INSTANTIATION Template ------------
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set curr_wave [current_wave_config]
if { [string length $curr_wave] == 0 } {
if { [llength [get_objects]] > 0} {
add_wave /
set_property needs_save false [current_wave_config]
} else {
send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console."
}
}
run 1000ns
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proj/AudioProc.sim/sim_1/behav/xsim/compile.bat 0 → 100644
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@echo off
REM ****************************************************************************
REM Vivado (TM) v2024.2 (64-bit)
REM
REM Filename : compile.bat
REM Simulator : AMD Vivado Simulator
REM Description : Script for compiling the simulation design source files
REM
REM Generated by Vivado on Sat Mar 08 19:39:29 +0100 2025
REM SW Build 5239630 on Fri Nov 08 22:35:27 MST 2024
REM
REM Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
REM Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
REM
REM usage: compile.bat
REM
REM ****************************************************************************
REM compile VHDL design sources
echo "xvhdl --incr --relax -prj tb_firUnit_vhdl.prj"
call xvhdl --incr --relax -prj tb_firUnit_vhdl.prj -log xvhdl.log
call type xvhdl.log > compile.log
if "%errorlevel%"=="1" goto END
if "%errorlevel%"=="0" goto SUCCESS
:END
exit 1
:SUCCESS
exit 0
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#!/usr/bin/env bash
# ****************************************************************************
# Vivado (TM) v2024.1 (64-bit)
#
# Filename : compile.sh
# Simulator : AMD Vivado Simulator
# Description : Script for compiling the simulation design source files
#
# Generated by Vivado on Wed Feb 26 12:08:10 CET 2025
# SW Build 5076996 on Wed May 22 18:36:09 MDT 2024
#
# Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
# Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
#
# usage: compile.sh
#
# ****************************************************************************
set -Eeuo pipefail
# compile VHDL design sources
echo "xvhdl --incr --relax -prj tb_firUnit_vhdl.prj"
xvhdl --incr --relax -prj tb_firUnit_vhdl.prj 2>&1 | tee compile.log
echo "Waiting for jobs to finish..."
echo "No pending jobs, compilation finished."
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@echo off
REM ****************************************************************************
REM Vivado (TM) v2024.2 (64-bit)
REM
REM Filename : elaborate.bat
REM Simulator : AMD Vivado Simulator
REM Description : Script for elaborating the compiled design
REM
REM Generated by Vivado on Sat Mar 08 19:39:30 +0100 2025
REM SW Build 5239630 on Fri Nov 08 22:35:27 MST 2024
REM
REM Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
REM Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
REM
REM usage: elaborate.bat
REM
REM ****************************************************************************
REM elaborate design
echo "xelab --incr --debug typical --relax --mt 2 -L xil_defaultlib -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit -log elaborate.log"
call xelab --incr --debug typical --relax --mt 2 -L xil_defaultlib -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit -log elaborate.log
if "%errorlevel%"=="0" goto SUCCESS
if "%errorlevel%"=="1" goto END
:END
exit 1
:SUCCESS
exit 0
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Vivado Simulator v2024.2.0
Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
Running: C:/Xilinx/Vivado/2024.2/bin/unwrapped/win64.o/xelab.exe --incr --debug typical --relax --mt 2 -L xil_defaultlib -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit -log elaborate.log
Using 2 slave threads.
Starting static elaboration
Completed static elaboration
INFO: [XSIM 43-4323] No Change in HDL. Linking previously generated obj files to create kernel
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#!/usr/bin/env bash
# ****************************************************************************
# Vivado (TM) v2024.1 (64-bit)
#
# Filename : elaborate.sh
# Simulator : AMD Vivado Simulator
# Description : Script for elaborating the compiled design
#
# Generated by Vivado on Wed Feb 26 12:08:12 CET 2025
# SW Build 5076996 on Wed May 22 18:36:09 MDT 2024
#
# Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
# Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
#
# usage: elaborate.sh
#
# ****************************************************************************
set -Eeuo pipefail
# elaborate design
echo "xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit -log elaborate.log"
xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L secureip -L xpm --snapshot tb_firUnit_behav xil_defaultlib.tb_firUnit -log elaborate.log
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// $Header: /devl/xcs/repo/env/Databases/CAEInterfaces/verunilibs/data/glbl.v,v 1.14 2010/10/28 20:44:00 fphillip Exp $
`ifndef GLBL
`define GLBL
`timescale 1 ps / 1 ps
module glbl ();
parameter ROC_WIDTH = 100000;
parameter TOC_WIDTH = 0;
parameter GRES_WIDTH = 10000;
parameter GRES_START = 10000;
//-------- STARTUP Globals --------------
wire GSR;
wire GTS;
wire GWE;
wire PRLD;
wire GRESTORE;
tri1 p_up_tmp;
tri (weak1, strong0) PLL_LOCKG = p_up_tmp;
wire PROGB_GLBL;
wire CCLKO_GLBL;
wire FCSBO_GLBL;
wire [3:0] DO_GLBL;
wire [3:0] DI_GLBL;
reg GSR_int;
reg GTS_int;
reg PRLD_int;
reg GRESTORE_int;
//-------- JTAG Globals --------------
wire JTAG_TDO_GLBL;
wire JTAG_TCK_GLBL;
wire JTAG_TDI_GLBL;
wire JTAG_TMS_GLBL;
wire JTAG_TRST_GLBL;
reg JTAG_CAPTURE_GLBL;
reg JTAG_RESET_GLBL;
reg JTAG_SHIFT_GLBL;
reg JTAG_UPDATE_GLBL;
reg JTAG_RUNTEST_GLBL;
reg JTAG_SEL1_GLBL = 0;
reg JTAG_SEL2_GLBL = 0 ;
reg JTAG_SEL3_GLBL = 0;
reg JTAG_SEL4_GLBL = 0;
reg JTAG_USER_TDO1_GLBL = 1'bz;
reg JTAG_USER_TDO2_GLBL = 1'bz;
reg JTAG_USER_TDO3_GLBL = 1'bz;
reg JTAG_USER_TDO4_GLBL = 1'bz;
assign (strong1, weak0) GSR = GSR_int;
assign (strong1, weak0) GTS = GTS_int;
assign (weak1, weak0) PRLD = PRLD_int;
assign (strong1, weak0) GRESTORE = GRESTORE_int;
initial begin
GSR_int = 1'b1;
PRLD_int = 1'b1;
#(ROC_WIDTH)
GSR_int = 1'b0;
PRLD_int = 1'b0;
end
initial begin
GTS_int = 1'b1;
#(TOC_WIDTH)
GTS_int = 1'b0;
end
initial begin
GRESTORE_int = 1'b0;
#(GRES_START);
GRESTORE_int = 1'b1;
#(GRES_WIDTH);
GRESTORE_int = 1'b0;
end
endmodule
`endif
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@echo off
REM ****************************************************************************
REM Vivado (TM) v2024.2 (64-bit)
REM
REM Filename : simulate.bat
REM Simulator : AMD Vivado Simulator
REM Description : Script for simulating the design by launching the simulator
REM
REM Generated by Vivado on Sat Mar 08 18:23:47 +0100 2025
REM SW Build 5239630 on Fri Nov 08 22:35:27 MST 2024
REM
REM Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
REM Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
REM
REM usage: simulate.bat
REM
REM ****************************************************************************
REM simulate design
echo "xsim tb_firUnit_behav -key {Behavioral:sim_1:Functional:tb_firUnit} -tclbatch tb_firUnit.tcl -log simulate.log"
call xsim tb_firUnit_behav -key {Behavioral:sim_1:Functional:tb_firUnit} -tclbatch tb_firUnit.tcl -log simulate.log
if "%errorlevel%"=="0" goto SUCCESS
if "%errorlevel%"=="1" goto END
:END
exit 1
:SUCCESS
exit 0
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#!/usr/bin/env bash
# ****************************************************************************
# Vivado (TM) v2024.1 (64-bit)
#
# Filename : simulate.sh
# Simulator : AMD Vivado Simulator
# Description : Script for simulating the design by launching the simulator
#
# Generated by Vivado on Wed Feb 26 12:07:21 CET 2025
# SW Build 5076996 on Wed May 22 18:36:09 MDT 2024
#
# Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
# Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
#
# usage: simulate.sh
#
# ****************************************************************************
set -Eeuo pipefail
# simulate design
echo "xsim tb_firUnit_behav -key {Behavioral:sim_1:Functional:tb_firUnit} -tclbatch tb_firUnit.tcl -log simulate.log"
xsim tb_firUnit_behav -key {Behavioral:sim_1:Functional:tb_firUnit} -tclbatch tb_firUnit.tcl -log simulate.log
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